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* [PGO] Fix a bug in reading text format value profile.Rong Xu2017-02-271-2/+3
| | | | | | | | | | | | | | Summary: Should use the Valuekind read from the profile. Reviewers: davidxl Reviewed By: davidxl Subscribers: llvm-commits, xur Differential Revision: https://reviews.llvm.org/D30420 llvm-svn: 296391
* [clangd] Make clangd install to binBenjamin Kramer2017-02-271-0/+2
| | | | | | | | | | This allows the install target to also install clangd to bin, so that it can be deployed and used outside the build tree. Patch by Marc-Andre Laperle! Differential Revision: https://reviews.llvm.org/D30425 llvm-svn: 296390
* [ARM] don't transform an add(ext Cond), C to select unless there's a setcc ↵Sanjay Patel2017-02-273-15/+17
| | | | | | | | | | | | | | | | | | | | | | | of the condition The transform in question claims to be doing: // fold (add (select cc, 0, c), x) -> (select cc, x, (add, x, c)) ...starting in PerformADDCombineWithOperands(), but it wasn't actually checking for a setcc node for the sext/zext patterns. This is exactly the opposite of a transform I'd like to add to DAGCombiner's foldSelectOfConstants(), so I was seeing infinite loops with my draft of a patch applied. The changes in select_const.ll look positive (less instructions). The change in arm-and-tst-peephole.ll is unrelated. We're changing the input IR in that test to preserve the intent of the test, but that's not affected by this code change. Differential Revision: https://reviews.llvm.org/D30355 llvm-svn: 296389
* PR32042: Create inlined debug info for EmitInlinedInheritingCXXConstructorCall.Adrian Prantl2017-02-274-27/+164
| | | | | | | | | | | | | | | | | | When clang emits an inheriting C++ constructor it may inline code during the CodeGen phase. This patch ensures that any debug info in this inlined code gets a proper inlined location. Otherwise we can end up with invalid debug info metadata, since all inlined local variables and function arguments would be reparented into the call site. Analogous to ApplyInlineLocation this patch introduces a ApplyInlineDebugLocation scoped helper to facilitate entering an inlined scope and cleaning up afterwards. This fixes one of the issues discovered in PR32042. rdar://problem/30679307 llvm-svn: 296388
* UBSan docs: Explicitly mention that `-fsanitize=unsigned-integer-overflow` ↵Nico Weber2017-02-271-1/+3
| | | | | | | | does not catch UB. https://reviews.llvm.org/D27455 llvm-svn: 296387
* Remove unused variableDavid Blaikie2017-02-271-2/+0
| | | | llvm-svn: 296386
* Remove XFAIL in implicit_deduction_guides testsSteven Wu2017-02-272-8/+0
| | | | | | | | The clang assertion causing these tests failing with sanitizer is fixed in r295794. All the bots running libcxx tests should be upgraded and running the compiler with the fix. llvm-svn: 296385
* [Support][Error] Add a 'cantFail' utility function for known-safe calls toLang Hames2017-02-273-4/+114
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fallible functions. Some fallible functions (those returning Error or Expected<T>) may only fail for a subset of their inputs. For example, a "safe" square root function will succeed for all finite positive inputs: Expected<double> safeSqrt(double d) { if (d < 0 && !isnan(d) && !isinf(d)) return make_error<...>("Cannot sqrt -ve values, nans or infs"); return sqrt(d); } At a safe callsite for such a function, checking the error return value is redundant: if (auto ValOrErr = safeSqrt(42.0)) { // use *ValOrErr. } else llvm_unreachable("safeSqrt should always succeed for +ve values"); The cantFail function wraps this check and extracts the contained value, simplifying control flow: double Result = cantFail(safeSqrt(42.0)); This function should be used with care: it is a programmatic error to wrap a call with cantFail if it can in fact fail. For debug builds this will result in llvm_unreachable being called. For release builds the behavior is undefined. Use of this function is likely to be rare in library code, but more common for tool and unit-test code where inputs and mock functions may be known to be safe. llvm-svn: 296384
* Clarify benchmark conditions.Rui Ueyama2017-02-271-7/+14
| | | | llvm-svn: 296383
* AMDGPU: Add some of the new gfx9 VOP3 instructionsMatt Arsenault2017-02-272-0/+44
| | | | llvm-svn: 296382
* [X86][SSE] Attempt to extract vector elements through target shufflesSimon Pilgrim2017-02-2711-490/+526
| | | | | | | | | | DAGCombiner already supports peeking thorough shuffles to improve vector element extraction, but legalization often leaves us in situations where we need to extract vector elements after shuffles have already been lowered. This patch adds support for VECTOR_EXTRACT_ELEMENT/PEXTRW/PEXTRB instructions to attempt to handle target shuffles as well. I've covered some basic scenarios including handling shuffle mask scaling and the implicit zero-extension of PEXTRW/PEXTRB, there is more that could be done here (that I've mentioned in TODOs) but I haven't found many cases where its worth it. Differential Revision: https://reviews.llvm.org/D30176 llvm-svn: 296381
* AMDGPU: Support inlineasm for packed instructionsMatt Arsenault2017-02-272-1/+99
| | | | | | | Add packed types as legal so they may be used with inlineasm. Keep all operations expanded for now. llvm-svn: 296379
* Add terminator to .eh_frame sectionsRui Ueyama2017-02-279-10/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch by Mark Kettenis. Currenlty ld.lld does not add a terminator (a CIE with its length field set to zero) to the .eh_frame sections it generates. While the relevant standards (the AMD64 SysV ABI and the Linux LSB) are not explicit about this, such a terminator is expected by some unwinder implementations and seems to be always emitted by ld.bfd. In addition to that, the Linux LSB https://refspecs.linuxfoundation.org/LSB_5.0.0/LSB-Core-generic/LSB-Core-generic/ehframechpt.html#EHFRAME explicitly says that The .eh_frame section shall contain 1 or more Call Frame Information (CFI) records. Currently, if the .eh_frame sections of the input files only contain terminators, ld.lld emits a zero=sized .eh_frame section which clearly doesn't meet that requirement. The diff makes sure a terminator gets added to each .eh_frame section and adjusts all the relevant tests to account for that. An additional test isn't needed as these adjustments mean that the existence of the terminator is tested for by several tests already. Differential Revision: https://reviews.llvm.org/D30335 llvm-svn: 296378
* De-template ResolvedReloc as it doesn't actually depends on ELFT.Rui Ueyama2017-02-271-12/+10
| | | | | | Pointed out by Bob Haarman. llvm-svn: 296377
* [SLP] Use different flags in tests for reduction ops and extra args.Alexey Bataev2017-02-271-3/+3
| | | | llvm-svn: 296376
* AMDGPU: Don't fold immediate if clamp/omod are setMatt Arsenault2017-02-273-8/+319
| | | | | | | Doesn't fix any practical problems because clamp/omod are currently folded after peephole optimizer. llvm-svn: 296375
* [ubsan] Factor out logic to emit a range check. NFC.Vedant Kumar2017-02-272-29/+50
| | | | | | | This is a readability improvement, but it will also help prep an upcoming patch to detect UB loads from bitfields. llvm-svn: 296374
* enable -flto=thin in clang-clBob Haarman2017-02-274-3/+17
| | | | | | | | | | | | | | Summary: This enables LTO to be used with the clang-cl frontend. Reviewers: rnk, hans Reviewed By: hans Subscribers: pcc, cfe-commits, mehdi_amini, Prazek Differential Revision: https://reviews.llvm.org/D30239 llvm-svn: 296373
* AMDGPU: Fold omod into instructionsMatt Arsenault2017-02-275-8/+723
| | | | llvm-svn: 296372
* [TailDuplicator] Maintain DebugLoc for branch instructionsTaewook Oh2017-02-272-1/+58
| | | | | | | | | | | | | | Summary: Existing implementation of duplicateSimpleBB function drops DebugLoc metadata of branch instructions during the transformation. This patch addresses this issue by making newly created branch instructions to keep the metadata of replaced branch instructions. Reviewers: qcolombet, craig.topper, aprantl, MatzeB, sanjoy, dblaikie Reviewed By: dblaikie Subscribers: dblaikie, llvm-commits Differential Revision: https://reviews.llvm.org/D30026 llvm-svn: 296371
* AMDGPU: Add f16 to shader calling conventionsMatt Arsenault2017-02-272-8/+33
| | | | | | Mostly useful for writing tests for f16 features. llvm-svn: 296370
* [SLP] Modify test to check IR flags propagation for extra args.Alexey Bataev2017-02-271-15/+15
| | | | llvm-svn: 296369
* AMDGPU: Add VOP3P instruction formatMatt Arsenault2017-02-2727-86/+1342
| | | | | | | | Add a few non-VOP3P but instructions related to packed. Includes hack with dummy operands for the benefit of the assembler llvm-svn: 296368
* Refactor xaluo.ll and xmulo.ll tests. NFCAmaury Sechet2017-02-272-493/+1781
| | | | llvm-svn: 296367
* [InlineFunction] add nonnull assumptions based on argument attributesSanjay Patel2017-02-272-23/+41
| | | | | | | | | | | This was suggested in D27855: have the inliner add assumptions, so we don't lose nonnull info provided by argument attributes. This still doesn't solve PR28430 (dyn_cast), but this gets us closer. https://reviews.llvm.org/D29999 llvm-svn: 296366
* [Hexagon] Defs and clobbers can overlapKrzysztof Parzyszek2017-02-271-5/+4
| | | | llvm-svn: 296365
* Fix a bug when unswitching on partial LIV for SwitchInstXin Tong2017-02-272-32/+339
| | | | | | | | | | | | | | Summary: Fix a bug when unswitching on partial LIV for SwitchInst. Reviewers: hfinkel, efriedma, sanjoy Reviewed By: sanjoy Subscribers: david2050, mzolotukhin, llvm-commits Differential Revision: https://reviews.llvm.org/D29107 llvm-svn: 296363
* Fix comments. NFC.Rong Xu2017-02-271-1/+1
| | | | | | Change "Thin-LTO" to "ThinLTO" in the comments for consistency. llvm-svn: 296362
* [Cmake] Optionally use a system isl version.Michael Kruse2017-02-275-166/+216
| | | | | | | | | | | | | | | This patch adds an option to build against a version of libisl already installed on the system. The installation is autodetected using the pkg-config file shipped with isl. The detection of the library is in the FindISL.cmake module that creates an imported target. Contributed-by: Philip Pfaffe <philip.pfaffe@gmail.com> Differential Revision: https://reviews.llvm.org/D30043 llvm-svn: 296361
* Support NetBSD Thread ID in lldb-server testsKamil Rytarowski2017-02-272-0/+10
| | | | | | | | | | | | | | | | | | | | | Summary: Native Thread ID is retrieved with _lwp_self() on NetBSD. The returned value is of type int32_t, but for consistency with other Operating Systems cast it to uint64_t. Sponsored by <The NetBSD Foundation> Reviewers: joerg, labath, clayborg, emaste Reviewed By: labath, clayborg Subscribers: #lldb Tags: #lldb Differential Revision: https://reviews.llvm.org/D30374 llvm-svn: 296360
* Fix the project name in the license file.Arnaud A. de Grandmaison2017-02-271-2/+2
| | | | llvm-svn: 296359
* Add libcxxabi's LICENSE.TXT to libunwind.Arnaud A. de Grandmaison2017-02-271-0/+76
| | | | | | | | | | | When libunwind was spinned off libcxxabi, most file were copied from libcxxabi to libunwind. However, libc++abi's toplevel LICENSE.TXT was forgotten in the copying. It's considered a good practice to have the license file at the root of the project, and making linunwind a separate project was not supposed to change its licensing. Besides, several header files refer to the LICENSE.TXT, so copy the one from libc++abi. llvm-svn: 296358
* Fix LLVM module buildSteven Wu2017-02-271-0/+1
| | | | | | Add WasmRelocs/WebAssembly.def to textual include header. llvm-svn: 296356
* [X86] Use APInt instead of SmallBitVector tracking undef elements from ↵Craig Topper2017-02-271-25/+25
| | | | | | | | | | | | | | | | | | | getTargetConstantBitsFromNode and getConstVector. Summary: SmallBitVector uses a malloc for more than 58 bits on a 64-bit target and more than 27 bits on a 32-bit target. Some of the vector types we deal with here use more than those number of elements and therefore cause a malloc. APInt on the other hand supports up to 64 bits without a malloc. That's the maximum number of bits we need here so we can avoid a malloc for all cases by using APInt. Reviewers: RKSimon Reviewed By: RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D30392 llvm-svn: 296355
* [X86] Use APInt instead of SmallBitVector for tracking Zeroable elements in ↵Craig Topper2017-02-271-63/+57
| | | | | | | | | | | | | | | | | | | shuffle lowering Summary: SmallBitVector uses a malloc for more than 58 bits on a 64-bit target and more than 27 bits on a 32-bit target. Some of the vector types we deal with here use more than those number of elements and therefore cause a malloc. APInt on the other hand supports up to 64 bits without a malloc. That's the maximum number of bits we need here so we can avoid a malloc for all cases by using APInt. Reviewers: RKSimon Reviewed By: RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D30390 llvm-svn: 296354
* [X86] Fix SmallVector sizes in constant pool shuffle decoding to avoid heap ↵Craig Topper2017-02-271-5/+5
| | | | | | | | | | allocation Some of the vectors are under sized to avoid heap allocation. In one case the vector was oversized. Differential Revision: https://reviews.llvm.org/D30387 llvm-svn: 296353
* [X86] Use APInt instead of SmallBitVector for tracking undef elements in ↵Craig Topper2017-02-271-10/+10
| | | | | | | | | | | | | | | | | | | constant pool shuffle decoding Summary: SmallBitVector uses a malloc for more than 58 bits on a 64-bit target and more than 27 bits on a 32-bit target. Some of the vector types we deal with here use more than those number of elements and therefore cause a malloc. APInt on the other hand supports up to 64 bits without a malloc. That's the maximum number of bits we need here so we can avoid a malloc for all cases by using APInt. This will incur a minor increase in stack usage due to APInt storing the bit count separately from the data bits unlike SmallBitVector, but that should be ok. Reviewers: RKSimon Reviewed By: RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D30386 llvm-svn: 296352
* Fix LIBCXX_HAS_EXTERNAL_THREAD_API builds. NFC.Asiri Rathnayake2017-02-271-1/+2
| | | | | | Add the missing check in the __config header. llvm-svn: 296351
* Remove an empty line in icmp-illegal.ll . NFCAmaury Sechet2017-02-271-1/+0
| | | | llvm-svn: 296350
* [SLP] A test for a fix of PR32038.Alexey Bataev2017-02-271-0/+124
| | | | llvm-svn: 296349
* [DeLICM] Add nomap regressions tests. NFC.Michael Kruse2017-02-277-0/+547
| | | | | | | | | | | | These verify that some scalars are not mapped because it would be incorrect to do so. For these check we verify that no transformation has been executed from output of the pass's '-analyze'. Adding optimization remarks is not useful as it would result in too many messages, even repeated ones. I avoided checking the '-debug-only=polly-delicm' output which is an antipattern. llvm-svn: 296348
* [DeLICM] Statistics for use in regression tests.Michael Kruse2017-02-271-2/+42
| | | | | | | Print some measurements of the DeLICM transformation at -analyze to be used in regression tests. llvm-svn: 296347
* Fix typo in error message. NFC.Asiri Rathnayake2017-02-271-1/+1
| | | | llvm-svn: 296346
* Loop predication expand both sides of the widened conditionArtur Pilipenko2017-02-272-6/+83
| | | | | | | | | | | | This is a fix for a loop predication bug which resulted in malformed IR generation. Loop invariant side of the widened condition is not guaranteed to be available in the preheader as is, so we need to expand it as well. See added unsigned_loop_0_to_n_hoist_length test for example. Reviewed By: sanjoy, mkazantsev Differential Revision: https://reviews.llvm.org/D30099 llvm-svn: 296345
* Attempt to fix arm-native libcxxabi tests for the no-exceptions variantAsiri Rathnayake2017-02-272-0/+2
| | | | | | | | These tests embed calls to exceptions-related symbols from the abi library, which are absent in the no-exceptions variant. The tests need to be marked as unsupported for the no-exceptions configuration. llvm-svn: 296344
* AArch64InstPrinter: rewrite of printSysAliasSjoerd Meijer2017-02-273-316/+163
| | | | | | | | | | | | | | | | | | This is a cleanup/rewrite of the printSysAlias function. This was not using the tablegen instruction descriptions, but was "manually" decoding the instructions. This has been replaced with calls to lookup_XYZ_ByEncoding tablegen calls. This revealed several problems. First, instruction IVAU had the wrong encoding. This was cancelled out by the parser that incorrectly matched the wrong encoding. Second, instruction CVAP was missing from the SystemOperands tablegen descriptions, so this has been added. And third, the required target features were not captured in the tablegen descriptions, so support for this has also been added. Differential Revision: https://reviews.llvm.org/D30329 llvm-svn: 296343
* [ARM] LSL #0 is an alias of MOVJohn Brawn2017-02-274-12/+206
| | | | | | | | | | | | | | | | | | | | | | | | Currently we handle this correctly in arm, but in thumb we don't which leads to an unpredictable instruction being emitted for LSL #0 in an IT block and SP not being permitted in some cases when it should be. For the thumb2 LSL we can handle this by making LSL #0 an alias of MOV in the .td file, but for thumb1 we need to handle it in checkTargetMatchPredicate to get the IT handling right. We also need to adjust the handling of MOV rd, rn, LSL #0 to avoid generating the 16-bit encoding in an IT block. We should also adjust it to allow SP in the same way that it is allowed in MOV rd, rn, but I haven't done that here because it looks like it would take quite a lot of work to get right. Additionally correct the selection of the 16-bit shift instructions in processInstruction, where it was checking if the two registers were equal when it should have been checking if they were low. It appears that previously this code was never executed and the 16-bit encoding was selected by default, but the other changes I've done here have somehow made it start being used. Differential Revision: https://reviews.llvm.org/D30294 llvm-svn: 296342
* [clang-format] Add a NamespaceEndCommentsFixerKrasimir Georgiev2017-02-2710-3/+590
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This patch adds a NamespaceEndCommentsFixer TokenAnalyzer for clang-format, which fixes end namespace comments. It currently supports inserting and updating existing wrong comments. Example source: ``` namespace A { int i; } namespace B { int j; } // namespace A ``` after formatting: ``` namespace A { int i; } // namespace A namespace B { int j; } // namespace B ``` Reviewers: klimek, djasper Reviewed By: djasper Subscribers: klimek, mgorny Differential Revision: https://reviews.llvm.org/D30269 llvm-svn: 296341
* Add a test we already get right.Rafael Espindola2017-02-271-0/+14
| | | | | | It would have found a problem in a patch I am writing. llvm-svn: 296339
* Fix cmake dependency for the external-thread-library variant. NFC.Asiri Rathnayake2017-02-271-1/+1
| | | | llvm-svn: 296338
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