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* AMDGPU: Partially fix disassembly of MIMG instructionsMatt Arsenault2017-12-139-78/+167
| | | | | | | | | | | | | | | | | | | | | Stores failed to decode at all since they didn't have a DecoderNamespace set. Loads worked, but did not change the register width displayed to match the numbmer of enabled channels. The number of printed registers for vaddr is still wrong, but I don't think that's encoded in the instruction so there's not much we can do about that. Image atomics are still broken. MIMG is the same encoding for SI/VI, but the image atomic classes are split up into encoding specific versions unlike every other MIMG instruction. They have isAsmParserOnly set on them for some reason. dmask is also special for these, so we probably should not have it as an explicit operand as it is now. llvm-svn: 320614
* [OPENMP] Add codegen for `nowait` clause in target directives.Alexey Bataev2017-12-1310-21/+68
| | | | | | Added basic codegen for `nowait` clauses in target-based directives. llvm-svn: 320613
* [JumpThreading] Preservation of DT and LVI across the passBrian M. Rzycki2017-12-1312-99/+893
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: See D37528 for a previous (non-deferred) version of this patch and its description. Preserves dominance in a deferred manner using a new class DeferredDominance. This reduces the performance impact of updating the DominatorTree at every edge insertion and deletion. A user may call DDT->flush() within JumpThreading for an up-to-date DT. This patch currently has one flush() at the end of runImpl() to ensure DT is preserved across the pass. LVI is also preserved to help subsequent passes such as CorrelatedValuePropagation. LVI is simpler to maintain and is done immediately (not deferred). The code to perfom the preversation was minimally altered and was simply marked as preserved for the PassManager to be informed. This extends the analysis available to JumpThreading for future enhancements. One example is loop boundary threading. Reviewers: dberlin, kuhar, sebpop Reviewed By: kuhar, sebpop Subscribers: hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D40146 llvm-svn: 320612
* [scudo] Adding a public Scudo interfaceKostya Kortchinsky2017-12-136-3/+123
| | | | | | | | | | | | | | | | Summary: The first and only function to start with allows to set the soft or hard RSS limit at runtime. Add associated tests. Reviewers: alekseyshl Reviewed By: alekseyshl Subscribers: mgorny, #sanitizers, llvm-commits Differential Revision: https://reviews.llvm.org/D41128 llvm-svn: 320611
* Add missing reference to lldCommon in MinGW/CMakeLists.txtSam Clegg2017-12-132-1/+1
| | | | | | | | | | | Without this the LLVM_BUILD_LLVM_DYLIB+DLLVM_LINK_LLVM_DYLIB build break. Also remove unneeded lldCore from wasm/CMakeLists.txt Differential Revision: https://reviews.llvm.org/D41194 llvm-svn: 320610
* [Hexagon] Intrinsic support for V62 and V65Krzysztof Parzyszek2017-12-134-1875/+2547
| | | | llvm-svn: 320609
* [OPENMP] Initial codegen for `target teams distribute simd` directive.Alexey Bataev2017-12-1315-17/+2914
| | | | | | | Host + generic device codegen for `target teams distribute simd` directive. llvm-svn: 320608
* [GVNHoist] Fix: PR35222 gvn-hoist incorrectly erases loadAditya Kumar2017-12-132-2/+27
| | | | | | | | | | | | | | w.r.t. the paper "A Practical Improvement to the Partial Redundancy Elimination in SSA Form" (https://sites.google.com/site/jongsoopark/home/ssapre.pdf) Proper dominance check was missing here, so having a loopinfo should not be required. Committing this diff as this fixes the bug, if there are further concerns, I'll be happy to work on them. Differential Revision: https://reviews.llvm.org/D39781 llvm-svn: 320607
* Ignore metainstructions during the shrink wrap analysisAdrian Prantl2017-12-132-0/+186
| | | | | | | | | | Shrink wrapping should ignore DBG_VALUEs referring to frame indices, since the presence of debug information must not affect code generation. Differential Revision: https://reviews.llvm.org/D41187 llvm-svn: 320606
* [dsymutil][test] Fix failing test when no lipo binary availableJonas Devlieghere2017-12-131-11/+0
| | | | | | | | The invocation without -no-output would try to lipo the different debug objects together. This wouldn't work on platforms that don't provide that utility. llvm-svn: 320605
* [libcxx] Fix basic_stringbuf constructorZhihao Yuan2017-12-132-1/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: [libcxx] Fix basic_stringbuf constructor The C++ Standard [stringbuf.cons]p1 defines the effects of the basic_stringbuf constructor that takes ios_base::openmode as follows: Effects: Constructs an object of class basic_stringbuf, initializing the base class with basic_streambuf(), and initializing mode with which. Postconditions: str() == "". The default constructor of basic_streambuf shall initialize all its pointer member objects to null pointers [streambuf.cons]p1. Currently libc++ calls "str(string_type());" in the aforementioned constructor setting basic_streambuf's pointers to a non-null value. This patch removes the call (note that the postcondition str() == "" remains valid because __str_ is default-initialized) and adds a test checking that the basic_streambuf's pointers are null after construction. Thanks Mikhail Maltsev for the patch. Reviewers: EricWF, mclow.lists Reviewed By: mclow.lists Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D40707 llvm-svn: 320604
* [X86] Add JCC/JECXZ/JECXZ/JRCXZ/LOOP schedule testsSimon Pilgrim2017-12-132-9/+664
| | | | llvm-svn: 320603
* Regenerate test-shrink.ll test results. NFCAmaury Sechet2017-12-131-70/+361
| | | | llvm-svn: 320602
* [dsymutil] Re-enable threadingJonas Devlieghere2017-12-133-29/+43
| | | | | | | | | | | | | | | | Threading was disabled in r317263 because it broke a test in combination with `-DLLVM_ENABLE_THREADS=OFF`. This was because a ThreadPool warning was piped to llvm-dwarfdump which was expecting to read an object from stdin. This patch re-enables threading and fixes the offending test. Unfortunately this required more than just moving the ThreadPool out of the for loop because of the TempFile refactoring that took place in the meantime. Differential revision: https://reviews.llvm.org/D41180 llvm-svn: 320601
* [X86] Add RET/RETF schedule testsSimon Pilgrim2017-12-132-1/+245
| | | | llvm-svn: 320600
* Move Repl check to a symbol method.Rafael Espindola2017-12-132-3/+6
| | | | | | | | | | | | Having a SectionBase method check Repl is inconsistent with how we handle other section information. For example, if a section is replaced, Sec->Live is false and it is natural for Sec->getOutputSection() to be null. It is the symbol that is moved to the replacement section. llvm-svn: 320599
* [X86] Add POP/PUSH schedule testsSimon Pilgrim2017-12-132-11/+1034
| | | | llvm-svn: 320598
* Simplify. NFC.Rafael Espindola2017-12-131-2/+2
| | | | | | If a section has been replaced (Sec != Sec->Repl) it is not Live. llvm-svn: 320597
* [OPENMP] Support `reduction` clause on target-based directives.Alexey Bataev2017-12-136-56/+533
| | | | | | | OpenMP 5.0 added support for `reduction` clause in target-based directives. Patch adds this support to clang. llvm-svn: 320596
* [Function] Remove trailing end-of-line whitespace. NFC.Brian M. Rzycki2017-12-131-2/+2
| | | | llvm-svn: 320595
* [sanitizer] Introduce a vDSO aware timing functionKostya Kortchinsky2017-12-1312-7/+72
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: See D40657 & D40679 for previous versions of this patch & description. A couple of things were fixed here to have it not break some bots. Weak symbols can't be used with `SANITIZER_GO` so the previous version was breakin TsanGo. I set up some additional local tests and those pass now. I changed the workaround for the glibc vDSO issue: `__progname` is initialized after the vDSO and is actually public and of known type, unlike `__vdso_clock_gettime`. This works better, and with all compilers. The rest is the same. Reviewers: alekseyshl Reviewed By: alekseyshl Subscribers: srhines, kubamracek, krytarowski, llvm-commits, #sanitizers Differential Revision: https://reviews.llvm.org/D41121 llvm-svn: 320594
* [AArch64] fix an issue with older /proc/cpuinfo layoutPaul Osmialowski2017-12-131-0/+8
| | | | | | | | | | There are two /proc/cpuinfo layots in use for AArch64: old and new. The old one has all 'processor : n' lines in one section, hence checking for duplications does not make sense. Differential Revision: https://reviews.llvm.org/D41000 llvm-svn: 320593
* [scudo] Inline getScudoChunk function.Kostya Kortchinsky2017-12-131-1/+1
| | | | | | | | | | | | | | | Summary: getScudoChunk function is implicitly inlined for optimized builds on clang, but not on gcc. It's a small enough function that it seems sensible enough to just inline it by default. Reviewers: cryptoad, alekseyshl Reviewed By: cryptoad Differential Revision: https://reviews.llvm.org/D41138 llvm-svn: 320592
* [clangd] Fix bool conversion operator of UniqueFunctionIlya Biryukov2017-12-131-1/+1
| | | | | | | Usages of it were giving compiler errors because of the missing explicit conversion. llvm-svn: 320591
* [OPENMP] Fix handling of clauses in clause parsing mode.Alexey Bataev2017-12-138-206/+163
| | | | | | | The compiler may generate incorrect code if we try to capture the variable in clause parsing mode. llvm-svn: 320590
* Fix link failure on one build bot introduced by r320584.Nemanja Ivanovic2017-12-131-1/+3
| | | | llvm-svn: 320589
* Reverted r320229. It broke tests on builder ↵Galina Kistanova2017-12-132-134/+4
| | | | | | llvm-clang-x86_64-expensive-checks-win. llvm-svn: 320588
* [X86] Add PREFETCH schedule testsSimon Pilgrim2017-12-132-23/+62
| | | | llvm-svn: 320587
* [X86] Add XCHG schedule testsSimon Pilgrim2017-12-132-1/+486
| | | | llvm-svn: 320586
* [X86] Add MOVNTI schedule testsSimon Pilgrim2017-12-131-1/+85
| | | | llvm-svn: 320585
* [PowerPC] MachineSSA pass to reduce the number of CR-logical operationsNemanja Ivanovic2017-12-138-180/+952
| | | | | | | | | | | | | | The initial implementation of an MI SSA pass to reduce cr-logical operations. Currently, the only operations handled by the pass are binary operations where both CR-inputs come from the same block and the single use is a conditional branch (also in the same block). Committing this off by default to allow for a period of field testing. Will enable it by default in a follow-up patch soon. Differential Revision: https://reviews.llvm.org/D30431 llvm-svn: 320584
* [X86] Add ENTER/LEAVE schedule testsSimon Pilgrim2017-12-132-2/+230
| | | | llvm-svn: 320583
* [X86] Add IMUL schedule testsSimon Pilgrim2017-12-131-1/+572
| | | | llvm-svn: 320582
* [X86] Add RDMSR/WRMSR, RDPMC + RDTSC/RDTSCP schedule testsSimon Pilgrim2017-12-134-1/+246
| | | | | | Add missing RDTSCP itinerary llvm-svn: 320581
* [X86] Add ARPL/BOUND schedule testsSimon Pilgrim2017-12-131-1/+257
| | | | llvm-svn: 320580
* [Hexagon] Add front-end support for Hexagon V65Krzysztof Parzyszek2017-12-136-5/+47
| | | | llvm-svn: 320579
* [clangd] Try to workaround MSVC compilation failure.Ilya Biryukov2017-12-131-0/+5
| | | | llvm-svn: 320578
* [clangd] clang-format the source code. NFCIlya Biryukov2017-12-135-24/+15
| | | | llvm-svn: 320577
* [clangd] Implemented logging using ContextIlya Biryukov2017-12-1321-402/+486
| | | | | | | | | | | | Reviewers: sammccall, ioeric, hokein Reviewed By: sammccall Subscribers: klimek, cfe-commits Differential Revision: https://reviews.llvm.org/D40486 llvm-svn: 320576
* [RISCV] Define sfence.vma InstAliases to match the GNU RISC-V toolsAlex Bradbury2017-12-133-1/+11
| | | | | | | | Unfortunately these aren't defined explicitly in the privileged spec, but the GNU assembler does accept `sfence.vma` and `sfence.vma rs` as well as the usual `sfence.vma rs, rt`. llvm-svn: 320575
* [clangd] Remove the const specifier of the takeSymbol methodHaojian Wu2017-12-131-1/+1
| | | | | | otherwise we will copy an object. llvm-svn: 320574
* [FuzzMutate] Only generate loads and stores to the first class sized typesIgor Laevsky2017-12-132-1/+37
| | | | | | Differential Revision: https://reviews.llvm.org/D41109 llvm-svn: 320573
* [FuzzMutate] Avoid zero sized aggregatesIgor Laevsky2017-12-132-2/+16
| | | | | | Differential Revision: https://reviews.llvm.org/D41110 llvm-svn: 320572
* [FuzzMutate] Correctly split landingpad blocksIgor Laevsky2017-12-132-2/+36
| | | | | | Differential Revision: https://reviews.llvm.org/D41112 llvm-svn: 320571
* [X86][SSE] MOVMSK only uses the sign bit from each vector elementSimon Pilgrim2017-12-132-1/+22
| | | | | | | | | | Pass the input vector through SimplifyDemandedBits as we only need the sign bit from each vector element of MOVMSK We'd probably get more hits if SimplifyDemandedBits was better at handling vectors... Differential Revision: https://reviews.llvm.org/D41119 llvm-svn: 320570
* [RISCV] Implement floating point assembler pseudo instructionsAlex Bradbury2017-12-134-0/+156
| | | | | | | | | | | | | | | Adds the assembler aliases for the floating point instructions which can be mapped to a single canonical instruction. The missing pseudo instructions (flw, fld, fsw, fsd) are marked as TODO. Other things, like for example PCREL_LO, have to be implemented first. This patch builds upon D40902. Differential Revision: https://reviews.llvm.org/D41071 Patch by Mario Werner. llvm-svn: 320569
* Reintroduce r320049, r320014 and r319894.Igor Laevsky2017-12-139-5/+91
| | | | | | OpenGL issues should be fixed by now. llvm-svn: 320568
* [DAG] Promote ADDCARRY / SUBCARRYRoger Ferrer Ibanez2017-12-132-1/+84
| | | | | | | | Add missing case that was not implemented yet. Differential Revision: https://reviews.llvm.org/D38942 llvm-svn: 320567
* [CodeGen] Print jump-table index operands as %jump-table.0 in both MIR and ↵Francis Visoiu Mistrih2017-12-138-33/+95
| | | | | | | | | | debug output Work towards the unification of MIR and debug output by printing `%jump-table.0` instead of `<jt#0>`. Only debug syntax is affected. llvm-svn: 320566
* [CodeGen] Print target index operands as target-index(target-specific) + 8 ↵Francis Visoiu Mistrih2017-12-134-29/+69
| | | | | | | | | | in both MIR and debug output Work towards the unification of MIR and debug output by printing `target-index(target-specific) + 8` instead of `<ti#0+8>` and `target-index(target-specific) + 8` instead of `<ti#0-8>`. Only debug syntax is affected. llvm-svn: 320565
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