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* Makefile.rules: compile all tests with -fno-limit-debug-infoPavel Labath2017-12-0423-132/+2
| | | | | | | | | | | | | | | | | | | | | | | | Summary: This flag is on by default for darwin and freebsd, but off for linux. Without it, clang will sometimes not emit debug info for types like std::string. Whether it does this, and which tests will fail because of that depends on the linux distro and c++ library version. A bunch of tests were already setting these flags manually, but here instead I take a whole sale approach and enable this flag for all tests. Any test which does not want to have this flag (right now we have one such test) can turn it off explicitly via CFLAGS_EXTRAS+=$(LIMIT_DEBUG_INFO_FLAGS) This fixes a bunch of data formatter tests on red-hat. Reviewers: davide, jankratochvil Subscribers: emaste, aprantl, krytarowski, JDevlieghere, lldb-commits Differential Revision: https://reviews.llvm.org/D40717 llvm-svn: 319653
* Revert "[ValueTracking] Pass only a single lambda to ↵Sam McCall2017-12-041-29/+37
| | | | | | | | | computeKnownBitsFromShiftOperator by using KnownBits struct instead of separate APInts. NFCI" This reverts commit r319624, which seems to cause a miscompile (breaks the multistage PPC buildbots) llvm-svn: 319652
* AMDGPU: fix missing s_waitcntTim Corringham2017-12-041-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: The pass that inserts s_waitcnt instructions where needed propagated info used to track dependencies for each block by iterating over the predecessor blocks. The iteration was terminated when a predecessor that had not yet been processed was encountered. Any info in blocks later in the list was therefore not processed, leading to the possiblility of a required s_waitcnt not being inserted. The fix is simply to change the "break" to "continue" for the relevant loops, so that all visited blocks are processed. This is likely what was intended when the code was written. There is no test case provided for this fix because: 1) the only example that reproduces this is large and resistant to being reduced 2) the change is trivial Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye Differential Revision: https://reviews.llvm.org/D40544 llvm-svn: 319651
* Move __tsan::Vector to __sanitizerKamil Rytarowski2017-12-0414-49/+47
| | | | | | | | | | | | | | | | | | | | | Summary: The low-fat STL-like vector container will be reused in MSan. It is needed to implement an atexit(3) interceptor on NetBSD/amd64 in MSan. Sponsored by <The NetBSD Foundation> Reviewers: joerg, dvyukov, eugenis, vitalybuka, kcc Reviewed By: dvyukov Subscribers: kubamracek, mgorny, llvm-commits, #sanitizers Tags: #sanitizers Differential Revision: https://reviews.llvm.org/D40726 llvm-svn: 319650
* [Asm, ARM] Add fallback diag for multiple invalid operandsOliver Stannard2017-12-0413-67/+101
| | | | | | | | | | | | | | | | This adds a "invalid operands for instruction" diagnostic for instructions where there is an instruction encoding with the correct mnemonic and which is available for this target, but where multiple operands do not match those which were provided. This makes it clear that there is some combination of operands that is valid for the current target, which the default diagnostic of "invalid instruction" does not. Since this is a very general error, we only emit it if we don't have a more specific error. Differential revision: https://reviews.llvm.org/D36747 llvm-svn: 319649
* [ELF] Add BYTE expression to test case for non-contiguous relro [NFC]Peter Smith2017-12-041-0/+7
| | | | | | | | | | | As well as location counter expressions. The data generating expressions such as BYTE can generate a non-zero sized OutputSection that will report 0 until assignAddresses() is called. Add an example to the existing test case relro-non-contiguous-script-data.s. Differential Revision: https://reviews.llvm.org/D40732 llvm-svn: 319648
* [clangd] GlobalCompilationDatabase interface changesSam McCall2017-12-044-64/+73
| | | | | | | | | | | | | | | | | | Summary: - GlobalCompilationDatabase now returns a single command (that's all we use) - fallback flags are now part of the GlobalCompilationDatabase. There's a default implementation that they can optionally customize. - this allows us to avoid invoking the fallback logic on two separate codepaths - race on extra flags fixed by locking the mutex - made GCD const-correct (DBGCD does have mutating methods) Reviewers: hokein Subscribers: klimek, cfe-commits, ilya-biryukov Differential Revision: https://reviews.llvm.org/D40733 llvm-svn: 319647
* [TwoAddressInstructionPass] Bugfix in handling of sunk instructions.Jonas Paulsson2017-12-041-1/+10
| | | | | | | | | | | | | | | | | | An instruction returned by TII->convertToThreeAddress() may contain a %noreg (undef) operand, which is not expected by tryInstructionTransform(). So if this MI is sunk to a lower point in MBB, it must be skipped when later encountered. A new set SunkInstrs is used for this purpose. Note: there is no test supplied here, as this was triggered on SystemZ while working on a review of instruction flags. A test case for this bugfix will be included in the upcoming SystemZ commit. Review: Quentin Colombet https://reviews.llvm.org/D40711 llvm-svn: 319646
* [DAGCombine] Remove isAndLoadExtLoad argumentsSam Parker2017-12-041-14/+6
| | | | | | | | | Both LoadedVT and NarrowLoad are passed as references and neither of them are used by any of its callers. Differential Revision: https://reviews.llvm.org/D40713 llvm-svn: 319645
* [AArch64] Allow using emulated tls on platforms other than ELFMartin Storsjo2017-12-043-5/+50
| | | | | | | | | | | | | | | | This matches how it is done on X86. This allows using emulated tls on windows; in MinGW environments, native tls isn't supported at the moment. Set the right Data*bitsDirective for windows to match the existing tests for other platforms. Make parts of the existing tests a regex, to allow matching .section .rdata for windows, to avoid having to duplicate the rest of the tests for windows. Differential Revision: https://reviews.llvm.org/D40770 llvm-svn: 319644
* [ARM] Allow using emulated tls on platforms other than ELFMartin Storsjo2017-12-042-4/+79
| | | | | | | | | | | This matches how it is done on X86. This allows using emulated tls on windows; in MinGW environments, native tls isn't supported at the moment. Differential Revision: https://reviews.llvm.org/D40769 llvm-svn: 319643
* Fix bug where we wouldn't break columns over the limit.Manuel Klimek2017-12-043-2/+17
| | | | | | | | | | | | | | | | Before, we would not break: int a = foo(/* trailing */); when the end of /* trailing */ was exactly the column limit; the reason is that block comments can have an unbreakable tail length - in this case 2, for the trailing ");"; we would unconditionally account that when calculating the column state at the end of the token, but not correctly add it into the remaining column length before, as we do for string literals. The fix is to correctly account the trailing unbreakable sequence length into our formatting decisions for block comments. Line comments cannot have a trailing unbreakable sequence, so no change is needed for them. llvm-svn: 319642
* [X86] Allow VPMAXUQ/VPMAXSQ/VPMINUQ/VPMINSQ to be used with 128/256 bit ↵Craig Topper2017-12-045-122/+338
| | | | | | | | vectors when AVX512 is enabled. These instructions can be used by widening to 512-bits and extracting back to 128/256. We do similar to several other instructions already. llvm-svn: 319641
* [X86] Don't turn UINT_TO_FP into SINT_TO_FP during lowering.Craig Topper2017-12-041-6/+0
| | | | | | We already do this as a DAG combine. The version during lowering can only trigger if known bits changes something that improves known bits analysis. But this means we should be improving known bits analysis to work on the unlowered form instead. llvm-svn: 319640
* [SelectionDAG] Teach computeKnownBits some improvements to ISD::SRL with a ↵Craig Topper2017-12-042-6/+25
| | | | | | | | | non-splat constant shift amount. If we have a non-splat constant shift amount, the minimum shift amount can be used to infer the number of zero upper bits of the result. There's probably a lot more that we can do here, but this fixes a case where I wanted to infer the sign bit as zero when all the shift amounts are non-zero. llvm-svn: 319639
* [analyzer] Don't treat lambda-captures float constexprs as undefinedDevin Coughlin2017-12-042-2/+19
| | | | | | | | | | | | | | RegionStore has special logic to evaluate captured constexpr variables. However, if the constexpr initializer cannot be evaluated as an integer, the value is treated as undefined. This leads to false positives when, for example, a constexpr float is captured by a lambda. To fix this, treat a constexpr capture that cannot be evaluated as unknown rather than undefined. rdar://problem/35784662 llvm-svn: 319638
* [X86][AVX512] Tag PH2PS/PS2PH conversion instructions scheduler classesSimon Pilgrim2017-12-031-25/+41
| | | | llvm-svn: 319637
* [X86][AVX512] Tag packed F2I/I2F/F2F conversion instructions scheduler classSimon Pilgrim2017-12-033-219/+249
| | | | llvm-svn: 319636
* [X86][AVX512] Regenerate schedule tests.Simon Pilgrim2017-12-031-10/+10
| | | | llvm-svn: 319635
* [X86][SSE] Remove unused IIC_SSE_CVT_PI2PS_RR/IIC_SSE_CVT_PI2PS_RM itinerariesSimon Pilgrim2017-12-031-2/+0
| | | | llvm-svn: 319634
* [ASTImporter] Add unit tests for UsingDecl and UsingShadowDeclAleksei Sidorin2017-12-031-0/+41
| | | | | | | | Patch by Kareem Khazem! Differential Revision: https://reviews.llvm.org/D27181 llvm-svn: 319632
* Corrected a typo in the building libc++ docsHamza Sood2017-12-031-1/+1
| | | | llvm-svn: 319631
* CodeGen: Fix SelectionDAGISel::LowerArguments for sret addr spaceYaxun Liu2017-12-032-15/+21
| | | | | | | | | | | SelectionDAGISel::LowerArguments assumes sret addr space is 0, which is not true for amdgcn---amdgiz target. This patch fixes that. Differential Revision: https://reviews.llvm.org/D40255 llvm-svn: 319630
* Revert "[CodeGen] Add initial support for union members in TBAA"Hal Finkel2017-12-036-175/+38
| | | | | | | | This reverts commit r319413. See PR35503. We can't use "union member" as the access type here like this. llvm-svn: 319629
* [SelectionDAG] Use the inlined APInt shift methods since we've already ↵Craig Topper2017-12-031-8/+11
| | | | | | | | bounds checked the shift. The version that takes APInt is out of line. The 'unsigned' version optimizes for the common case of single word APInts. llvm-svn: 319628
* Reland "[WebAssembly] Add support for visibility flag""Sam Clegg2017-12-0314-47/+105
| | | | | | | | Subscribers: jfb, dschuff, jgravelle-google, aheejin, sunfish Differential Revision: https://reviews.llvm.org/D40773 llvm-svn: 319627
* Reland "[WebAssembly] Add visibility flag to Wasm symbol flags""Sam Clegg2017-12-037-11/+56
| | | | | | | | | | Original change was rL319488. This was reverted rL319602 due to a gcc 7.1 warning. Differential Revision: https://reviews.llvm.org/D40772 llvm-svn: 319626
* Fix typo in emitted attribute nameMatt Arsenault2017-12-031-1/+1
| | | | | | | Fixes build when using this attribute combination on an intrinsic. llvm-svn: 319625
* [ValueTracking] Pass only a single lambda to ↵Craig Topper2017-12-021-37/+29
| | | | | | computeKnownBitsFromShiftOperator by using KnownBits struct instead of separate APInts. NFCI llvm-svn: 319624
* [WebAssembly] Pass through --undefined to Wasm LLDSam Clegg2017-12-021-0/+1
| | | | | | | | | | | This is a follow-on to D40724 (Wasm entrypoint changes #1, add `--undefined` argument to LLD). Patch by Nicholas Wilson Differential Revision: https://reviews.llvm.org/D40739 llvm-svn: 319623
* CodeGen: Fix pointer info in ↵Yaxun Liu2017-12-0215-72/+88
| | | | | | | | | | | | | | | | | | | | | SplitVecOp_EXTRACT_VECTOR_ELT/SplitVecRes_INSERT_VECTOR_ELT Two issues found when doing codegen for splitting vector with non-zero alloca addr space: DAGTypeLegalizer::SplitVecRes_INSERT_VECTOR_ELT/SplitVecOp_EXTRACT_VECTOR_ELT uses dummy pointer info for creating SDStore. Since one pointer operand contains multiply and add, InferPointerInfo is unable to infer the correct pointer info, which ends up with a dummy pointer info for the target to lower store and results in isel failure. The fix is to introduce MachinePointerInfo::getUnknownStack to represent MachinePointerInfo which is known in alloca address space but without other information. TargetLowering::getVectorElementPointer uses value type of pointer in addr space 0 for multiplication of index and then add it to the pointer. However the pointer may be in an addr space which has different size than addr space 0. The fix is to use the pointer value type for index multiplication. Differential Revision: https://reviews.llvm.org/D39758 llvm-svn: 319622
* Fix assume-filename handling in clang-format.elPhilipp Stephani2017-12-021-16/+29
| | | | | | | | | | | | | | | | | | | | | Summary: When 'buffer-file-name' is nil 'call-process-region' returned a segmentation fault error. This was a problem when using clang-format-buffer on an orgmode source code editing buffer. I fixed this problem by excluding the '-assume-filename' argument when 'buffer-file-name' is nil. To make it a bit more flexible I also added an optional argument, 'assume-file-name', to specify an assume-filename that overrides 'buffer-file-name'. Reviewers: klimek, djasper, phst, phi Reviewed By: phst, phi Subscribers: phi, jholewinski, mgorny, javed.absar, eraman, cfe-commits Differential Revision: https://reviews.llvm.org/D37903 llvm-svn: 319621
* [cmake] Re-commit: Remove redundant call to cmake when building host tools.Don Hinton2017-12-021-28/+15
| | | | | | | | | | | | | | | | | Also pass CMAKE_(C|CXX)_COMPILER to add_custom_command. Summary: Remove the redundant, config-time call to cmake when building host tools for cross compiles or optimized tablegen.. The config-time call to cmake is redundant because it will always get called again when the CONFIGURE_LLVM_${target_name} target fires at build-time. This speeds up initial configuration, but has no affect on build behavior. Differential Revision: https://reviews.llvm.org/D40229 llvm-svn: 319620
* [CodeGen] fix mapping from fmod calls to frem instructionSanjay Patel2017-12-023-32/+38
| | | | | | Similar to D40044 and discussed in D40594. llvm-svn: 319619
* [CodeGen] remove stale comment; NFCSanjay Patel2017-12-021-1/+1
| | | | | | | The libm functions with LLVM intrinsic twins were moved above this blob with: https://reviews.llvm.org/rL319593 llvm-svn: 319618
* [llvm-readobj] Remove redundant local variables to reduce the code. NFCSimon Atanasyan2017-12-021-9/+5
| | | | llvm-svn: 319617
* [llvm-readobj] Print static MIPS GOTSimon Atanasyan2017-12-023-31/+93
| | | | | | | | | | If a linked binary file contains a dynamic section, the GOT layout defined by the dynamic section entries. In a statically linked file the GOT is just a series of entries. This change teaches `llvm-readobj` to print the GOT in that case. That provides a feature parity with GNU `readelf`. llvm-svn: 319616
* [llvm-readobj] Delete unused method argument. NFCSimon Atanasyan2017-12-021-8/+9
| | | | llvm-svn: 319615
* [X86][SSE] Cleanup float/int conversion scheduler itinerary classesSimon Pilgrim2017-12-021-41/+79
| | | | | | Makes it easier to grok where each is supposed to be used, mainly useful for adding to the AVX512 instructions but hopefully can be used more in SSE/AVX as well. llvm-svn: 319614
* [X86] Fix copy paste mistake in test case for r319612.Craig Topper2017-12-021-1/+1
| | | | llvm-svn: 319613
* [X86] Teach the assembler to support %db8-%db15 as aliases for %dr8-%dr15.Craig Topper2017-12-022-13/+28
| | | | llvm-svn: 319612
* [X86] Support %dr8-%dr15 in the assembler.Craig Topper2017-12-022-1/+4
| | | | | | Apparently I failed to make this work when I fixed it in the disassembler way back in r224862. llvm-svn: 319611
* CMAKE: help CheckAtomic find check_library_existsMartell Malone2017-12-021-0/+1
| | | | | | | | | | | | | | | | | lldb fails to build standalone on x86 -- Performing Test HAVE_CXX_ATOMICS64_WITHOUT_LIB - Failed CMake Error at CheckAtomic.cmake:66 (check_library_exists): Unknown CMake command "check_library_exists". Call Stack (most recent call first): LLDBStandalone.cmake:90 (include) CMakeLists.txt:3 (include) Reviewed By: rnk Differential Revision: https://reviews.llvm.org/D40220 llvm-svn: 319610
* [ARC] Add instruction subset for the ARC backend.Tatyana Krasnukha2017-12-027-159/+1384
| | | | | | | | | | | | Reviewers: petecoup, kparzysz Reviewed By: petecoup Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D37983 llvm-svn: 319609
* [clangd] Avoid enum in bitfields, can't satisfy old GCC and new MSVCSam McCall2017-12-021-1/+5
| | | | llvm-svn: 319608
* [DAG][AArch64] Disable post-legalization storeNirav Dave2017-12-026-23/+29
| | | | | | | Disable post-legalization store for AArch64 backend which is causing errors out-of-tree. llvm-svn: 319607
* [clangd] Fix FuzzyMatch tests on windows, NFCSam McCall2017-12-022-5/+5
| | | | | | | | Without specifying the signedness of the underlying type for Action, packing it in a 1-bit field may restrict its range to [-1, 0] which can't represent Match. llvm-svn: 319606
* PR35456: Track definedness of variable template specializations separately fromRichard Smith2017-12-028-12/+35
| | | | | | | | | | whether they have an initializer. We cannot distinguish between a declaration of a variable template specialization and a definition of one that lacks an initializer without this, and would previously mistake the latter for the former. llvm-svn: 319605
* [clangd] Try to appease gcc constexpr bug (58541)Sam McCall2017-12-021-2/+2
| | | | llvm-svn: 319604
* [WebAssembly] Revert r319592 "Add support for visibility flag"Heejin Ahn2017-12-0214-105/+47
| | | | | | | | | r319488 reportedly broke one of LLVM bots (ubuntu-gcc7.1-werror), and this patch depends on that patch. See http://lab.llvm.org:8011/builders/ubuntu-gcc7.1-werror/builds/3369 for details. llvm-svn: 319603
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