| Commit message (Collapse) | Author | Age | Files | Lines |
| ... | |
| |
|
|
| |
llvm-svn: 157114
|
| |
|
|
|
|
| |
This makes DenseMap<..., TinyPtrVector<...>> as cheap as it always should've been!
llvm-svn: 157113
|
| |
|
|
|
|
| |
SwitchInst methods.
llvm-svn: 157112
|
| |
|
|
| |
llvm-svn: 157111
|
| |
|
|
|
|
| |
to evaluate an expression with no target.
llvm-svn: 157110
|
| |
|
|
| |
llvm-svn: 157109
|
| |
|
|
| |
llvm-svn: 157108
|
| |
|
|
| |
llvm-svn: 157107
|
| |
|
|
|
|
| |
This will remove the original def once it has no more uses.
llvm-svn: 157104
|
| |
|
|
|
|
|
|
|
|
|
| |
Remaining virtreg->physreg copies were rematerialized during
updateRegDefsUses(), but we already do the same thing in joinCopy() when
visiting the physreg copy instruction.
Eliminate the preserveSrcInt argument to reMaterializeTrivialDef(). It
is now always true.
llvm-svn: 157103
|
| |
|
|
|
|
|
| |
There is no need for these instructions to stick around since they are
known to be not dead.
llvm-svn: 157102
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Dead copies cause problems because they are trivial to coalesce, but
removing them gived the live range a dangling end point. This patch
enables full dead code elimination which trims live ranges to their uses
so end points don't dangle.
DCE may erase multiple instructions. Put the pointers in an ErasedInstrs
set so we never risk visiting erased instructions in the work list.
There isn't supposed to be any dead copies entering RegisterCoalescer,
but they do slip by as evidenced by test/CodeGen/X86/coalescer-dce.ll.
llvm-svn: 157101
|
| |
|
|
|
|
| |
The dead code elimination with callbacks is still useful.
llvm-svn: 157100
|
| |
|
|
|
|
|
| |
functions to the original declarations, so that Clang will actually
see them. Part of <rdar://problem/11489333>.
llvm-svn: 157097
|
| |
|
|
|
|
|
| |
the LOCK prefix to be printed explicitly when it's
the first prefix on the instruction.
llvm-svn: 157096
|
| |
|
|
|
|
|
|
| |
types and ensure we are actually creating the type.
rdar://11479676
llvm-svn: 157095
|
| |
|
|
|
|
|
|
| |
to generate out of the front end.
rdar://11479676
llvm-svn: 157094
|
| |
|
|
|
|
| |
Patch by Jack Carter.
llvm-svn: 157093
|
| |
|
|
|
|
|
|
|
|
| |
getUDivExpr attempts to simplify by checking for overflow.
isLoopEntryGuardedByCond then evaluates the loop predicate which
may lead to the same getUDivExpr causing endless recursion.
Fixes PR12868: clang 3.2 segmentation fault.
llvm-svn: 157092
|
| |
|
|
| |
llvm-svn: 157090
|
| |
|
|
| |
llvm-svn: 157089
|
| |
|
|
| |
llvm-svn: 157088
|
| |
|
|
|
|
| |
sure long strings would be correctly read when the buffer is too small for the string.
llvm-svn: 157087
|
| |
|
|
|
|
| |
accept the template argument expression as a type.
llvm-svn: 157085
|
| |
|
|
|
|
|
|
|
|
| |
set. As soon as a watchpoint is hit in either of the worker thread,
we delete the watchpoint. The test succeeds when no more watchpoint hit event fires after the deletion of the watchpoint.
related to rdar://problem/11320188
llvm-svn: 157084
|
| |
|
|
|
|
| |
from memory when they are in the shared cache: always read the symbol table strings from memory and let the process' memory cache do the work.
llvm-svn: 157083
|
| |
|
|
| |
llvm-svn: 157082
|
| |
|
|
| |
llvm-svn: 157081
|
| |
|
|
|
|
| |
when deleting them. rdar://11434915.
llvm-svn: 157080
|
| |
|
|
|
|
| |
No functional change.
llvm-svn: 157079
|
| |
|
|
|
|
| |
dSYM file is created from a binary with no debug info, that has been stripped, or when the .o files are not available when the dSYM is created.
llvm-svn: 157078
|
| |
|
|
|
|
| |
test suite for two architectures (the full path to d.c would appear).
llvm-svn: 157077
|
| |
|
|
|
|
| |
to match documentation. // rdar://11309706
llvm-svn: 157074
|
| |
|
|
|
|
| |
This will make it possible to filter out erased instructions later.
llvm-svn: 157073
|
| |
|
|
|
|
| |
same switch instruction by doing union of ranges (which may still be conservative, but it's more aggressive than before)
llvm-svn: 157071
|
| |
|
|
| |
llvm-svn: 157066
|
| |
|
|
|
|
| |
so in a less malloc-intensive way.
llvm-svn: 157064
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Use a dedicated MachO load command to annotate data-in-code regions.
This is the same format the linker produces for final executable images,
allowing consistency of representation and use of introspection tools
for both object and executable files.
Data-in-code regions are annotated via ".data_region"/".end_data_region"
directive pairs, with an optional region type.
data_region_directive := ".data_region" { region_type }
region_type := "jt8" | "jt16" | "jt32" | "jta32"
end_data_region_directive := ".end_data_region"
The previous handling of ARM-style "$d.*" labels was broken and has
been removed. Specifically, it didn't handle ARM vs. Thumb mode when
marking the end of the section.
rdar://11459456
llvm-svn: 157062
|
| |
|
|
| |
llvm-svn: 157061
|
| |
|
|
| |
llvm-svn: 157060
|
| |
|
|
|
|
|
|
|
| |
It is no longer necessary to separate VirtCopies, PhysCopies, and
ImpDefCopies. Implicitly defined copies are extremely rare after we
added the ProcessImplicitDefs pass, and physical register copies are not
joined any longer.
llvm-svn: 157059
|
| |
|
|
| |
llvm-svn: 157058
|
| |
|
|
|
|
| |
Patch by Jack Carter.
llvm-svn: 157057
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This has been disabled for a while, and it is not a feature we want to
support. Copies between physical and virtual registers are eliminated by
good hinting support in the register allocator. Joining virtual and
physical registers is really a form of register allocation, and the
coalescer is not properly equipped to do that. In particular, it cannot
backtrack coalescing decisions, and sometimes that would cause it to
create programs that were impossible to register allocate, by exhausting
a small register class.
It was also very difficult to keep track of the live ranges of aliasing
registers when extending the live range of a physreg. By disabling
physreg joining, we can let fixed physreg live ranges remain constant
throughout the register allocator super-pass.
One type of physreg joining remains: A virtual register that has a
single value which is a copy of a reserved register can be merged into
the reserved physreg. This always lowers register pressure, and since we
don't compute live ranges for reserved registers, there are no problems
with aliases.
llvm-svn: 157055
|
| |
|
|
| |
llvm-svn: 157054
|
| |
|
|
| |
llvm-svn: 157051
|
| |
|
|
| |
llvm-svn: 157050
|
| |
|
|
|
|
| |
Fixes http://llvm.org/bugs/show_bug.cgi?id=12867
llvm-svn: 157049
|
| |
|
|
| |
llvm-svn: 157048
|
| |
|
|
| |
llvm-svn: 157047
|