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* Add gdb pretty printers for a wide variety of libc++ data structures (take 2).Sterling Augustine2019-09-053-0/+1736
| | | | | | | | | | | | | | | | | Summary: This patch is an exact duplicate of https://reviews.llvm.org/D65609, except that it uses the newly introduced testing framework to detect if gdb is present so that the tests won't fail on machines without gdb. Reviewers: echristo, EricWF Subscribers: christof, ldionne, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D67238 llvm-svn: 371131
* Don't assume libcxx_gdb is always set.Sterling Augustine2019-09-051-2/+3
| | | | | | libc++abi also uses this file, but doesn't use the same CMakeLists.txt. llvm-svn: 371130
* [ADT] Add makeArrayRef(std::array<>) template specializationJan Korous2019-09-051-0/+6
| | | | llvm-svn: 371129
* [Bitstream] Add BitCodeAbbrev(std::initializer_list) constructorJan Korous2019-09-051-0/+5
| | | | llvm-svn: 371128
* Docs: Update Community section on homepageDeForest Richards2019-09-052-32/+41
| | | | | | This commit includes the following changes: Adds a Getting Involved section under Community. Moves the Development Process section under Community. Moves Sphinx Quickstart Template and How to submit an LLVM bug report from User Guides section to Getting Involved. llvm-svn: 371127
* [libcxx] Codesign test executables if necessaryVedant Kumar2019-09-055-11/+80
| | | | | | | | | If LLVM_CODESIGNING_IDENTITY is set, test executables need to be codesigned. Differential Revision: https://reviews.llvm.org/D66496 llvm-svn: 371126
* [GSYM][NFC] Fixed -Wdocumentation warningDavid Bolvansky2019-09-051-1/+0
| | | | | | lib/DebugInfo/GSYM/InlineInfo.cpp:68:12: warning: parameter 'Inline' not found in the function declaration [-Wdocumentation] llvm-svn: 371125
* Implement Microsoft-compatible mangling for decomposition declarations.Nico Weber2019-09-053-14/+30
| | | | | | | | | | | | | | | Match cl.exe's mangling for decomposition declarations. Decomposition declarations are considered to be anonymous structs, and use the same convention as for anonymous struct/union declarations. Naming confirmed to match https://godbolt.org/z/K2osJa Patch from Eric Astor <epastor@google.com>! Differential Revision: https://reviews.llvm.org/D67202 llvm-svn: 371124
* gn build: Merge r371121Nico Weber2019-09-051-0/+1
| | | | llvm-svn: 371123
* [Diagnostics] Minor improvements for -Wxor-used-as-powDavid Bolvansky2019-09-053-40/+88
| | | | | | Extracted from D66397; implemented suggestion for 2^64; tests revisited. llvm-svn: 371122
* [MIR] MIRNamer pass for improving MIR test authoring experience.Puyan Lotfi2019-09-055-0/+170
| | | | | | | | | | | This patch reuses the MIR vreg renamer from the MIRCanonicalizerPass to cleanup names of vregs in a MIR file for MIR test authors. I found it useful when writing a regression test for a globalisel failure I encountered recently and thought it might be useful for other folks as well. Differential Revision: https://reviews.llvm.org/D67209 llvm-svn: 371121
* Add testing infrastructure to check if gdb is available for testing.Sterling Augustine2019-09-053-1/+15
| | | | | | | | | | | | Reviewers: echristo, EricWF Subscribers: mgorny, christof, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D67194 llvm-svn: 371120
* gn build: Merge r371117Nico Weber2019-09-051-1/+0
| | | | llvm-svn: 371119
* [clang][Index] Replace CodegenNameGenerator with ASTNameGeneratorJan Korous2019-09-055-100/+11
| | | | | | | | Follow-up to: 3ff8c3b73f6, d5d15b4c1fd Should be NFC since the original patch just moved the code. llvm-svn: 371117
* [globalisel][knownbits] Account for missing type constraintsDaniel Sanders2019-09-052-2/+41
| | | | | | | | | | | | | Now that we look through copies, it's possible to visit registers that have a register class constraint but not a type constraint. Avoid looking through copies when this occurs as the SrcReg won't be able to determine it's bit width or any known bits. Along the same lines, if the initial query is on a register that doesn't have a type constraint then the result is a default-constructed KnownBits, that is, a 1-bit fully-unknown value. llvm-svn: 371116
* [globalisel][knownbits] Correct a typo that prevented a test working as intendedDaniel Sanders2019-09-051-1/+1
| | | | llvm-svn: 371115
* Recommit "[AArch64][GlobalISel] Teach AArch64CallLowering to handle basic ↵Jessica Paquette2019-09-056-8/+398
| | | | | | | | | | | | | | | | | | sibling calls" Recommit basic sibling call lowering (https://reviews.llvm.org/D67189) The issue was that if you have a return type other than void, call lowering will emit COPYs to get the return value after the call. Disallow sibling calls other than ones that return void for now. Also proactively disable swifterror tail calls for now, since there's a similar issue with COPYs there. Update call-translator-tail-call.ll to include test cases for each of these things. llvm-svn: 371114
* Revert: [DebugInfo] Add debug location to stubs generated by CGDeclCXX and ↵Alexandre Ganea2019-09-057-75/+20
| | | | | | mark them as artificial llvm-svn: 371113
* [AST][NFC] Doc comments for ASTNameGeneratorJan Korous2019-09-051-0/+8
| | | | llvm-svn: 371112
* [IfConversion] Fix diamond conversion with unanalyzable branches.Eli Friedman2019-09-052-2/+66
| | | | | | | | | | | | | | | | | | The code was incorrectly counting the number of identical instructions, and therefore tried to predicate an instruction which should not have been predicated. This could have various effects: a compiler crash, an assembler failure, a miscompile, or just generating an extra, unnecessary instruction. Instead of depending on TargetInstrInfo::removeBranch, which only works on analyzable branches, just remove all branch instructions. Fixes https://bugs.llvm.org/show_bug.cgi?id=43121 and https://bugs.llvm.org/show_bug.cgi?id=41121 . Differential Revision: https://reviews.llvm.org/D67203 llvm-svn: 371111
* doc update: explain that Z3 is only for clang SA - thanks to LebedevRI for ↵Sylvestre Ledru2019-09-051-2/+2
| | | | | | the suggestion llvm-svn: 371110
* document the LLVM_ENABLE_Z3_SOLVER optionSylvestre Ledru2019-09-051-0/+4
| | | | llvm-svn: 371109
* [NFC][InstCombine] Overhaul 'unsigned add overflow' tests, ensure that all 3 ↵Roman Lebedev2019-09-056-8/+854
| | | | | | patterns have full test coverage llvm-svn: 371108
* [X86] Enable BuildSDIVPow2 for i16.Craig Topper2019-09-053-20/+19
| | | | | | | We're able to use a 32-bit ADD and CMOV here and should work well with our other i16->i32 promotion optimizations. llvm-svn: 371107
* [Remarks] Don't serialize metadata if a string table is not usedFrancis Visoiu Mistrih2019-09-053-22/+82
| | | | | | | For YAML remarks with no string table, the mode should not affect the output. llvm-svn: 371106
* gn build: Merge r371103Nico Weber2019-09-051-0/+1
| | | | llvm-svn: 371105
* [X86] Override BuildSDIVPow2 for X86.Craig Topper2019-09-056-56/+104
| | | | | | | | | | | | | | | | | | | | | | | As noted in PR43197, we can use test+add+cmov+sra to implement signed division by a power of 2. This is based off the similar version in AArch64, but I've adjusted it to use target independent nodes where AArch64 uses target specific CMP and CSEL nodes. I've also blocked INT_MIN as the transform isn't valid for that. I've limited this to i32 and i64 on 64-bit targets for now and only when CMOV is supported. i8 and i16 need further investigation to be sure they get promoted to i32 well. I adjusted a few tests to enable cmov to demonstrate the new codegen. I also changed twoaddr-coalesce-3.ll to 32-bit mode without cmov to avoid perturbing the scenario that is being set up there. Differential Revision: https://reviews.llvm.org/D67087 llvm-svn: 371104
* [Support] Add writeFileAtomically() to FileUtilitiesJan Korous2019-09-054-0/+95
| | | | | | Differential Revision: https://reviews.llvm.org/D66859 llvm-svn: 371103
* gn build: (manually) merge r358706Nico Weber2019-09-051-18/+24
| | | | llvm-svn: 371102
* [InstCombine] foldICmpBinOp(): consider inverted check in 'unsigned sub ↵Roman Lebedev2019-09-053-16/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | overflow' check A follow-up for r329011. This may be changed to produce @llvm.sub.with.overflow in a later patch, but for now just make things more consistent overall. A few observations stem from this: * There does not seem to be a similar one-instruction fold for uadd-overflow * I'm not sure we'll want to canonicalize `B u> A` as `usub.with.overflow`, so since the `icmp` here no longer refers to `sub`, reconstructing `usub.with.overflow` will be problematic, and will likely require standalone pass (similar to DivRemPairs). https://rise4fun.com/Alive/Zqs Name: (A - B) u> A --> B u> A %t0 = sub i8 %A, %B %r = icmp ugt i8 %t0, %A => %r = icmp ugt i8 %B, %A Name: (A - B) u<= A --> B u<= A %t0 = sub i8 %A, %B %r = icmp ule i8 %t0, %A => %r = icmp ule i8 %B, %A Name: C u< (C - D) --> C u< D %t0 = sub i8 %C, %D %r = icmp ult i8 %C, %t0 => %r = icmp ult i8 %C, %D Name: C u>= (C - D) --> C u>= D %t0 = sub i8 %C, %D %r = icmp uge i8 %C, %t0 => %r = icmp uge i8 %C, %D llvm-svn: 371101
* [InstCombine] foldICmpBinOp(): consider inverted check in 'unsigned add ↵Roman Lebedev2019-09-052-16/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | overflow' check A follow-up for r342004. This will be changed to produce @llvm.add.with.overflow in a later patch, but for now just make things more consistent overall. https://rise4fun.com/Alive/qxE Name: (Op1 + X) u< Op1 --> ~Op1 u< X %t0 = add i8 %Op1, %X %r = icmp ult i8 %t0, %Op1 => %n = xor i8 %Op1, -1 %r = icmp ult i8 %n, %X Name: (Op1 + X) u>= Op1 --> ~Op1 u>= X %t0 = add i8 %Op1, %X %r = icmp uge i8 %t0, %Op1 => %n = xor i8 %Op1, -1 %r = icmp uge i8 %n, %X ;------------------------------------------------------------------------------- Name: Op0 u> (Op0 + X) --> X u> ~Op0 %t0 = add i8 %Op0, %X %r = icmp ugt i8 %Op0, %t0 => %n = xor i8 %Op0, -1 %r = icmp ugt i8 %X, %n Name: Op0 u<= (Op0 + X) --> X u<= ~Op0 %t0 = add i8 %Op0, %X %r = icmp ule i8 %Op0, %t0 => %n = xor i8 %Op0, -1 %r = icmp ule i8 %X, %n llvm-svn: 371100
* [InstCombine][NFC] Tests for 'unsigned sub overflow' checkRoman Lebedev2019-09-052-0/+313
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | ---------------------------------------- Name: unsigned sub, overflow, v0 %sub = sub i8 %x, %y %ov = icmp ugt i8 %sub, %x => %agg = usub_overflow i8 %x, %y %sub = extractvalue {i8, i1} %agg, 0 %ov = extractvalue {i8, i1} %agg, 1 Done: 1 Optimization is correct! ---------------------------------------- Name: unsigned sub, no overflow, v0 %sub = sub i8 %x, %y %ov = icmp ule i8 %sub, %x => %agg = usub_overflow i8 %x, %y %sub = extractvalue {i8, i1} %agg, 0 %not.ov = extractvalue {i8, i1} %agg, 1 %ov = xor %not.ov, -1 Done: 1 Optimization is correct! llvm-svn: 371099
* [InstCombine][NFC] Tests for 'unsigned add overflow' checkRoman Lebedev2019-09-052-0/+398
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ---------------------------------------- Name: unsigned add, overflow, v0 %add = add i8 %x, %y %ov = icmp ult i8 %add, %x => %agg = uadd_overflow i8 %x, %y %add = extractvalue {i8, i1} %agg, 0 %ov = extractvalue {i8, i1} %agg, 1 Done: 1 Optimization is correct! ---------------------------------------- Name: unsigned add, overflow, v1 %add = add i8 %x, %y %ov = icmp ult i8 %add, %y => %agg = uadd_overflow i8 %x, %y %add = extractvalue {i8, i1} %agg, 0 %ov = extractvalue {i8, i1} %agg, 1 Done: 1 Optimization is correct! ---------------------------------------- Name: unsigned add, no overflow, v0 %add = add i8 %x, %y %ov = icmp uge i8 %add, %x => %agg = uadd_overflow i8 %x, %y %add = extractvalue {i8, i1} %agg, 0 %not.ov = extractvalue {i8, i1} %agg, 1 %ov = xor %not.ov, -1 Done: 1 Optimization is correct! ---------------------------------------- Name: unsigned add, no overflow, v1 %add = add i8 %x, %y %ov = icmp uge i8 %add, %y => %agg = uadd_overflow i8 %x, %y %add = extractvalue {i8, i1} %agg, 0 %not.ov = extractvalue {i8, i1} %agg, 1 %ov = xor %not.ov, -1 Done: 1 Optimization is correct! llvm-svn: 371098
* [TextAPI] update interface file for filtered iterCyndy Ishida2019-09-051-71/+22
| | | | | | | | | | | | | | | | | | Summary: This is a simple change that allows easy iterator semantics for symbols held in interface file. Not being used, so harmless change right now, but will be once TBD-v4 is submitted. Reviewers: ributzka, steven_wu Reviewed By: ributzka Subscribers: javed.absar, kristof.beyls, dexonsmith, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D67204 llvm-svn: 371097
* Docs: Move Documentation sections to separate pages.DeForest Richards2019-09-054-415/+433
| | | | | | Updates the links on the homepage by moving the User Guides, Programming Documentation, and Subsystem Documentation sections to separate pages. Also changes "Overview" to "About" at the top of the LLVM Docs homepage. This work is part of the Google Season of Docs project. llvm-svn: 371096
* [x86] fix horizontal math bug exposed by improved demanded elements analysis ↵Sanjay Patel2019-09-052-8/+27
| | | | | | | | (PR43225) https://bugs.llvm.org/show_bug.cgi?id=43225 llvm-svn: 371095
* [X86] Add a FIXME about why the CWD/CDQ/CQO have a bogus implicit def of the ↵Craig Topper2019-09-051-6/+5
| | | | | | | | | A register. NFC The instructions copy the sign bit of the A register to every bit of the D register. But they don't write to the A register. llvm-svn: 371094
* [X86] Remove unneeded CHECK lines from a test. NFCCraig Topper2019-09-051-250/+0
| | | | llvm-svn: 371093
* [X86] Fix stale comment. NFCCraig Topper2019-09-051-2/+2
| | | | | | | We aren't checking for a concat here. We're just always splitting 256-bit stores. llvm-svn: 371092
* gn build: (manually) merge r371003Nico Weber2019-09-051-0/+3
| | | | llvm-svn: 371091
* Fix windows-x86-debug compilation with python enabled using multi-target ↵Adrian McCarthy2019-09-051-40/+92
| | | | | | | | | | | | | | | generator [Patch by Leonid Mashinskiy] Visual Studio CMake generator is multi-target and does not define CMAKE_BUILD_TYPE, so Debug build on VS was failing due selection of release python library. This patch reverts back some of latest changes and fixes building by raw VS using CMake expression generators. Differential Revision: https://reviews.llvm.org/D66994 llvm-svn: 371090
* [MergedLoadStoreMotion] Sink stores to BB with more than 2 predecessorsDenis Bakhvalov2019-09-056-72/+235
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If we have: bb5: br i1 %arg3, label %bb6, label %bb7 bb6: %tmp = getelementptr inbounds i32, i32* %arg1, i64 2 store i32 3, i32* %tmp, align 4 br label %bb9 bb7: %tmp8 = getelementptr inbounds i32, i32* %arg1, i64 2 store i32 3, i32* %tmp8, align 4 br label %bb9 bb9: ; preds = %bb4, %bb6, %bb7 ... We can't sink stores directly into bb9. This patch creates new BB that is successor of %bb6 and %bb7 and sinks stores into that block. SplitFooterBB is the parameter to the pass that controls that behavior. Change-Id: I7fdf50a772b84633e4b1b860e905bf7e3e29940f Differential: https://reviews.llvm.org/D66234 llvm-svn: 371089
* [x86] add test for horizontal math bug (PR43225); NFCSanjay Patel2019-09-051-0/+26
| | | | llvm-svn: 371088
* [MemorySSA] Verify MSSAUpdater exists.Alina Sbirlea2019-09-051-1/+2
| | | | llvm-svn: 371087
* [PGO][CHR] Speed up following long, interlinked use-def chains.Hiroshi Yamauchi2019-09-052-5/+165
| | | | | | | | | | | | | | | | | | | Summary: Avoid visiting an instruction more than once by using a map. This is similar to https://reviews.llvm.org/rL361416. Reviewers: davidxl Reviewed By: davidxl Subscribers: llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D67198 llvm-svn: 371086
* [ELF] Initialize PhdrEntry::p_align to maxPageSize for PT_LOADFangrui Song2019-09-052-10/+8
| | | | | | | | | | | | | | | | | | | | | ``` Writer<ELFT>::run assignFileOffsets setFileOffset computeFileOffset os->ptLoad->p_align may be smaller than config->maxPageSize setPhdrs p_align = max(p_align, config->maxPageSize) ``` If we move the config->maxPageSize logic to the constructor of PhdrEntry, computeFileOffset can be simplified. Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D67211 llvm-svn: 371085
* [MemorySSA] Update MemorySSA when removing debug.value calls.Alina Sbirlea2019-09-052-1/+47
| | | | llvm-svn: 371084
* [Hexagon] Fix type in HexagonTargetLowering::ReplaceNodeResultsKrzysztof Parzyszek2019-09-052-1/+20
| | | | llvm-svn: 371083
* [Alignment][NFC] Change internal representation of TargetLowering.hGuillaume Chatelet2019-09-052-16/+12
| | | | | | | | | | | | | | | | | Summary: This is patch is part of a series to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Reviewers: courbet Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D67226 llvm-svn: 371082
* [clangd] Initialize int field to zero. NFCIlya Biryukov2019-09-051-1/+1
| | | | | | To make sure we do not have uninitialized values and undefined behavior. llvm-svn: 371081
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