| Commit message (Collapse) | Author | Age | Files | Lines |
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R_X86_64_DTPOFF64 relocs are for the dynamic linker.
Static linkers create them but don't consume them.
llvm-svn: 259679
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Reviewers: Chris Lattner
Subscribers: cfe-dev
llvm-svn: 259678
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a cast expression is not the operand of a cast expression itself, so if it's
parenthesized we need to form a ParenExpr not a ParenListExpr.
llvm-svn: 259677
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Add support for TLS access for Windows on ARM. This generates a similar access
to MSVC for ARM.
The changes to the tablegen data is needed to support loading an external symbol
global that is not for a call. The adjustments to the DAG to DAG transforms are
needed to preserve the 32-bit move.
llvm-svn: 259676
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llvm-svn: 259675
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According to git bisect, this is the root cause of a miscompile for Regex in
libLLVMSupport. I am still working on reducing a test case.
The actual bug may be elsewhere and this commit just exposed it.
Anyway, at the moment, to reproduce, follow these steps:
1. Build clang and libLTO in release mode.
2. Create a new build directory <stage2> and cd into it.
3. Use clang and libLTO from #1 to build llvm-extract in Release mode + asserts
using -O2 -flto
4. Run llvm-extract -ralias '.*bar' -S test/Other/extract-alias.ll
Result:
program doesn't contain global named '.*bar'!
Expected result:
@a0a0bar = alias void ()* @bar
@a0bar = alias void ()* @bar
declare void @bar()
Note: In step #3, if you don't use lto or asserts, the miscompile disappears.
llvm-svn: 259674
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Recommited, after some fixing with test cases.
Updated test cases:
test/CodeGen/AArch64/arm64-misched-memdep-bug.ll
test/CodeGen/AArch64/tailcall_misched_graph.ll
Temporarily disabled test cases:
test/CodeGen/AMDGPU/split-vector-memoperand-offsets.ll
test/CodeGen/PowerPC/ppc64-fastcc.ll (partially updated)
test/CodeGen/PowerPC/vsx-fma-m.ll
test/CodeGen/PowerPC/vsx-fma-sp.ll
http://reviews.llvm.org/D8705
Reviewers: Hal Finkel, Andy Trick.
llvm-svn: 259673
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llvm-svn: 259672
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Follow the naming convention that bswap uses since it's a
similar sort of operation.
llvm-svn: 259671
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Before:
int i = aaaaaaaaaaaaaaaaaaaaaaaaaaaaaa ?
/*bbbbbbbbbbbbbbbbbbbb=*/bbbbbbbbbbbbbbbbbbbbbbbbb :
ccccccccccccccccccccccccccc;
After:
int i = aaaaaaaaaaaaaaaaaaaaaaaaaaaaaa ?
/*bbbbbbbbbbbbbbbbbbbb=*/bbbbbbbbbbbbbbbbbbbbbbbbb :
ccccccccccccccccccccccccccc;
llvm-svn: 259670
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On some Windows environment, this test did not fail, because opening NUL
with FileOutputBuffer didn't fail. Thanks to George Rimar for reporting.
llvm-svn: 259669
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Summary:
The crash is caused by triggering a Assertion failed in DeclCXX.h when the
check detects non-defined class return type in a class method declaration.
Reviewers: congliu, alexfh
Subscribers: cfe-commits
Differential Revision: http://reviews.llvm.org/D16854
llvm-svn: 259668
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These files are standalone and not integrated with CMake, so we probably want them.
llvm-svn: 259667
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Summary:
Use an early return to reduce indentation.
Remove unused local.
Reviewers: dblaikie, lhames
Subscribers: lhames, llvm-commits
Differential Revision: http://reviews.llvm.org/D16513
llvm-svn: 259663
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Current SCEV expansion will expand SCEV as a sequence of operations
and doesn't utilize the value already existed. This will introduce
redundent computation which may not be cleaned up throughly by
following optimizations.
This patch introduces an ExprValueMap which is a map from SCEV to the
set of equal values with the same SCEV. When a SCEV is expanded, the
set of values is checked and reused whenever possible before generating
a sequence of operations.
Differential Revision: http://reviews.llvm.org/D12090
llvm-svn: 259662
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llvm-svn: 259660
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Contributed-by: Jack Howarth <howarthjw@gmail.com>
llvm-svn: 259659
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We remove information for older versions of Polly and also shorten the overall
text. This should make it a lot easier for people to get to the important code
wight away.
llvm-svn: 259658
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The GNU toolchain emits __aeabi_divmod for soft-divide on ARM cores
which happens to be a lot faster than __divsi3/__modsi3 when the core
has hardware divide instructions. Do the same here.
Fixes PR26450.
llvm-svn: 259657
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Reviewers: MatzeB, qcolombet, jmolloy, mcrosier
Subscribers: llvm-commits, mcrosier
Differential Revision: http://reviews.llvm.org/D16806
llvm-svn: 259656
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llvm-svn: 259655
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Summary:
This patch adds parsing + sema for the target parallel for directive along with testcases.
Reviewers: ABataev
Differential Revision: http://reviews.llvm.org/D16759
llvm-svn: 259654
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llvm-svn: 259653
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Patch by Alexander Riccio.
llvm-svn: 259652
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This patch adds the reserved operator ^^ when compiling for OpenCL (spec v1.1 s6.3.g),
which results in a more meaningful error message.
Patch by Neil Hickey!
Review: http://reviews.llvm.org/D13280
M test/SemaOpenCL/unsupported.cl
M include/clang/Basic/TokenKinds.def
M include/clang/Basic/DiagnosticParseKinds.td
M lib/Basic/OperatorPrecedence.cpp
M lib/Lex/Lexer.cpp
M lib/Parse/ParseExpr.cpp
llvm-svn: 259651
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llvm-svn: 259650
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This regresses a test in LoopVectorize, so I'll need to go away and think about how to solve this in a way that isn't broken.
From the writeup in PR26071:
What's happening is that ComputeKnownZeroes is telling us that all bits except the LSB are zero. We're then deciding that only the LSB needs to be demanded from the icmp's inputs.
This is where we're wrong - we're assuming that after simplification the bits that were known zero will continue to be known zero. But they're not - during trivialization the upper bits get changed (because an XOR isn't shrunk), so the icmp fails.
The fault is in demandedbits - its contract does clearly state that a non-demanded bit may either be zero or one.
llvm-svn: 259649
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llvm-svn: 259648
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llvm-svn: 259647
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displaying progress
-analyzer-display progress option prints only function names which may be ambiguous. This patch forces AnalysisConsumer to print fully-qualified function names.
Patch by Alex Sidorin!
Differential Revision: http://reviews.llvm.org/D16804
llvm-svn: 259646
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Simple fix - Constant values were not being sign extended in FastIsel.
llvm-svn: 259645
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Runtimes should be able to pass custom compilation options to the JIT for their stack frame. This patch adds a custom expression options member class to LanguageOptions, and modifies the clang expression evaluator to check the current runtime for those options. If those options are available on the runtime, they are passed to the clang compiler.
Committed for Luke Drummond.
Differential Revision: http://reviews.llvm.org/D15527
llvm-svn: 259644
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`misc-definitions-in-headers` check.
Reviewers: alexfh
Subscribers: cfe-commits
Differential Revision: http://reviews.llvm.org/D16578
llvm-svn: 259643
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This decorator was used in only one test, and it's behaviour was quite complicated. It skipped
if:
- test was remote
- platform was *not* android
I am not aware of anyone running tests with this configuration (and even then, I am not aware of
a reason why the test should not pass), but if TestLoadUnload starts breaking for you after this
commit, please disable the test with
@expectedFailureAll(remote=True, oslist=[YOUR_PLATFORM])
llvm-svn: 259642
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MIPS ABI states that .sbss and .sdata sections must have SHF_MIPS_GPREL
flag. See Figure 4–7 on page 69 in the following document:
ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf.
Differential Revision: http://reviews.llvm.org/D15740
llvm-svn: 259641
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No functional changes intended as we should already do the
corresponding fixes when visiting the primary template. There are
existing tests that verify that we do change unused parameters of
templated functions.
llvm-svn: 259640
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Defined the new AVX512 registers in clang inline asm.
Fixed a bug in the MC subtarget info creation during the parsing of MS asm statement - now it receives the actual CPU and target features information.
Differential Revision: http://reviews.llvm.org/D16757
llvm-svn: 259639
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65535 is still a valid port. This should fix the android failures we were getting when we chose
to connect over 65535 to the remote lldb-server.
llvm-svn: 259638
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llvm-svn: 259637
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Summary:
This adds a new attribute which targets can set in TableGen which causes a function to be generated which matches register alternative names. This is very similar to `ShouldEmitMatchRegisterName`, except it works on alt names.
This patch is currently used by the out of tree part of the AVR backend. It reduces code duplication greatly, and has the effect that you do not need to hardcode altname to register mappings in C++.
It will not work on targets which have registers which share the same aliases.
Reviewers: stoklund, arsenm, dsanders, hfinkel, vkalintiris
Subscribers: hfinkel, dylanmckay, llvm-commits
Differential Revision: http://reviews.llvm.org/D16312
llvm-svn: 259636
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EltsFromConsecutiveLoads
Follow up to D16217 and D16729
This change uncovered an odd pattern where VZEXT_LOAD v4i64 was being lowered to a load of the lower v2i64 (so the 2nd i64 destination element wasn't being zeroed), I can't find any use/reason for this and have removed the pattern and replaced it so only the 1st i64 element is loaded and the upper bits all zeroed. This matches the description for X86ISD::VZEXT_LOAD
Differential Revision: http://reviews.llvm.org/D16768
llvm-svn: 259635
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A DWARF language vender extension for RenderScript was added to LLVM in r259348(http://reviews.llvm.org/D16409)
We should use this generated enum instead of the hardcoded value.
RenderScript is also based on C99 with some extensions, so we want to use ClangASTContext when RS is detected.
Reviewers: clayborg
Subscribers: lldb-commits
Differential Revision: http://reviews.llvm.org/D16766
llvm-svn: 259634
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llvm-svn: 259633
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llvm-svn: 259632
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llvm-svn: 259631
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llvm-svn: 259630
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This reverts commit (@259587). It needs some further discussions.
llvm-svn: 259629
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Before:
enum?: string
[];
After:
enum?: string[];
llvm-svn: 259628
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llvm-svn: 259627
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With this patch, the profile summary data will be available in indexed
profile data file so that profiler reader/compiler optimizer can start
to make use of.
Differential Revision: http://reviews.llvm.org/D16258
llvm-svn: 259626
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