| Commit message (Collapse) | Author | Age | Files | Lines |
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llvm-svn: 163296
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llvm-svn: 163295
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llvm-svn: 163294
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lowering and patterns. This makes it consistent with the incoming DAG nodes from the DAG builder.
llvm-svn: 163293
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of a 256-bit vector to VMOVAPSmr/VMOVUPSmr.
llvm-svn: 163292
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llvm-svn: 163291
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This reverts commit 163278.
Works OK on x86_64, but not i386. Will re-enable when that's cleared up.
llvm-svn: 163290
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llvm-svn: 163289
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llvm-svn: 163288
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assembler such as shifts greater than 32. In the case
of direct object, the code gen needs to do this lowering
since the assembler is not involved.
With the advent of the llvm-mc assembler, it also needs
to do the same lowering.
This patch makes that specific lowering code accessible
to both the direct object output and the assembler.
This patch does not affect generated output.
llvm-svn: 163287
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Caught by Kurt Arnlund!
llvm-svn: 163286
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only accept the first matching type based on lldb's sizeofs.
<rdar://problem/12222109>
llvm-svn: 163285
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which can conflict with accurate crash reporting
in multithreaded contexts.
llvm-svn: 163282
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don't trample over the caller's LookupResult in the case where the check fails.
llvm-svn: 163281
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No functional change.
llvm-svn: 163279
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llvm-svn: 163278
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Test case included.
Contributer: Vladimir Medic
llvm-svn: 163277
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llvm-svn: 163276
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These pseudos are no longer needed now that it is possible to represent
predicated instructions in SSA form.
llvm-svn: 163275
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Now that it is possible to dynamically tie MachineInstr operands,
predicated instructions are possible in SSA form:
%vreg3<def> = SUBri %vreg1, -2147483647, pred:14, pred:%noreg, %opt:%noreg
%vreg4<def,tied1> = MOVCCr %vreg3<tied0>, %vreg1, %pred:12, pred:%CPSR
Becomes a predicated SUBri with a tied imp-use:
SUBri %vreg1, -2147483647, pred:13, pred:%CPSR, opt:%noreg, %vreg1<imp-use,tied0>
This means that any instruction that is safe to move can be folded into
a MOVCC, and the *CC pseudo-instructions are no longer needed.
The test case changes reflect that Thumb2SizeReduce recognizes the
predicated instructions. It didn't understand the pseudos.
llvm-svn: 163274
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llvm-svn: 163273
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llvm-svn: 163272
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every relocation in C++ hello world built with debug info.
llvm-svn: 163271
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switch, make sure we include the value for the cases when calculating edge
value from switch to the default destination.
rdar://12241132
llvm-svn: 163270
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As per Jordan's suggestion. (Came out of code review for r163261.)
llvm-svn: 163269
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register support. Test case included.
Contributer: Vladimir Medic
llvm-svn: 163268
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...and hopefully unbreak buildbots. My apologies!
llvm-svn: 163267
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These types are defined differently on 32-bit and 64-bit platforms, and
trying to offer a fixit for one platform would only mess up the format
string for the other. The Apple-recommended solution is to cast to a type
that is known to be large enough and always use that to print the value.
This should only have an impact on compile time if the format string is
incorrect; in cases where the format string matches the definition on the
current platform, no warning will be emitted.
<rdar://problem/9135072&12164284>
llvm-svn: 163266
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No functionality change.
llvm-svn: 163265
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While destructors will continue to not be inlined (unless the analyzer
config option 'c++-inlining' is set to 'destructors'), leaving them out
of the CFG is an incomplete model of the behavior of an object, and
can cause false positive warnings (like PR13751, now working).
Destructors for temporaries are still not on by default, since
(a) we haven't actually checked this code to be sure it's fully correct
(in particular, we probably need to be very careful with regard to
lifetime-extension when a temporary is bound to a reference,
C++11 [class.temporary]p5), and
(b) ExprEngine doesn't actually do anything when it sees a temporary
destructor in the CFG -- not even invalidate the object region.
To enable temporary destructors, set the 'cfg-temporary-dtors' analyzer
config option to '1'. The old -cfg-add-implicit-dtors cc1 option, which
controlled all implicit destructors, has been removed.
llvm-svn: 163264
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llvm-svn: 163263
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llvm-svn: 163262
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If a region is binded to a symbolic value, we should track the symbol.
(The code I changed was not previously exercised by the regression
tests.)
llvm-svn: 163261
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This region is set as interesting as part of trackNullOrUndefValue call,
no need to mark it as interesting twice.
llvm-svn: 163260
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Fixed an issue where we didn't parse N_SO stab pairs where the first N_SO was a relative path.
llvm-svn: 163259
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llvm-svn: 163258
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MachineInstr.
llvm-svn: 163257
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llvm-svn: 163256
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ArchiveMemberHeader. Found by gcc48 -Wcast-qual.
llvm-svn: 163255
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of its constness. Found by gcc48 -Wcast-qual.
llvm-svn: 163254
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llvm-svn: 163253
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llvm-svn: 163252
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the SubtargetInfoKV tables. Found by gcc48 -Wcast-qual.
llvm-svn: 163251
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llvm-svn: 163250
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Patch by Brooks Davis.
llvm-svn: 163249
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When the vendor and OS are not specified in a triple, only let unspecified vendor and OS fields matchs for the current host platform.
llvm-svn: 163248
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by casting. Found with gcc48.
llvm-svn: 163247
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llvm-svn: 163246
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llvm-svn: 163245
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callback gets a chance to run.
If the stopped event comes in with the Restarted bit set, don't try to hand that to the plans, but just return ShouldStop = false. There's nothing useful the plans can do, since the target is already running.
llvm-svn: 163244
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