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* [PowerPC] Use the two-constant NR algorithm for refining estimatesNemanja Ivanovic2019-05-078-49/+53
| | | | | | | | | | | | The single-constant algorithm produces infinities on a lot of denormal values. The precision of the two-constant algorithm is actually sufficient across the range of denormals. We will switch to that algorithm for now to avoid the infinities on denormals. In the future, we will re-evaluate the algorithm to find the optimal one for PowerPC. Differential revision: https://reviews.llvm.org/D60037 llvm-svn: 360144
* [llvm-objdump] - Print relocation record in a GNU format.George Rimar2019-05-0716-46/+99
| | | | | | | | | | | | | | | This fixes the https://bugs.llvm.org/show_bug.cgi?id=41355. Previously with -r we printed relocation section name instead of the target section name. It was like this: "RELOCATION RECORDS FOR [.rel.text]" Now it is: "RELOCATION RECORDS FOR [.text]" Also when relocation target section has more than one relocation section, we did not combine the output. Now we do. Differential revision: https://reviews.llvm.org/D61312 llvm-svn: 360143
* minor cmake formatting style fixNico Weber2019-05-071-1/+3
| | | | llvm-svn: 360142
* gn build: Merge r360116Nico Weber2019-05-072-0/+2
| | | | llvm-svn: 360141
* gn build: Run `git ls-files '*.gn' '*.gni' | xargs llvm/utils/gn/gn.py format`Nico Weber2019-05-073-12/+13
| | | | llvm-svn: 360140
* [LLD][ELF] - Remove symbol-name-offset.elf binary from test cases.George Rimar2019-05-073-7/+15
| | | | | | | It was possible to convert the test case to YAML test. After that, we have only one binary test left in LLD/ELF. llvm-svn: 360139
* [llvm-exegesis] BenchmarkRunner::runConfiguration(): write small snippet to ↵Roman Lebedev2019-05-071-7/+6
| | | | | | | | | | | | | memory It was previously writing this temporary snippet to file, then reading it back, but leaving the tmp file in place. This is both unefficient, and results in huge garbage pileup in /tmp. One would have thought it would have been caught during D60317.. llvm-svn: 360138
* [yaml2obj] - Allow setting st_value explicitly for Symbol.George Rimar2019-05-074-50/+96
| | | | | | | | | | In some cases it is useful to explicitly set symbol's st_name value. For example, I am using it in a patch for LLD to remove the broken binary from a test case and replace it with a YAML test. Differential revision: https://reviews.llvm.org/D61180 llvm-svn: 360137
* Revert "[TableGen] Fix a typo"Krasimir Georgiev2019-05-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Summary: This reverts commit r360106. The revisioin causes llvm-tblgen to hang while generating info for RISCV.td. The root cause might be in the RISCV.td definition but I don't know enough about this to investigate further. Command that starts hangning after r360106: `llvm-build/bin/llvm-tblgen -I llvm/include -I llvm/tools/clang/include -I llvm/lib/Target/RISCV -gen-instr-info llvm/lib/Target/RISCV/RISCV.td` Reviewers: sammccall, yan_luo, craig.topper, gribozavr Reviewed By: gribozavr Subscribers: PkmX, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D61632 llvm-svn: 360136
* [ARM GlobalISel] Widen G_SELECT operandsDiana Picus2019-05-072-2/+74
| | | | | | ...except for the condition operand. llvm-svn: 360135
* [X86][AVX] Fold concat(packus(),packus()) -> packus(concat(),concat()) (PR34773)Simon Pilgrim2019-05-078-92/+106
| | | | | | Basic "revectorization" combine, we can probably do more opcodes here but it can be a tricky cost-benefit depending on where the subvectors came from - but this case helps shuffle combining. llvm-svn: 360134
* Fixed "Value stored to 'Opc' is never read" warning. NFCI.Simon Pilgrim2019-05-071-1/+1
| | | | llvm-svn: 360133
* [ASTImporter] Import TemplateParameterLists in function templates.Balazs Keri2019-05-072-0/+39
| | | | | | | | | | | | | | | | Summary: Correct missing import of TemplateParameterList in function decl. Reviewers: martong, a.sidorin, shafik Reviewed By: martong Subscribers: rnkovacs, dkrupp, Szelethus, gamesh411, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D60461 llvm-svn: 360132
* [X86] Reduce scope of variables where possible. NFCI.Simon Pilgrim2019-05-073-10/+4
| | | | | | Fixes cppcheck warnings. llvm-svn: 360131
* [ARM GlobalISel] Widen G_INTTOPTR/G_PTRTOINTDiana Picus2019-05-072-2/+66
| | | | | | | We actually have a couple of G_PTRTOINT to s8 when building clang, so we should do something about them. llvm-svn: 360130
* [ELF] Reorder BitcodeFiles.empty() to call thinLTOCreateEmptyIndexFiles() in ↵Fangrui Song2019-05-073-15/+8
| | | | | | | | | | | | | | | | | only one place It makes the --plugin-opt=obj-path= and --plugin-opt=thinlto-index-only= behavior more consistent - the files will be created in the BitcodeFiles.empty() case, but I assume whether it behaves this way is not required by anyone. LTOObj->run() cannot run with empty BitcodeFiles. There would be an error: ld.lld: error: No available targets are compatible with triple "" Differential Revision: https://reviews.llvm.org/D61635 llvm-svn: 360129
* Fix uninitialized variable warning. NFCI.Simon Pilgrim2019-05-071-1/+1
| | | | | | This also fixes a scan-build "array subscript is undefined" warning. llvm-svn: 360128
* [ARM GlobalISel] Widen G_GEP index operandDiana Picus2019-05-072-4/+34
| | | | llvm-svn: 360127
* [libFuzzer] Increase timeouts on fork tests and skip one on aarch64Peter Smith2019-05-073-8/+8
| | | | | | | | | | | | | The tests fork.text, fork.sigusr.test and fork-ubsan.test intermittently fail on the aarch64 buildbots. Input gathered from the fork.sigusr.test implies that when the builder is under load the timeout value is not sufficient. The fork-ubsan.test doesn't have a timeout and I think is not always finding the error after 10000 runs so I've marked it as unsupported for now. Differential Revision: https://reviews.llvm.org/D61449 llvm-svn: 360126
* Test commit accessOrlando Cazalet-Hyams2019-05-071-2/+2
| | | | llvm-svn: 360125
* [llvm-exegesis] InstructionBenchmark::writeYamlTo(): don't forget to flush()Roman Lebedev2019-05-071-0/+2
| | | | | | | | | | | | This *APPEARS* to fix a *very* infuriating issue of Yaml's being corrupted, partially written, truncated. Or at least i'm not seeing the issue on a new benchmark sweep. The issue is somewhat rare, happens maybe once in 1000 benchmarks. Which means there are up to hundreds of broken benchmarks for a full x86 sweep in a single mode. llvm-svn: 360124
* AMDGPU: Verify that SOP2/SOPC instructions have at most one immediate operandNicolai Haehnle2019-05-072-0/+39
| | | | | | | | | | | | | | | | | | Summary: No test case because I don't know of a way to trigger this, but I accidentally caused this to fail while working on a different change. Change-Id: I8015aa447fe27163cc4e4902205a203bd44bf7e3 Reviewers: arsenm, rampitec Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D61490 llvm-svn: 360123
* [Tooling] Don't mmap the JSONCompilationDatabase, it's not correct for ↵Sam McCall2019-05-071-1/+4
| | | | | | | | | | | | | | long-lived processes. Reviewers: ilya-biryukov Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D61631 llvm-svn: 360122
* [clangd] Oops, switchSourceHeader still needs to return a URI.Sam McCall2019-05-072-3/+3
| | | | | | | | | | | | Reviewers: kadircet Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D61630 llvm-svn: 360121
* [Sema] Add missing VisitMacroQualifiedTypeLoc to TypeSpecLocFillerLeonard Chan2019-05-071-0/+5
| | | | | | To hopefully fix greenbot failures llvm-svn: 360120
* [clangd] switchSourceHeader uses null not empty string as sentinel.Sam McCall2019-05-072-5/+8
| | | | | | As far as I can see, only theia actually implements this, and it expects null. llvm-svn: 360119
* [clangd] Add test that r360116 accidentally fixed a duplicate-edits bug in ↵Sam McCall2019-05-072-20/+67
| | | | | | rename. NFC llvm-svn: 360118
* Improve function / variable disambiguation.Richard Smith2019-05-075-33/+46
| | | | | | | | Keep looking for decl-specifiers after an unknown identifier. Don't issue diagnostics about an error type specifier conflicting with later type specifiers. llvm-svn: 360117
* [clangd] Move Rename into its own file, and add unit test. NFCSam McCall2019-05-078-79/+164
| | | | | | | | | | | | Reviewers: kadircet Subscribers: mgorny, ilya-biryukov, MaskRay, jkorous, arphaman, jfb, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D61596 llvm-svn: 360116
* [clangd] add CLANG_ENABLE_CLANGD option to build clangd. Require threads.Sam McCall2019-05-071-1/+8
| | | | | | | | | | | | Reviewers: gribozavr Subscribers: mgorny, ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D61518 llvm-svn: 360115
* [clang-tidy] Extend bugprone-sizeof-expression to check sizeof(pointers to ↵Adam Balogh2019-05-072-2/+21
| | | | | | | | | | | | structures) Accidentally taking the size of a struct-pointer type or a value of this type is more common than explicitly using the & operator for the value. This patch extends the check to include these cases. Differential Revision: https://reviews.llvm.org/D61260 llvm-svn: 360114
* [PPC64] toc-indirect to toc-relative relaxationFangrui Song2019-05-0715-147/+403
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is based on D54720 by Sean Fertile. When accessing a global symbol which is not defined in the translation unit, compilers will generate instructions that load the address from the toc entry. If the symbol is defined, non-preemptable, and addressable with a 32-bit signed offset from the toc pointer, the address can be computed directly. e.g. addis 3, 2, .LC0@toc@ha # R_PPC64_TOC16_HA ld 3, .LC0@toc@l(3) # R_PPC64_TOC16_LO_DS, load the address from a .toc entry ld/lwa 3, 0(3) # load the value from the address .section .toc,"aw",@progbits .LC0: .tc var[TC],var can be relaxed to addis 3,2,var@toc@ha # this may be relaxed to a nop, addi 3,3,var@toc@l # then this becomes addi 3,2,var@toc ld/lwa 3, 0(3) # load the value from the address We can delete the test ppc64-got-indirect.s as its purpose is covered by newly added ppc64-toc-relax.s and ppc64-toc-relax-constants.s Reviewed By: ruiu, sfertile Differential Revision: https://reviews.llvm.org/D60958 llvm-svn: 360112
* [FastISel][X86] If selectFNeg fails, fall back to SelectionDAG not treating ↵Craig Topper2019-05-073-11/+12
| | | | | | | | | | | | | | | | | | | | | it as an fsub. Summary: If fneg lowering for fsub -0.0, x fails we currently fall back to treating it as an fsub. This has different behavior for nans than the xor with sign bit trick we normally try to do. On X86, the xor trick for double fails fast-isel in 32-bit mode with sse2 due to 64 bit integer types not being available. With -O2 we would always use an xorpd for this case. If we use subsd, this creates an observable behavior difference between -O0 and -O2. So fall back to SelectionDAG if we can't fast-isel it, that way SelectionDAG will use the xorpd. I believe this patch is restoring the behavior prior to r345295 from last October. This was missed then because our fast isel case in 32-bit mode aborted fast-isel earlier for another reason. But I've added new tests to cover that. Reviewers: andrew.w.kaylor, cameron.mcinally, spatel, efriedma Reviewed By: cameron.mcinally Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D61622 llvm-svn: 360111
* [WebAssembly] Add more test coverage for reloctions against section symbolsSam Clegg2019-05-073-6/+53
| | | | | | | | | | | | | The only known user of this relocation type and symbol type is the debug info sections, but we were not testing the `--relocatable` output path. This change adds a minimal test case to cover relocations against section symbols includes `--relocatable` output. Differential Revision: https://reviews.llvm.org/D61623 llvm-svn: 360110
* Recommit r359859 "[Attribute/Diagnostics] Print macro if definition is an ↵Leonard Chan2019-05-0733-20/+430
| | | | | | | | attribute declaration" Updated with fix for read of uninitialized memory. llvm-svn: 360109
* [DebugInfo] Delete TypedDINodeRefFangrui Song2019-05-0716-246/+168
| | | | | | | | | | | | | TypedDINodeRef<T> is a redundant wrapper of Metadata * that is actually a T *. Accordingly, change DI{Node,Scope,Type}Ref uses to DI{Node,Scope,Type} * or their const variants. This allows us to delete many resolve() calls that clutter the code. Reviewed By: rnk Differential Revision: https://reviews.llvm.org/D61369 llvm-svn: 360108
* [SanitizerCoverage] Use different module ctor names for trace-pc-guard and ↵Fangrui Song2019-05-074-12/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | inline-8bit-counters Fixes the main issue in PR41693 When both modes are used, two functions are created: `sancov.module_ctor`, `sancov.module_ctor.$LastUnique`, where $LastUnique is the current LastUnique counter that may be different in another module. `sancov.module_ctor.$LastUnique` belongs to the comdat group of the same name (due to the non-null third field of the ctor in llvm.global_ctors). COMDAT group section [ 9] `.group' [sancov.module_ctor] contains 6 sections: [Index] Name [ 10] .text.sancov.module_ctor [ 11] .rela.text.sancov.module_ctor [ 12] .text.sancov.module_ctor.6 [ 13] .rela.text.sancov.module_ctor.6 [ 23] .init_array.2 [ 24] .rela.init_array.2 # 2 problems: # 1) If sancov.module_ctor in this module is discarded, this group # has a relocation to a discarded section. ld.bfd and gold will # error. (Another issue: it is silently accepted by lld) # 2) The comdat group has an unstable name that may be different in # another translation unit. Even if the linker allows the dangling relocation # (with --noinhibit-exec), there will be many undesired .init_array entries COMDAT group section [ 25] `.group' [sancov.module_ctor.6] contains 2 sections: [Index] Name [ 26] .init_array.2 [ 27] .rela.init_array.2 By using different module ctor names, the associated comdat group names will also be different and thus stable across modules. Reviewed By: morehouse, phosek Differential Revision: https://reviews.llvm.org/D61510 llvm-svn: 360107
* [TableGen] Fix a typoYan Luo2019-05-071-1/+1
| | | | | | | | Check "Big" instead of "Small" in the second condition. Differential Revision: https://reviews.llvm.org/D61605 llvm-svn: 360106
* [Breakpoint] Remove unused dependencyAlex Langford2019-05-072-2/+0
| | | | | | | | | | The CPlusPlus Language plugin is unused in lldbBreakpoint. We should just remove it. A great follow up to this change would be to remove the dependency on the ObjC language plugin, but that is actually used and requires some refactoring. llvm-svn: 360105
* Fix typo in risc-v register aliases.Eric Christopher2019-05-071-1/+1
| | | | | | | | Patch by John. Differential Revision: https://reviews.llvm.org/D61464 llvm-svn: 360104
* Refactor UnaryOperator classCameron McInally2019-05-072-65/+63
| | | | | | | | | | The UnaryOperator class was originally placed in llvm/IR/Instructions.h, with the other UnaryInstructions. However, I'm now thinking that it makes more sense for it to live in llvm/IR/InstrTypes.h, with BinaryOperator. It is more similar to BinaryOperator than any of the other UnaryInstructions. NFCI Differential Revision: https://reviews.llvm.org/D61614 llvm-svn: 360103
* [X86] Use extended vector register classes in getRegForInlineAsmConstraint ↵Craig Topper2019-05-061-6/+6
| | | | | | | | | | | | | | to support x/y/zmm16-31 when the type is mismatched. The FR32/FR64/VR128/VR256 register classes don't contain the upper 16 registers. For most cases we use the default implementation which will find any register class that contains the register in question if the VT is legal for the register class. But if the VT is i32 or i64, we won't find a matching register class and will instead up in the code modified in this patch. If the requested register is x/y/zmm16-31 we weren't returning a register class that contains those registers and will hit an assertion in the caller. To fix this, I've changed to use the extended register class instead. I don't believe we need a subtarget check to see if avx512 is enabled. The default implementation just pick whatever register class it finds first. I checked and we currently pick FR32X for XMM0 with an f32 type using the default implementation regardless of whether avx512 is enabled. So I assume its it is ok to do the same for i32. Differential Revision: https://reviews.llvm.org/D61457 llvm-svn: 360102
* Fix bug in getCompleteTypeIndex in codeview debug infoAmy Huang2019-05-062-57/+78
| | | | | | | | | | | | | | | | Summary: When there are multiple instances of a forward decl record type, only the first one is emitted with a type index, because the type is added to a map with a null type index. Avoid this by reordering so that forward decl types aren't added to the map. Reviewers: rnk Subscribers: aprantl, hiraditya, arphaman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D61460 llvm-svn: 360101
* [Clang][NewPM] Don't bail out if the target machine is emptyPetr Hosek2019-05-063-6/+11
| | | | | | | | | | | This matches the behavior of the old pass manager. There are some targets that don't have target machine at all (e.g. le32, spir) which whose tests would never run with new pass manager. Similarly, we would need to disable tests for targets that are disabled. Differential Revision: https://reviews.llvm.org/D58374 llvm-svn: 360100
* [ARM] Glue register copies to tail calls.Eli Friedman2019-05-062-26/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | This generally follows what other targets do. I don't completely understand why the special case for tail calls existed in the first place; even when the code was committed in r105413, call lowering didn't work in the way described in the comments. Stack protector lowering breaks if the register copies are not glued to a tail call: we have to insert the stack protector check before the tail call, and we choose the location based on the assumption that all physical register dependencies of a tail call are adjacent to the tail call. (See FindSplitPointForStackProtector.) This is sort of fragile, but I don't see any reason to break that assumption. I'm guessing nobody has seen this before just because it's hard to convince the scheduler to actually schedule the code in a way that breaks; even without the glue, the only computation that could actually be scheduled after the register copies is the computation of the call address, and the scheduler usually prefers to schedule that before the copies anyway. Fixes https://bugs.llvm.org/show_bug.cgi?id=41417 Differential Revision: https://reviews.llvm.org/D60427 llvm-svn: 360099
* Remove unneeded <algorithm> include in cmath.Eric Fiselier2019-05-061-1/+0
| | | | | | | It's a remnant from an earlier version of the lerp change and is unneeded. llvm-svn: 360098
* [FastISel] Pass the fneg input operand to hasTrivialKill in ↵Craig Topper2019-05-062-2/+2
| | | | | | | | FastISel::selectFNeg. We're trying to calculate the kill flag for OpReg which is the input so we need to pass the input here. llvm-svn: 360097
* [X86] Add test case to show that we don't set the kill flag properly for ↵Craig Topper2019-05-061-0/+22
| | | | | | fast isel handling of fneg. llvm-svn: 360096
* [AMDGPU] gfx1010 verifier changesStanislav Mekhanoshin2019-05-061-7/+15
| | | | | | Differential Revision: https://reviews.llvm.org/D61521 llvm-svn: 360095
* [AMDGPU] gfx1010: prefer V_MUL_LO_U32 over V_MUL_LO_I32Stanislav Mekhanoshin2019-05-0614-100/+142
| | | | | | | | | GFX10 deprecates v_mul_lo_i32 instruction, so choose u32 form for all targets. Differential Revision: https://reviews.llvm.org/D61525 llvm-svn: 360094
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