summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
...
* Introduce FileEntryRef and use it when handling includes to report correct ↵Alex Lorenz2019-08-2224-342/+639
| | | | | | | | | | | | | | | | | | | | | | | dependencies when the FileManager is reused across invocations This commit introduces a parallel API to FileManager's getFile: getFileEntryRef, which returns a reference to the FileEntry, and the name that was used to access the file. In the case of a VFS with 'use-external-names', the FileEntyRef contains the external name of the file, not the filename that was used to access it. The new API is adopted only in the HeaderSearch and Preprocessor for include file lookup, so that the accessed path can be propagated to SourceManager's FileInfo. SourceManager's FileInfo now can report this accessed path, using the new getName method. This API is then adopted in the dependency collector, which now correctly reports dependencies when a file is included both using a symlink and a real path in the case when the FileManager is reused across multiple Preprocessor invocations. Note that this patch does not fix all dependency collector issues, as the same problem is still present in other cases when dependencies are obtained using FileSkipped, InclusionDirective, and HasInclude. This will be fixed in follow-up commits. Differential Revision: https://reviews.llvm.org/D65907 llvm-svn: 369680
* [clangd] Fold string copy into lambda capture. NFC.Benjamin Kramer2019-08-221-3/+2
| | | | llvm-svn: 369679
* gn build: Merge r369677Nico Weber2019-08-221-1/+0
| | | | llvm-svn: 369678
* Revert "[LifetimeAnalysis] Support more STL idioms (template forward ↵Richard Smith2019-08-228-164/+15
| | | | | | | | | | declaration and DependentNameType)" This reverts commit r369591, because it causes the formerly-reliable -Wreturn-stack-address warning to start issuing false positives. Testcase provided on the commit thread. llvm-svn: 369677
* [Clangd] Tweaktesting replace toString with consumeErrorShaurya Gupta2019-08-221-1/+1
| | | | llvm-svn: 369676
* Retire llvm::less_ptr. llvm::deref is much more flexible.Benjamin Kramer2019-08-224-18/+6
| | | | llvm-svn: 369675
* Retire llvm::less/equal in favor of C++14 std::less<>/equal_to<>.Benjamin Kramer2019-08-226-34/+23
| | | | llvm-svn: 369674
* GlobalISel: Don't create G_UADDE with constant false carry inMatt Arsenault2019-08-2210-164/+138
| | | | | | | | The x86 tests are now broken (in paticular add-scalar.ll now hits the DAG fallback) due to not handling G_UADDO. The DAG x86 backend has a custom lowering for this, so that will need to be implemented. llvm-svn: 369673
* [libc++] Mark lock_guard nodiscard test as unsupported in C++03Louis Dionne2019-08-221-0/+3
| | | | llvm-svn: 369672
* [MachO][TLOF] Use hasLocalLinkage to determine if indirect symbol is localFrancis Visoiu Mistrih2019-08-229-21/+50
| | | | | | | | | | | | | | | | | | | | | Local symbols in the indirect symbol table contain the value `INDIRECT_SYMBOL_LOCAL` and the corresponding __pointers entry must contain the address of the target. In r349060, I added support for local symbols in the indirect symbol table, which was checking if the symbol `isDefined` && `!isExternal` to determine if the symbol is local or not. It turns out that `isDefined` will return false if the user of the symbol comes before its definition, and we'll again generate .long 0 which will be the symbol at the adress 0x0. Instead of doing that, use GlobalValue::hasLocalLinkage() to check if the symbol is local. Differential Revision: https://reviews.llvm.org/D66563 llvm-svn: 369671
* Remove redundant curly braces.Adrian Prantl2019-08-222-3/+3
| | | | llvm-svn: 369670
* Doxygenify comments.Adrian Prantl2019-08-221-279/+297
| | | | llvm-svn: 369669
* [OPENMP]Generalization of handling of declare target attribute.Alexey Bataev2019-08-222-2/+2
| | | | | | | Used OMPDeclareTargetDeclAttr::isDeclareTargetDeclaration instead of direct checking of the OMPDeclareTargetDeclAttr attribute. llvm-svn: 369668
* [NFC][InstCombine] New tests: unrecognized_three-way-comparison.ll is ↵Roman Lebedev2019-08-221-0/+121
| | | | | | | | ignorant about commutative variants D66232 "exposes" the problem. llvm-svn: 369667
* Fixed Missing Expected error handlingShaurya Gupta2019-08-221-1/+3
| | | | llvm-svn: 369666
* [X86] Remove MCInstLower code that drops operands from some CALL and TAILJMP ↵Craig Topper2019-08-221-18/+8
| | | | | | | | | | instructions. Add asserts to verify operand count It appears the FIXME here was handled at some point. r159728 from 2012 seems to be at least aportion of fixing it. Differential Revision: https://reviews.llvm.org/D66570 llvm-svn: 369665
* [MBP] Disable aggressive loop rotate in plain modeGuozhi Wei2019-08-2258-3533/+3251
| | | | | | | | | | Patch https://reviews.llvm.org/D43256 introduced more aggressive loop layout optimization which depends on profile information. If profile information is not available, the statically estimated profile information(generated by BranchProbabilityInfo.cpp) is used. If user program doesn't behave as BranchProbabilityInfo.cpp expected, the layout may be worse. To be conservative this patch restores the original layout algorithm in plain mode. But user can still try the aggressive layout optimization with -force-precise-rotation-cost=true. Differential Revision: https://reviews.llvm.org/D65673 llvm-svn: 369664
* [DAGCombiner] Remove explicit call to AddToWorklist in sqrt and reciprocal ↵Amaury Sechet2019-08-222-56/+10
| | | | | | | | | | | | | | | | computations Summary: These nodes end up being processed regardless due to DAGCombiner ensuring arguments are processed. This changes the order in which nodes are processed, which fixes an issue on PowerPC. Reviewers: craig.topper, efriedma, RKSimon, lebedev.ri, mcberg2017, stefanp, hfinkel Subscribers: nemanjai, MaskRay, jsji, steven.zhang, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D66548 llvm-svn: 369662
* [X86][BtVer2] Fix latency/throughput of scalar integer MUL instructions.Andrea Di Biagio2019-08-2216-256/+257
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Single operand MUL instructions that implicitly set EAX have the following latency/throughput profile (see below): imul %cl # latency: 3cy - uOPs: 1 - 1 JMul imul %cx # latency: 3cy - uOPs: 3 - 3 JMul imul %ecx # latency: 3cy - uOPs: 2 - 2 JMul imul %rcx # latency: 6cy - uOPs: 2 - 4 JMul mul %cl # latency: 3cy - uOPs: 1 - 1 JMul mul %cx # latency: 3cy - uOPs: 3 - 3 JMul mul %ecx # latency: 3cy - uOPs: 2 - 2 JMul mul %rcx # latency: 6cy - uOPs: 2 - 4 JMul Excluding the 64bit variant, which has a latency of 6cy, every other instruction has a latency of 3cy. However, the number of decoded macro-opcodes (as well as the resource cyles) depend on the MUL size. The two operand MULs have a more predictable profile (see below): imul %dx, %dx # latency: 3cy - uOPs: 1 - 1 JMul imul %edx, %edx # latency: 3cy - uOPs: 1 - 1 JMul imul %rdx, %rdx # latency: 6cy - uOPs: 1 - 4 JMul imul $3, %dx, %dx # latency: 4cy - uOPs: 2 - 2 JMul imul $3, %ecx, %ecx # latency: 3cy - uOPs: 1 - 1 JMul imul $3, %rdx, %rdx # latency: 6cy - uOPs: 1 - 4 JMul This patch updates the values in the Jaguar scheduling model and regenerates llvm-mca tests. Differential Revision: https://reviews.llvm.org/D66547 llvm-svn: 369661
* [lldb] Remove ')' to fix the buildRaphael Isemann2019-08-221-1/+1
| | | | | | That ')' slipped in by accident in the reformatting commit. llvm-svn: 369660
* [PowerPC] Regenerate reciprocal tests, as discussed on D66548Simon Pilgrim2019-08-221-107/+294
| | | | llvm-svn: 369659
* [PowerPC] Add combined ELF ABI and 32/64 bit queries to the subtarget. [NFC]Sean Fertile2019-08-226-58/+59
| | | | | | | | | | | | A lot of places in the code combine checks for both ABI (SVR4/Darwin/AIX) and addressing mode (64-bit vs 32-bit). In an attempt to make some of the code more readable I've added a couple functions that combine checking for the ELF abi and 64-bit/32-bit code at once. As we add more AIX support I intend to add similar functions for the AIX ABI. Differential Revision: https://reviews.llvm.org/D65814 llvm-svn: 369658
* [PowerPC][XCOFF][MC] Explicitly set containing csect on symbols. [NFC]Sean Fertile2019-08-223-2/+19
| | | | | | | | | | | Previously we would get the csect a symbol was contained in through its fragment. This works only if we are writing an object file, and only for defined symbols. To fix this we set the contating csect explicitly on the MCSymbolXCOFF object. Differential Revision: https://reviews.llvm.org/D66032 llvm-svn: 369657
* [clangd] Send suppported codeActionKinds to the client.Haojian Wu2019-08-221-1/+11
| | | | | | | | | | | | | | | | | | | Summary: This would make client know which codeActionKinds that clangd may return. VSCode will add a new entry "Refactor..." (which shows all refactoring-kind code actions) in the right-click menu. Reviewers: ilya-biryukov Subscribers: MaskRay, jkorous, arphaman, kadircet, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D66592 llvm-svn: 369656
* [lldb] Fix `TestDataFormatterStdList` regressionJan Kratochvil2019-08-221-7/+13
| | | | | | | | | | | | | | | | Since D66174 I see failures of TestDataFormatterStdList in about 50% of runs on Fedora 30 x86_64 libstdc++. I have found out that LLDB internally expects these RegularExpressions to be matched in their alphabetical order: ^std::(__cxx11::)?list<.+>(( )?&)?$ ^std::__[[:alnum:]]+::list<.+>(( )?&)?$ But since D66174 they are sometimes matched in reverse order. In fact it was only some luck it worked before as there is internally std::map<lldb::RegularExpressionSP, FormatterImpl> (FormattersContainer). Differential Revision: https://reviews.llvm.org/D66398 llvm-svn: 369655
* [Attributor][NFC] Move DerefState to header and use StateWrapperHideto Ueno2019-08-222-102/+90
| | | | | | | | | | | | | | | | Summary: In D65402, I want to get DerefState from AADereferenceable but it was not allowed. This patch moves DerefState definition into Attributor.h and makes AADerefenceable inherit StateWrapper. Reviewers: jdoerfert, sstefan1 Reviewed By: jdoerfert Subscribers: hiraditya, jfb, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D66585 llvm-svn: 369653
* [lldb][NFC] Fix indentation in CommandObjectProcessRaphael Isemann2019-08-221-9/+9
| | | | llvm-svn: 369652
* [SlotIndexes] Add print-slotindexes to disable printing slotindexesJinsong Ji2019-08-222-2/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: When we print the IR with --print-after/before-*, SlotIndexes will be printed whenever available (We haven't freed it). This introduces some noises when we try to compare the IR among different optimizations. eg: -print-before=machine-cp will print SlotIndexes for 1st machine-cp pass, but NOT for 2nd machine-cp; -print-after=machine-cp will NOT print SlotIndexes for both machine-cp passes. So SlotIndexes in 1st pass introduce noises when differing these IRs. This patch introduces an option to hide indexes. Reviewers: stoklund, thegameg, qcolombet Reviewed By: thegameg Subscribers: hiraditya, arphaman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D66500 llvm-svn: 369650
* [MCA] consistently use MCPhysReg instead of unsigned as register type. NFCIAndrea Di Biagio2019-08-226-29/+28
| | | | llvm-svn: 369648
* Revert r369402 "win: Enable /Zc:twoPhase by default if targeting MSVC 2017 ↵Hans Wennborg2019-08-224-24/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | update 3 or newer" This broke compiling some ASan tests with never versions of MSVC/the Win SDK, see https://crbug.com/996675 > MSVC 2017 update 3 (_MSC_VER 1911) enables /Zc:twoPhase by default, and > so should clang-cl: > https://docs.microsoft.com/en-us/cpp/build/reference/zc-twophase > > clang-cl takes the MSVC version it emulates from the -fmsc-version flag, > or if that's not passed it tries to check what the installed version of > MSVC is and uses that, and failing that it uses a default version that's > currently 1911. So this changes the default if no -fmsc-version flag is > passed and no installed MSVC is detected. (It also changes the default > if -fmsc-version is passed or MSVC is detected, and either indicates > _MSC_VER >= 1911.) > > As mentioned in the MSDN article, the Windows SDK header files in > version 10.0.15063.0 (Creators Update or Redstone 2) and earlier > versions do not work correctly with /Zc:twoPhase. If you need to use > these old SDKs with a new clang-cl, explicitly pass /Zc:twoPhase- to get > the old behavior. > > Fixes PR43032. > > Differential Revision: https://reviews.llvm.org/D66394 llvm-svn: 369647
* [lldb][NFC] Add test for target stop-hook disable/enable/deleteRaphael Isemann2019-08-221-5/+28
| | | | llvm-svn: 369646
* [yaml2obj] - Lookup relocation symbols in dynamic symbol when .dynsym ↵George Rimar2019-08-224-18/+84
| | | | | | | | | | | | | | | | referenced. This fixes https://bugs.llvm.org/show_bug.cgi?id=40337. Previously, it was always assumed that relocations referenced symbols in the static symbol table. Now, if the Link field references a section called ".dynsym" it will look up these symbols in the dynamic symbol table. This patch is heavily based on D59097 by James Henderson Differential revision: https://reviews.llvm.org/D66532 llvm-svn: 369645
* Fix some regressions caused by r369553 on old versions of Debian and UbuntuSylvestre Ledru2019-08-223-3/+3
| | | | | | | | | | It was causing some errors like: Encoding error: 'ascii' codec can't decode byte 0xe2 in position 341: ordinal not in range(128) The full traceback has been saved in /tmp/sphinx-err-y2fq4dtb.log, if you want to report the issue to the developers. llvm-svn: 369644
* Remove \brief commands from doxygen comments.Dmitri Gribenko2019-08-2269-355/+355
| | | | | | | | | | | | | | | | | | | | | | | Summary: We've been running doxygen with the autobrief option for a couple of years now. This makes the \brief markers into our comments redundant. Since they are a visual distraction and we don't want to encourage more \brief markers in new code either, this patch removes them all. Patch produced by for i in $(git grep -l '\\brief'); do perl -pi -e 's/\\brief //g' $i & done [This is analogous to LLVM r331272 and CFE r331834] Subscribers: srhines, nemanjai, javed.absar, kbarton, MaskRay, jkorous, arphaman, jfb, kadircet, jsji, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D66578 llvm-svn: 369643
* [X86][BtVer2] Fix latency and throughput of XCHG and XADD.Andrea Di Biagio2019-08-224-56/+419
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Jaguar, XCHG has a latency of 1cy and decodes to 2 macro-opcodes. Maximum throughput for XCHG is 1 IPC. The byte exchange has worse latency and decodes to 1 extra uOP; maximum observed throughput is 0.5 IPC. ``` xchgb %cl, %dl # Latency: 2cy - uOPs: 3 - 2 ALU xchgw %cx, %dx # Latency: 1cy - uOPs: 2 - 2 ALU xchgl %ecx, %edx # Latency: 1cy - uOPs: 2 - 2 ALU xchgq %rcx, %rdx # Latency: 1cy - uOPs: 2 - 2 ALU ``` The reg-mem forms of XCHG are atomic operations with an observed latency of 16cy. The resource usage is similar to the XCHGrr variants. The biggest difference is obviously the bus-locking, which prevents the LS to issue other memory uOPs in parallel until the unlocking store uOP is executed. ``` xchgb %cl, (%rsp) # Latency: 16cy - uOPs: 3 - ECX latency: 11cy xchgw %cx, (%rsp) # Latency: 16cy - uOPs: 3 - ECX latency: 11cy xchgl %ecx, (%rsp) # Latency: 16cy - uOPs: 3 - ECX latency: 11cy xchgq %rcx, (%rsp) # Latency: 16cy - uOPs: 3 - ECX latency: 11cy ``` The exchanged in/out register operand becomes available after 11cy from the start of execution. Added test xchg.s to verify that we correctly see that register write committed in 11cy (and not 16cy). Reg-reg XADD instructions have the same latency/throughput than the byte exchange (register-register variant). ``` xaddb %cl, %dl # latency: 2cy - uOPs: 3 - 3 ALU xaddw %cx, %dx # latency: 2cy - uOPs: 3 - 3 ALU xaddl %ecx, %edx # latency: 2cy - uOPs: 3 - 3 ALU xaddq %rcx, %rdx # latency: 2cy - uOPs: 3 - 3 ALU ``` The non-atomic RM variants have a latency of 11cy, and decode to 4 macro-opcodes. They still consume 2 ALU pipes, and the exchange in/out register operand becomes available in 3cy (it matches the 'load-to-use latency'). ``` xaddb %cl, (%rsp) # latency: 11cy - uOPs: 4 - 3 ALU xaddw %cx, (%rsp) # latency: 11cy - uOPs: 4 - 3 ALU xaddl %ecx, (%rsp) # latency: 11cy - uOPs: 4 - 3 ALU xaddq %rcx, (%rsp) # latency: 11cy - uOPs: 4 - 3 ALU ``` The atomic XADD variants execute in 16cy. The in/out register operand is available after 11cy from the start of execution. ``` lock xaddb %cl, (%rsp) # latency: 16cy - uOPs: 4 - 3 ALU -- ECX latency: 11cy lock xaddw %cx, (%rsp) # latency: 16cy - uOPs: 4 - 3 ALU -- ECX latency: 11cy lock xaddl %ecx, (%rsp) # latency: 16cy - uOPs: 4 - 3 ALU -- ECX latency: 11cy lock xaddq %rcx, (%rsp) # latency: 16cy - uOPs: 4 - 3 ALU -- ECX latency: 11cy ``` Added test xadd.s to verify those latencies as well as read-advance values. Differential Revision: https://reviews.llvm.org/D66535 llvm-svn: 369642
* [OpenCL] Fix declaration of enqueue_markerYaxun Liu2019-08-221-1/+1
| | | | | | Differential Revision: https://reviews.llvm.org/D66512 llvm-svn: 369641
* [MVT] Add MVT equivalent to EVT::getHalfNumVectorElementsVT() helper. NFCI.Simon Pilgrim2019-08-222-21/+20
| | | | | | Allows for some cleanup in a lot of SSE/AVX vector splitting code llvm-svn: 369640
* Reapply: [ARM] Fix lsrl with a 128/256 bit shift amount or a shift of 32Sam Tebbs2019-08-226-66/+112
| | | | | | | | | The CodeGen/Thumb2/mve-vaddv.ll test needed to be amended to reflect the changes from the above patch. This reverts commit cd53ff6, reapplying 7c6b229. llvm-svn: 369638
* [Loop Peeling] Fix silly bug in metadata update.Serguei Katkov2019-08-222-6/+56
| | | | | | | We must update loop metedata before we moved to parent loop if it is present. llvm-svn: 369637
* Revert r369626 "[ARM] Fix lsrl with a 128/256 bit shift amount or a shift of 32"Hans Wennborg2019-08-225-105/+55
| | | | | | | | | | | | | | | | | It broke the bots, see e.g. http://lab.llvm.org:8011/builders/clang-cuda-build/builds/36275/ > This patch fixes shifts by a 128/256 bit shift amount. It also fixes > codegen for shifts of 32 by delegating to LLVM's default optimisation > instead of emitting a long shift. > > Tests that used to generate long shifts of 32 are updated to check for the > more optimised codegen. > > Differential revision: https://reviews.llvm.org/D66519 > > llvm-svn: 369626 llvm-svn: 369636
* [lldb][NFC] Remove unused return value from HandleOptionArgumentCompletionRaphael Isemann2019-08-224-24/+12
| | | | llvm-svn: 369635
* [llvm-objdump] - Remove an outdated "FIXME". NFC.George Rimar2019-08-221-2/+0
| | | | | | | The bug mentioned in this test case was fixed in D63779 (r364955), which also provides a test case. llvm-svn: 369634
* Revert r369458 "[DebugInfo] Add debug location to dynamic atexit destructor"Hans Wennborg2019-08-224-31/+8
| | | | | | | | | | | | | | | | It causes the build to fail with "inlinable function call in a function with debug info must have a !dbg location" in Chromium. See llvm-commits thread for more info. (This also reverts the follow-up in r369474.) > Fixes PR43012 > > Differential Revision: https://reviews.llvm.org/D66328 llvm-svn: 369633
* [lldb][NFC] NFC cleanup for the completion codeRaphael Isemann2019-08-228-121/+121
| | | | llvm-svn: 369632
* [clangd] The ClangdServer::EnableHiddenFeatures is not used any more.Haojian Wu2019-08-221-1/+0
| | | | | | Remove it. llvm-svn: 369631
* [llvm-readobj] - Remove `reportError(std::error_code EC, StringRef Input)` ↵George Rimar2019-08-224-64/+72
| | | | | | | | | | | | | | | helper. We do not need it, std::error_code is used mostly for COFF and this patch rewrites the calls to use a different overload. Having reportError(std::error_code EC, ... is excessive by itself, because API that use error codes actually needs refactoring to use Error/Expected<> instead. DIfferential revision: https://reviews.llvm.org/D66521 llvm-svn: 369630
* Remove an unused function, suppress -Wunused-function warning.Haojian Wu2019-08-221-6/+0
| | | | llvm-svn: 369629
* [X86] Lower the cost of v2i32->v2f64 sint_to_fp under vector widening ↵Craig Topper2019-08-223-8/+26
| | | | | | | | | | | | | | legalization. I don't really understand the costs we're using for fp_to_sint, but prior to widening legalization we used 20 as the cost for this via the v2i64->v2f64 entry. That number seems better than the 40 we got with widening legalization. So now we need either a v2i32->v2f64 entry or a v4i32->v2f64 entry depending on whether AVX is enabled or not since we skip the first SSE2 table look up under AVX. llvm-svn: 369628
* [Support] Improve readNativeFile(Slice) interfacePavel Labath2019-08-226-121/+154
| | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: There was a subtle, but pretty important difference between the Slice and regular versions of this function. The Slice function was zero-initializing the rest of the buffer when the read syscall returned less bytes than expected, while the regular function did not. This patch removes the inconsistency by making both functions *not* zero-initialize the buffer. The zeroing code is moved to the MemoryBuffer class, which is currently the only user of this code. This makes the API more consistent, and the code shorter. While in there, I also refactor the functions to return the number of bytes through the regular return value (via Expected<size_t>) instead of a separate by-ref argument. Reviewers: aganea, rnk Subscribers: kristina, Bigcheese, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D66471 llvm-svn: 369627
* [ARM] Fix lsrl with a 128/256 bit shift amount or a shift of 32Sam Tebbs2019-08-225-55/+105
| | | | | | | | | | | | | This patch fixes shifts by a 128/256 bit shift amount. It also fixes codegen for shifts of 32 by delegating to LLVM's default optimisation instead of emitting a long shift. Tests that used to generate long shifts of 32 are updated to check for the more optimised codegen. Differential revision: https://reviews.llvm.org/D66519 llvm-svn: 369626
OpenPOWER on IntegriCloud