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* [x86] auto-generate better checks; NFCSanjay Patel2017-05-282-59/+204
| | | | llvm-svn: 304090
* [InstrProf] Use more ArrayRef/StringRef.Benjamin Kramer2017-05-282-11/+11
| | | | | | No functional change intended. llvm-svn: 304089
* [X86] Adding new LLVM TableGen backend that generates the X86 backend memory ↵Ayman Musa2017-05-289-3427/+745
| | | | | | | | | | | folding tables. X86 backend holds huge tables in order to map between the register and memory forms of each instruction. This TableGen Backend automatically generated all these tables with the appropriate flags for each entry. Differential Revision: https://reviews.llvm.org/D32684 llvm-svn: 304088
* [X86] Adding FoldGenRegForm helper field (for memory folding tables tableGen ↵Ayman Musa2017-05-288-89/+175
| | | | | | | | | | | | | | | | | | | | | | backend) to X86Inst class and set its value for the relevant instructions. Some register-register instructions can be encoded in 2 different ways, this happens when 2 register operands can be folded (separately). For example if we look at the MOV8rr and MOV8rr_REV, both instructions perform exactly the same operation, but are encoded differently. Here is the relevant information about these instructions from Intel's 64-ia-32-architectures-software-developer-manual: Opcode Instruction Op/En 64-Bit Mode Compat/Leg Mode Description 8A /r MOV r8,r/m8 RM Valid Valid Move r/m8 to r8. 88 /r MOV r/m8,r8 MR Valid Valid Move r8 to r/m8. Here we can see that in order to enable the folding of the output and input registers, we had to define 2 "encodings", and as a result we got 2 move 8-bit register-register instructions. In the X86 backend, we define both of these instructions, usually one has a regular name (MOV8rr) while the other has "_REV" suffix (MOV8rr_REV), must be marked with isCodeGenOnly flag and is not emitted from CodeGen. Automatically generating the memory folding tables relies on matching encodings of instructions, but in these cases where we want to map both memory forms of the mov 8-bit (MOV8rm & MOV8mr) to MOV8rr (not to MOV8rr_REV) we have to somehow point from the MOV8rr_REV to the "regular" appropriate instruction which in this case is MOV8rr. This field enable this "pointing" mechanism - which is used in the TableGen backend for generating memory folding tables. Differential Revision: https://reviews.llvm.org/D32683 llvm-svn: 304087
* [X86] Fixing VPOPCNTDQ feature set lookup.Oren Ben Simhon2017-05-281-1/+1
| | | | llvm-svn: 304086
* baremetal.cpp: Fix tests where lib suffix is 64Ismail Donmez2017-05-281-6/+6
| | | | llvm-svn: 304085
* Reverted r304083 as it seems there is a desire to address this in the ↵Galina Kistanova2017-05-281-6/+3
| | | | | | googletest. llvm-svn: 304084
* Added braces to address gcc warning: suggest explicit braces to avoid ↵Galina Kistanova2017-05-281-3/+6
| | | | | | ambiguous 'else' [-Wdangling-else]. NFC. llvm-svn: 304083
* ClangdTests.cpp: Use "clang/Config/config.h" instead of "llvm/Config/config.h".NAKAMURA Takumi2017-05-271-1/+1
| | | | llvm-svn: 304082
* [coroutines] Mark cxx_status.html of Coroutines TS as (SVN)Gor Nishanov2017-05-271-3/+3
| | | | | | | | | | | | | | Summary: It is time! Reviewers: GorNishanov, rsmith Reviewed By: GorNishanov, rsmith Subscribers: EricWF, rsmith, cfe-commits Differential Revision: https://reviews.llvm.org/D33624 llvm-svn: 304081
* DebugInfo: Add source code/build instructions for split-dwarf-dwp symbolizer ↵David Blaikie2017-05-271-0/+12
| | | | | | | | | test Addressing post-commit code review feedback from Paul Robinson on r303609. llvm-svn: 304080
* Cloning: Fix debug info cloningGor Nishanov2017-05-274-11/+145
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: I believe https://reviews.llvm.org/rL302576 introduced two bugs: 1) it produces duplicate distinct variables for every: dbg.value describing the same variable. To fix the problme I switched form getDistinct() to get() in DebugLoc.cpp: auto reparentVar = [&](DILocalVariable *Var) { return DILocalVariable::getDistinct( 2) It passes NewFunction plain name as a linkagename parameter to Subprogram constructor. Breaks assert in: || DeclLinkageName.empty()) || LinkageName == DeclLinkageName) && "decl has a linkage name and it is different"' failed. #9 0x00007f5010261b75 llvm::DwarfUnit::applySubprogramDefinitionAttributes(llvm::DISubprogram const*, llvm::DIE&) /home/gor/llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp:1173:3 # (Edit: reproducer added) Here how https://reviews.llvm.org/rL302576 broke coroutine debug info. Coroutine body of the original function is split into several parts by cloning and removing unneeded code. All parts describe the original function and variables present in the original function. For a simple case, prior to Split, original function has these two blocks: ``` PostSpill: ; preds = %AllocaSpillBB call void @llvm.dbg.value(metadata i32 %x, i64 0, metadata !14, metadata !15), !dbg !13 store i32 %x, i32* %x.addr, align 4 ... and sw.epilog: ; preds = %sw.bb %x.addr.reload.addr = getelementptr inbounds %f.Frame, %f.Frame* %FramePtr, i32 0, i32 4, !dbg !20 %4 = load i32, i32* %x.addr.reload.addr, align 4, !dbg !20 call void @llvm.dbg.value(metadata i32 %4, i64 0, metadata !14, metadata !15), !dbg !13 !14 = !DILocalVariable(name: "x", arg: 1, scope: !6, file: !7, line: 55, type: !11) ``` Note that in two blocks different expression represent the same original user variable X. Before rL302576, for every cloned function there was exactly one cloned DILocalVariable(name: "x" as in: ``` define i8* @f(i32 %x) #0 !dbg !6 { ... !6 = distinct !DISubprogram(name: "f", scope: !7, file: !7, line: 55, type: !8, isLocal: false, isDefinition: true, scopeLine: 55, flags: DIFlagPrototyped, ... !14 = !DILocalVariable(name: "x", arg: 1, scope: !6, file: !7, line: 55, type: !11) define internal fastcc void @f.resume(%f.Frame* %FramePtr) #0 !dbg !25 { ... !25 = distinct !DISubprogram(name: "f", scope: !7, file: !7, line: 55, type: !8, isLocal: false, isDefinition: true, scopeLine: 55, flags: DIFlagPrototyped, isOptimized: false, unit: !0, variables: !2) !28 = !DILocalVariable(name: "x", arg: 1, scope: !25, file: !7, line: 55, type: !11) ``` After rL302576, for every cloned function there were as many DILocalVariable(name: "x" as there were "call void @llvm.dbg.value" for that variable. This was causing asserts in VerifyDebugInfo and AssemblyPrinter. Example: ``` !27 = distinct !DISubprogram(name: "f", linkageName: "f.resume", scope: !7, file: !7, line: 55, type: !8, isLocal: false, isDefinition: true, scopeLine: 55, !29 = distinct !DILocalVariable(name: "x", arg: 1, scope: !27, file: !7, line: 55, type: !11) !39 = distinct !DILocalVariable(name: "x", arg: 1, scope: !27, file: !7, line: 55, type: !11) !41 = distinct !DILocalVariable(name: "x", arg: 1, scope: !27, file: !7, line: 55, type: !11) ``` Second problem: Prior to rL302576, all clones were described by DISubprogram referring to original function. ``` define i8* @f(i32 %x) #0 !dbg !6 { ... !6 = distinct !DISubprogram(name: "f", scope: !7, file: !7, line: 55, type: !8, isLocal: false, isDefinition: true, scopeLine: 55, flags: DIFlagPrototyped, define internal fastcc void @f.resume(%f.Frame* %FramePtr) #0 !dbg !25 { ... !25 = distinct !DISubprogram(name: "f", scope: !7, file: !7, line: 55, type: !8, isLocal: false, isDefinition: true, scopeLine: 55, flags: DIFlagPrototyped, ``` After rL302576, DISubprogram for clones is of two minds, plain name refers to the original name, linkageName refers to plain name of the clone. ``` !27 = distinct !DISubprogram(name: "f", linkageName: "f.resume", scope: !7, file: !7, line: 55, type: !8, isLocal: false, isDefinition: true, scopeLine: 55, ``` I think the assumption in AsmPrinter is that both name and linkageName should refer to the same entity. It asserts here when they are not: ``` || DeclLinkageName.empty()) || LinkageName == DeclLinkageName) && "decl has a linkage name and it is different"' failed. #9 0x00007f5010261b75 llvm::DwarfUnit::applySubprogramDefinitionAttributes(llvm::DISubprogram const*, llvm::DIE&) /home/gor/llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp:1173:3 ``` After this fix, behavior (with respect to coroutines) reverts to exactly as it was before and therefore making them debuggable again, or even more importantly, compilable, with "-g" Reviewers: dblaikie, echristo, aprantl Reviewed By: dblaikie Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D33614 llvm-svn: 304079
* Recommit "[DWARF] - Make collectAddressRanges() return section index in ↵George Rimar2017-05-2718-42/+101
| | | | | | | | | | | | | | | | | | | | | | addition to Low/High PC" With fix of uninitialized variable. Original commit message: This change is intended to use for LLD in D33183. Problem we have in LLD when building .gdb_index is that we need to know section which address range belongs to. Previously it was solved on LLD side by providing fake section addresses with use of llvm::LoadedObjectInfo interface. We assigned file offsets as addressed. Then after obtaining ranges lists, for each range we had to find section ID's. That not only was slow, but also complicated implementation and was the reason of incorrect behavior when sections share the same offsets, like D33176 shows. This patch makes DWARF parsers to return section index as well. That solves problem mentioned above. Differential revision: https://reviews.llvm.org/D33184 llvm-svn: 304078
* [TableGen] Prevent DagInit from leaking its Args and ArgNames when they ↵Craig Topper2017-05-272-31/+42
| | | | | | | | | | exceed the size of the SmallVector. DagInits are allocated in a BumpPtrAllocator so they are never destructed. This means the destructor for the SmallVector never runs. To fix this we now allocate the vectors in the BumpPtrAllocator too using TrailingObjects. llvm-svn: 304077
* [TableGen] Use the correct type for the first template for the ListInit ↵Craig Topper2017-05-271-1/+1
| | | | | | TrailingObjects. llvm-svn: 304076
* Delinearize memory accesses that reference parameters coming from function callsTobias Grosser2017-05-275-5/+188
| | | | | | | | | | | | | | Certain affine memory accesses which we model today might contain products of parameters which we might combined into a new parameter to be able to create an affine expression that represents these memory accesses. Especially in the context of OpenCL, this approach looses information as memory accesses such as A[get_global_id(0) * N + get_global_id(1)] are assumed to be linear. We correctly recover their multi-dimensional structure by assuming that parameters that are the result of a function call at IR level likely are not parameters, but indeed induction variables. The resulting access is now A[get_global_id(0)][get_global_id(1)] for an array A[][N]. llvm-svn: 304075
* Allow side-effect free function calls in valid affine SCEVsTobias Grosser2017-05-274-3/+143
| | | | | | | | | | | | | | | Side-effect free function calls with only constant parameters can be easily re-generated and consequently do not prevent us from modeling a SCEV. This change allows array subscripts to reference function calls such as 'get_global_id()' as used in OpenCL. We use the function name plus the constant operands to name the parameter. This is possible as the function name is required and is not dropped in release builds the same way names of llvm::Values are dropped. We also provide more readable names for common OpenCL functions, to make it easy to understand the polyhedral model we generate. llvm-svn: 304074
* [SCEV] Assume parameters coming from function calls contain IVsTobias Grosser2017-05-272-1/+84
| | | | | | | | | | | | | | | | | | | | The optimistic delinearization implemented in LLVM detects array sizes by looking for non-linear products between parameters and induction variables. In OpenCL code, such products often look like: A[get_global_id(0) * N + get_global_id(1)] Hence, the IV is hidden in the get_global_id() call and consequently delinearization would fail as no induction variable is available that helps us to identify N as array size parameter. We now use a very simple heuristic to change this. We assume that each parameter that comes directly from a function call is a hidden induction variable. As a result, we can delinearize the access above to: A[get_global_id(0)][get_global_id(1] llvm-svn: 304073
* [DAGCombiner] use narrow load to avoid vector extractSanjay Patel2017-05-2713-144/+142
| | | | | | | | | | | | | | | | | | If we have (extract_subvector(load wide vector)) with no other users, that can just be (load narrow vector). This is intentionally conservative. Follow-ups may loosen the one-use constraint to account for the extract cost or just remove the one-use check. The memop chain updating is based on code that already exists multiple times in x86 lowering, so that should be pulled into a helper function as a follow-up. Background: this is a potential improvement noticed via regressions caused by making x86's peekThroughBitcasts() not loop on consecutive bitcasts (see comments in D33137). Differential Revision: https://reviews.llvm.org/D33578 llvm-svn: 304072
* Update some tests to changes in isl's internal representationTobias Grosser2017-05-275-9/+11
| | | | | | This was forgotten as part of r304069. llvm-svn: 304070
* Update isl to isl-0.18-662-g17e172eTobias Grosser2017-05-2767-812/+2673
| | | | | | This is a general maintenance update llvm-svn: 304069
* Update information on isl C++ bindings in Polly release notesTobias Grosser2017-05-271-9/+8
| | | | llvm-svn: 304068
* ClangdTests.cpp: Fix a possible typo, it was "if (TmpDir2 != TmpDir2)"NAKAMURA Takumi2017-05-271-1/+1
| | | | | | It caused failures in unittests if TmpDir2 is not "/tmp" . llvm-svn: 304067
* [TableGen] Remove all the static vectors named TheActualPool.Craig Topper2017-05-271-12/+0
| | | | | | These used to hold std::unique_ptrs that managed the allocation for the various *Init object so that they would be deleted on exit. Everything is allocated in a BumpPtrAllocator name so there is no reason for these to still exist. llvm-svn: 304066
* [coroutines] Define getPassName() for coroutine passesGor Nishanov2017-05-274-0/+6
| | | | | | | | | | | | Reviewers: GorNishanov Reviewed By: GorNishanov Subscribers: EricWF, llvm-commits Differential Revision: https://reviews.llvm.org/D33622 llvm-svn: 304065
* [PartialInlining] Replace delete with unique_ptr in ↵Vitaly Buka2017-05-271-7/+3
| | | | | | | | | | | | | | computeCallsiteToProfCountMap Reviewers: davidxl Reviewed By: davidxl Subscribers: vsk, llvm-commits Differential Revision: https://reviews.llvm.org/D33220 llvm-svn: 304064
* ScalarEvolution unit test: fix typo that breaks check-allGor Nishanov2017-05-271-1/+1
| | | | llvm-svn: 304063
* [Polly] Added the list of Instructions to output in ScopInfo passTobias Grosser2017-05-274-7/+89
| | | | | | | | | | | | Summary: This patch outputs all the list of instructions in BlockStmts. Reviewers: Meinersbur, grosser, bollu Subscribers: bollu, llvm-commits, pollydev Differential Revision: https://reviews.llvm.org/D33163 llvm-svn: 304062
* Rearrange Dom unittest to accommodate multiple testsAdam Nemet2017-05-271-223/+213
| | | | | | | | | | | I've taken the approach from the LoopInfo test: * Rather than running in the pass manager just build the analyses manually * Split out the common parts (makeLLVMModule, runWithDomTree) into helpers Differential Revision: https://reviews.llvm.org/D33617 llvm-svn: 304061
* clang-format DomTree unittestAdam Nemet2017-05-271-242/+241
| | | | llvm-svn: 304060
* AArch64/PEI: Do not add reserved regs to liveinsMatthias Braun2017-05-273-5/+9
| | | | | | | We do not track liveness for reserved registers. It is unnecessary to add them to block livein lists. llvm-svn: 304059
* [SCEVExpander] Try harder to avoid introducing inttoptrKeno Fischer2017-05-273-9/+144
| | | | | | | | | | | | | | | | Summary: This fixes introduction of an incorrect inttoptr/ptrtoint pair in the included test case which makes use of non-integral pointers. I suspect there are more cases like this left, but this takes care of the one I was seeing at the moment. Reviewers: sanjoy Subscribers: mzolotukhin, llvm-commits Differential Revision: https://reviews.llvm.org/D33129 llvm-svn: 304058
* Revert "[coroutines] Support "coroutines" feature in module map requires clause"Eric Fiselier2017-05-276-30/+1
| | | | | | This reverts commit r304054. llvm-svn: 304057
* [OpenMP] Create COMDAT group for OpenMP offload registration code to avoid ↵George Rokos2017-05-2712-113/+155
| | | | | | | | | | multiple copies Thanks to Sergey Dmitriev for submitting the patch. Differential Revision: https://reviews.llvm.org/D33509 llvm-svn: 304056
* ScheduleDAGInstrs: Fix fixupKills()Matthias Braun2017-05-276-163/+56
| | | | | | | | | | | | Rewrite fixupKills() to use the LivePhysRegs class. Simplifies the code and fixes a bug where the CSR registers in return blocks where missed leading to invalid kill flags. Also remove the unnecessary rule that we wouldn't set kill flags on tied operands. No tests as I have an upcoming commit improving MachineVerifier checks to catch these cases in multiple existing lit tests. llvm-svn: 304055
* [coroutines] Support "coroutines" feature in module map requires clauseEric Fiselier2017-05-276-1/+30
| | | | | | | | | | | | | | Summary: In order for libc++ to add `<experimental/coroutine>` to its module map, there has to be a feature that can be used to detect if coroutines support is enabled in Clang. Reviewers: rsmith Reviewed By: rsmith Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D33538 llvm-svn: 304054
* [Demangler] copy changes made in libcxxabi's r303718 to ItaniumDemangleErik Pilkington2017-05-271-21/+28
| | | | llvm-svn: 304053
* [AArch64][GlobalISel] Add the Localizer pass for the O0 pipelineQuentin Colombet2017-05-274-4/+109
| | | | | | | This should fix most of the issue we have right now with constants being spilled all over the place. llvm-svn: 304052
* [GlobalISel] Add a localizer pass for target to useQuentin Colombet2017-05-277-0/+523
| | | | | | | | | | | | | This reverts commit r299287 plus clean-ups. The localizer pass is a helper pass that could be run at O0 in the GISel pipeline to work around the deficiency of the fast register allocator. It basically shortens the live-ranges of the constants so that the allocator does not spill all over the place. Long term fix would be to make the greedy allocator fast. llvm-svn: 304051
* [GVN] Recommit the patch "Add phi-translate support in scalarpre".Wei Mi2017-05-275-26/+278
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The recommit is to fix a bug about ExtractValue and InsertValue ops. For those ops, some varargs inside GVN::Expression are not value numbers but raw index numbers. It is wrong to do phi-translate for raw index numbers, and the fix is to stop doing that. Right now scalarpre doesn't have phi-translate support, so it will miss some simple pre opportunities. Like the following testcase, current scalarpre cannot recognize the last "a * b" is fully redundent because a and b used by the last "a * b" expr are both defined by phis. long a[100], b[100], g1, g2, g3; __attribute__((pure)) long goo(); void foo(long a, long b, long c, long d) { g1 = a * b; if (__builtin_expect(g2 > 3, 0)) { a = c; b = d; g2 = a * b; } g3 = a * b; // fully redundant. } The patch adds phi-translate support in scalarpre. This is only a temporary solution before the newpre based on newgvn is available. Differential Revision: https://reviews.llvm.org/D32252 llvm-svn: 304050
* BranchRelaxation: computeLiveIns() after creating new blockMatthias Braun2017-05-271-0/+4
| | | | | | | | One case in BranchRelaxation did not compute liveins after creating a new block. This is catched by existing tests with an upcoming commit that will improve MachineVerifier checking of livein lists. llvm-svn: 304049
* AArch64: Fix cmpxchg O0 expansionMatthias Braun2017-05-263-64/+74
| | | | | | | | | | | | | | - Rewrite livein calculation to use the computeLiveIns() helper function. This is slightly less efficient but easier to reason about and doesn't unnecessarily add pristine and reserved registers[1] - Zero the status register at the beginning of the loop to make sure it has a defined value. - Remove kill flags of values that need to stay alive throughout the loop. [1] An upcoming commit of mine will tighten the MachineVerifier to catch these. llvm-svn: 304048
* [llvm-pdbdump] pdb2yaml: add an -all option to dump everything we canBob Haarman2017-05-263-0/+18
| | | | | | | | | | | | Reviewers: amccarth, rnk, zturner Reviewed By: zturner Subscribers: fhahn, llvm-commits Differential Revision: https://reviews.llvm.org/D33613 llvm-svn: 304047
* Bitcode: Remove some dead code. Spotted by Teresa.Peter Collingbourne2017-05-261-23/+1
| | | | | | Differential Revision: https://reviews.llvm.org/D33609 llvm-svn: 304046
* [asan] Enable back halt_on_error-torture.cc disabled on PowerPC.Alex Shlyapnikov2017-05-261-4/+0
| | | | | | | | | | | | | | Summary: D33521 addressed a memory ordering issue in BlockingMutex, which seems to be the cause of a flakiness of a few ASan tests on PowerPC. Reviewers: eugenis Subscribers: kubamracek, nemanjai, llvm-commits Differential Revision: https://reviews.llvm.org/D33611 llvm-svn: 304045
* [InstSimplify] Push commuted op checks for and/or of icmp further down to ↵Craig Topper2017-05-261-33/+47
| | | | | | | | | | | | avoid duplicate work Previously, we called simplifyPossiblyCastedAndOrOfICmps twice with the operands commuted, but the call to simplifyAndOrOfICmpsWithConstants further down already handles commuting and doesn't need to be called both ways. This patch pushes double calls further down to just the individual routines that need to be called twice. Differential Revision: https://reviews.llvm.org/D33603 llvm-svn: 304044
* [bpf] disallow global_addr+off foldingAlexei Starovoitov2017-05-262-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | | Wrong assembly code is generated for a simple program with clang. If clang only produces IR and llc is used for IR lowering and optimization, correct assembly code is generated. The main reason is that clang feeds default Reloc::Static to llvm and llc feeds no RelocMode to llvm, where for llc case, BPF backend picks up Reloc::PIC_ mode. This leads different IR lowering behavior and clang permits global_addr+off folding while llc doesn't. This patch introduces isOffsetFoldingLegal function into BPF backend and the function always return false. This will make clang and llc behave the same for the lowering. Bug https://bugs.llvm.org//show_bug.cgi?id=33183 has more detailed explanation. Signed-off-by: Yonghong Song <yhs@fb.com> Signed-off-by: Alexei Starovoitov <ast@kernel.org> llvm-svn: 304043
* Fix test broken by r304020David Blaikie2017-05-261-1/+6
| | | | | | | | | | It's a workaround because the test was flakey passing to begin with, but it looks like (going off commit history) it really did want to test in the presence of debug info, so keep that behavior (by adding something to the CU so it's not dropped) & restore the flakey pass in the process. (added a FIXME in case someone else decides to look at it later) llvm-svn: 304042
* [Mips] Placate GCC's -Wmisleading-indentation. NFCI.Davide Italiano2017-05-261-17/+17
| | | | llvm-svn: 304041
* [lib/LTO] Don't reinvent the code for switching linkage.Davide Italiano2017-05-261-10/+4
| | | | | | Differential Revision: https://reviews.llvm.org/D33582 llvm-svn: 304040
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