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* [NFC] Update test checksDavid Bolvansky2019-05-256-156/+572
| | | | llvm-svn: 361695
* [CVP] Add tests for saturating add/sub ranges; NFCNikita Popov2019-05-251-0/+97
| | | | llvm-svn: 361694
* [LVI][CVP] Calculate with.overflow result rangeNikita Popov2019-05-252-14/+22
| | | | | | | | | | | | | In LVI, calculate the range of extractvalue(op.with.overflow(%x, %y), 0) as the range of op(%x, %y). This is mainly useful in conjunction with D60650: If the result of the operation is extracted in a branch guarded against overflow, then the value of %x will be appropriately constrained and the result range of the operation will be calculated taking that into account. Differential Revision: https://reviews.llvm.org/D60656 llvm-svn: 361693
* [LVI] Extract helper for binary range calculations; NFCNikita Popov2019-05-251-23/+28
| | | | llvm-svn: 361692
* [X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. ↵Craig Topper2019-05-2531-132/+176
| | | | | | | | | | | | | | Support LEA64_32r properly. INC/DEC is really a special case of a more generic issue. We should also turn leas into add reg/reg or add reg/imm regardless of the slow lea flags. This also supports LEA64_32 which has 64 bit input registers and 32 bit output registers. So we need to convert the 64 bit inputs to their 32 bit equivalents to check if they are equal to base reg. One thing to note, the original code preserved the kill flags by adding operands to the new instruction instead of using addReg. But I think tied operands aren't supposed to have the kill flag set. I dropped the kill flags, but I could probably try to preserve it in the add reg/reg case if we think its important. Not sure which operand its supposed to go on for the LEA64_32r instruction due to the super reg implicit uses. Though I'm also not sure those are needed since they were probably just created by an INSERT_SUBREG from a 32-bit input. Differential Revision: https://reviews.llvm.org/D61472 llvm-svn: 361691
* [X86] Add zero idioms to the haswell, broadwell, and skylake schedule ↵Craig Topper2019-05-2510-1423/+1800
| | | | | | | | | | models. Add 256-bit fp xor to sandybridge zero idioms This copies the Sandy Bridge zero idiom support to later CPUs. Adding the AVX2 and AVX512F/VL instructions as appropriate. Differential Revision: https://reviews.llvm.org/D62360 llvm-svn: 361690
* [X86][llvm-mca] Add zero idiom tests for Intel CPUs. NFCCraig Topper2019-05-255-44/+2296
| | | | | | This pre-commits tests for D62360 llvm-svn: 361689
* Revert r361644, "[AMDGPU] Divergence driven ISel. Assign register class for ↵Peter Collingbourne2019-05-2549-413/+279
| | | | | | | | | | cross block values according to the divergence." Broke sanitizer bots: http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux/builds/21694/steps/bootstrap%20clang/logs/stdio http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/32478/steps/check-llvm%20asan/logs/stdio llvm-svn: 361688
* [clangd] tweaks: Add clangBasic dependency to LINK_LIBSHeejin Ahn2019-05-251-0/+1
| | | | | | This is necessary to make builds with `-DBUILD_SHARED_LIBS=ON` work. llvm-svn: 361687
* Permit static local structured bindings to be named from arbitrary scopes ↵Richard Smith2019-05-256-7/+44
| | | | | | inside their declaring scope. llvm-svn: 361686
* Revert "[Analysis] Link library dependencies to Analysis plugins"Akira Hatanaka2019-05-254-13/+6
| | | | | | | | | | | This reverts commit r361340. The following builder has been broken for the past few days because of this commit: http://green.lab.llvm.org/green/job/clang-stage2-cmake-RgSan/ Also revert r361399, which was committed to fix r361340. llvm-svn: 361685
* Rename clangToolingRefactor to clangToolingRefactoring for consistency with ↵Nico Weber2019-05-2513-13/+13
| | | | | | | | | | its directory See "[cfe-dev] The name of clang/lib/Tooling/Refactoring". Differential Revision: https://reviews.llvm.org/D62420 llvm-svn: 361684
* llvm-dwarfdump: Don't error on mixed units using/not using str_offsetsDavid Blaikie2019-05-2510-273/+262
| | | | | | | | | | | This lead to errors when dumping binaries with v4 and v5 units linked together (but could've also errored on v5 units that did/didn't use str_offsets). Also improves error handling and messages around invalid str_offsets contributions. llvm-svn: 361683
* [analyzer] Add a prunable note for skipping vbase inits in subclasses.Artem Dergachev2019-05-247-8/+90
| | | | | | | | | | | | | When initialization of virtual base classes is skipped, we now tell the user about it, because this aspect of C++ isn't very well-known. The implementation is based on the new "note tags" feature (r358781). In order to make use of it, allow note tags to produce prunable notes, and move the note tag factory to CoreEngine. Differential Revision: https://reviews.llvm.org/D61817 llvm-svn: 361682
* [CFG] Add branch to skip vbase inits when they're handled by superclass.Artem Dergachev2019-05-2410-61/+308
| | | | | | | | | | | | | | | | | | | This patch adds the run-time CFG branch that would skip initialization of virtual base classes depending on whether the constructor is called from a superclass constructor or not. Previously the Static Analyzer was already skipping virtual base-class initializers in such constructors, but it wasn't skipping their arguments and their potential side effects, which was causing pr41300 (and was generally incorrect). The previous skipping behavior is now replaced with a hard assertion that we're not even getting there due to how our CFG works. The new CFG element is under a CFG build option so that not to break other consumers of the CFG by this change. Static Analyzer support for this change is implemented. Differential Revision: https://reviews.llvm.org/D61816 llvm-svn: 361681
* Fix crash deserializing a CUDAKernelCallExpr with a +Asserts binary.Richard Smith2019-05-242-15/+3
| | | | | | | The assertion in setConfig read from the (uninitialized) CONFIG expression. llvm-svn: 361680
* [GlobalISel][AArch64] Make FP constraint checks consider possible use/def banksJessica Paquette2019-05-243-7/+147
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In a few places in getInstrMapping, we check if use/def instructions for the instruction we're mapping have floating point constraints. We can improve this check and reduce the number of copies in GISel-compiled code if we make a couple observations: - For a def instruction, it only matters if the def instruction must always output a value stored on a FPR - For a use instruction, it only matters if the use instruction must always only take in values stored in FPRs This adds two new functions: - onlyUsesFP - onlyDefinesFP Then we can use those when we're checking the uses/defs instead. Without this patch, the load, unmerge, store, and select in the added test would have unnecessary copies. Differential Revision: https://reviews.llvm.org/D62426 llvm-svn: 361679
* [WebAssembly] Relax signature checking for undefined functions that are not ↵Sam Clegg2019-05-247-21/+65
| | | | | | | | | | | | | | | | | | | | | | | | | called directly When function signatures don't match and the undefined function is not called directly (i.e. only has its address taken) we don't issue a warning or create a runtime thunk for the undefined function. Instead in this case we simply use the defined version of the function. This is possible since checking signatures of dynamic calls happens at runtime so any invalid usage will still result in a runtime error. This is needed to allow C++ programs to link without generating warnings. Its not uncommon in C++ for vtables to be populated by function address whee the signature of the function is not known in the compilation unit. In this case clang declares the method as void(void) and relies on the vtable caller casting the data back to the correct signature. Fixes: https://bugs.llvm.org/show_bug.cgi?id=40412 Differential Revision: https://reviews.llvm.org/D62153 llvm-svn: 361678
* [GlobalISel][AArch64] NFC: Factor out HasFPConstraints into a proper functionJessica Paquette2019-05-242-41/+32
| | | | | | | | | Factor it out into a function, and replace places where we had the same check with the new function. Differential Revision: https://reviews.llvm.org/D62421 llvm-svn: 361677
* Revert Xcode scheme changes from 361675 Greg Clayton2019-05-241-7/+1
| | | | llvm-svn: 361676
* Cleanup fixed form sizes.Greg Clayton2019-05-2411-162/+87
| | | | | | | | | | | | | The fix form sizes use to have two arrays: one for 4 byte addresses and in for 8 byte addresses. The table had an issue where DW_FORM_flag_present wasn't being represented as a fixed size form because its actual size _is_ zero and zero was used to indicate the form isn't fixed in size. Any code that needed to quickly access the DWARF had to get a FixedFormSizes instance using the address byte size. This fix cleans things up by adding a DWARFFormValue::GetFixedSize() both as a static method and as a member function on DWARFFormValue. It correctly can indicate if a form size is zero. This cleanup is a precursor to a follow up patch where I hope to speed up DWARF parsing. I verified performance doesn't regress by loading hundreds of DWARF files and setting a breakpoint by file and line and by name in files that do not have DWARF indexes. Performance remained consistent between the two approaches. Differential Revision: https://reviews.llvm.org/D62416 llvm-svn: 361675
* Mark tests as x86.Alina Sbirlea2019-05-242-0/+2
| | | | llvm-svn: 361674
* [Target] Make Processes' GetLanguageRuntime non-virtualAlex Langford2019-05-241-5/+4
| | | | llvm-svn: 361673
* [DWARFExpression] Remove commented-out code (NFC)Jonas Devlieghere2019-05-241-119/+0
| | | | llvm-svn: 361672
* [dwarfdump] Add flag to limit the number of parents DIEsJonas Devlieghere2019-05-246-27/+46
| | | | | | | | | This adds `-parent-recurse-depth` which limits the number of parent DIEs being dumped. Differential revision: https://reviews.llvm.org/D62359 llvm-svn: 361671
* Default arguments are potentially constant evaluated.Richard Smith2019-05-242-5/+19
| | | | | | | | We need to eagerly instantiate constexpr functions used in them even if the default argument is never actually used, because we might evaluate portions of it when performing semantic checks. llvm-svn: 361670
* Implement call lowering without parameters on AIXJason Liu2019-05-2410-19/+168
| | | | | | | | | | | | Summary:dd This patch implements call lowering for calls without parameters on AIX as initial support. Reviewers: sfertile, hubert.reinterpretcast, aheejin, efriedma Differential Revision: https://reviews.llvm.org/D61948 llvm-svn: 361669
* Refactor use-marking to better match standard terminology. NoRichard Smith2019-05-241-162/+244
| | | | | | functionality change intended. llvm-svn: 361668
* [COFF] De-virtualize Chunk and SectionChunkReid Kleckner2019-05-244-71/+169
| | | | | | | | | | | | | | | | Shaves another pointer off of SectionChunk, reducing the size from 96 to 88 bytes, down from 144 before I started working on this. Combined with D62356, this reduced peak memory usage when linking chrome_child.dll from 713MB to 675MB, or 5%. Create NonSectionChunk to provide virtual dispatch to the rest of the chunk types. Reviewers: ruiu, aganea Differential Revision: https://reviews.llvm.org/D62362 llvm-svn: 361667
* [Process] Clean up some logic around LanguageRuntimesAlex Langford2019-05-241-7/+10
| | | | llvm-svn: 361666
* [GlobalISel][AArch64] Improve register bank mappings for G_SELECTJessica Paquette2019-05-242-6/+179
| | | | | | | | | | | | | | | | | | | | | | | | | | | The fcsel and csel instructions differ in only the register banks they work on. So, they're entirely interchangeable otherwise. With this in mind, this does two things: - Teach AArch64RegisterBankInfo to consider the inputs to G_SELECT as well as the outputs. - Teach it to choose the best register bank mapping based off the constraints of the inputs and outputs. The "best" in this case means the one that requires the smallest number of copies to properly emit a fcsel/csel. For example, if the inputs are all already going to be on FPRs, we should emit a fcsel, even if the output is a GPR. This costs one copy to produce the result, but saves us from copying the inputs into GPRs. Also update the regbank-select.mir to check that we end up with the right select instruction. Differential Revision: https://reviews.llvm.org/D62267 llvm-svn: 361665
* [Analyzer] Checker for non-determinism caused by iteration of unordered ↵Mandeep Singh Grang2019-05-247-2/+228
| | | | | | | | | | | | | | | | | | container of pointers Summary: Added a checker for non-determinism caused by iterating unordered containers like std::unordered_set containing pointer elements. Reviewers: NoQ, george.karpenkov, whisperity, Szelethus, baloghadamsoftware Reviewed By: Szelethus Subscribers: mgorny, xazax.hun, baloghadamsoftware, szepet, rnkovacs, a.sidorin, mikhail.ramalho, donat.nagy, dkrupp, jdoerfert, Charusso, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D59279 llvm-svn: 361664
* [cmake] Remove old unused version of FindZ3.cmake from clang [NFC]Don Hinton2019-05-241-0/+0
| | | | | | | | | | | | | Summary: This file was moved to llvm in D54978, r356929, but the old file was never removed. Reviewed By: beanz Tags: #clang Differential Revision: https://reviews.llvm.org/D62343 llvm-svn: 361663
* Adding an explicit triple to this test to appease build bots.Aaron Ballman2019-05-241-1/+1
| | | | llvm-svn: 361662
* [AArch64] check for INLINEASM_BR along w/ INLINEASMNick Desaulniers2019-05-241-2/+5
| | | | | | | | | | | | | | | | | | | | Summary: It looks like since INLINEASM_BR was created off of INLINEASM, a few checks for INLINEASM needed to be updated to check for either case. pr/41999 Reviewers: t.p.northover, peter.smith Reviewed By: peter.smith Subscribers: craig.topper, javed.absar, kristof.beyls, hiraditya, llvm-commits, peter.smith, srhines Tags: #llvm Differential Revision: https://reviews.llvm.org/D62402 llvm-svn: 361661
* Add JSON dumping tests for ObjC statements; add support for dumping @catch ↵Aaron Ballman2019-05-243-0/+727
| | | | | | catch-all statements. llvm-svn: 361660
* [ARM] additionally check for ARM::INLINEASM_BR w/ ARM::INLINEASMNick Desaulniers2019-05-242-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: We were observing failures for arm32 allyesconfigs of the Linux kernel with the asm goto Clang patch, where ldr's were being generated to offsets too far away to encode in imm12. It looks like since INLINEASM_BR was created off of INLINEASM, a few checks for INLINEASM needed to be updated to check for either case. pr/41999 Link: https://github.com/ClangBuiltLinux/linux/issues/490 Reviewers: peter.smith, kristof.beyls, ostannard, rengolin, t.p.northover Reviewed By: peter.smith Subscribers: jyu2, javed.absar, hiraditya, llvm-commits, nathanchance, craig.topper, kees, srhines Tags: #llvm Differential Revision: https://reviews.llvm.org/D62400 llvm-svn: 361659
* [OpenMP] Add test for requires and unified shared memory clause with declare ↵Gheorghe-Teodor Bercea2019-05-241-0/+67
| | | | | | | | | | | | | | | | | | | | | target link Summary: This patch adds a test for requires with unified share memory clause when a declare target link is present. This test needs to go in prior to changes to declare target link for comparison purposes. Reviewers: ABataev, caomhin Reviewed By: ABataev Subscribers: guansong, jdoerfert, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D62407 llvm-svn: 361658
* [COFF] Replace OutputSection* with uint16_t index in ChunkReid Kleckner2019-05-245-23/+46
| | | | | | | | | | | | | | Shaves another 8 bytes off of SectionChunk, the most commonly allocated type in LLD. These indices are only valid after we've assigned chunks to output sections and removed empty sections, so do that in a new pass. Reviewers: ruiu, aganea Differential Revision: https://reviews.llvm.org/D62356 llvm-svn: 361657
* AMDGPU: Activate all lanes when spilling CSR VGPR for SGPR spillsMatt Arsenault2019-05-248-54/+135
| | | | | | | If some lanes weren't active on entry to the function, this could clobber their VGPR values. llvm-svn: 361655
* [NewPassManager] Add tuning option: LoopUnrolling [clang-change]Alina Sbirlea2019-05-242-0/+56
| | | | | | | | | | | | | | | | Summary: Use CodeGenOpts's setting for loop unrolling. [to be coupled with D61618] Reviewers: chandlerc Subscribers: jlebar, dmgreen, cfe-commits, llvm-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D61620 llvm-svn: 361653
* Add support for dumping Objective C AST declaration nodes to JSON.Aaron Ballman2019-05-243-4/+1872
| | | | llvm-svn: 361652
* [WebAssembly] Use "linker" as linker shortname.Sam Clegg2019-05-242-10/+4
| | | | | | | | | | | This is in line with other platforms. Also, move the single statement methods into the header (also in line with other platform). Differential Revision: https://reviews.llvm.org/D62406 llvm-svn: 361651
* [ASTImporter] Call to HandleNameConflict in VisitRecordDecl mistakeningly ↵Shafik Yaghmour2019-05-241-1/+1
| | | | | | | | | | | | | using Name instead of SearchName Summary: https://reviews.llvm.org/D51633 added error handling to the ASTNodeImporter::VisitRecordDecl for the conflicting names case. This could lead to erroneous return of an error in that case since we should have been using SearchName. Name may be empty in the case where we find the name via D->getTypedefNameForAnonDecl()->getDeclName(). This fix is very similar to https://reviews.llvm.org/D59665 Differential Revision: https://reviews.llvm.org/D62352 llvm-svn: 361650
* AMDGPU: Boost inline threshold with addrspacecasted alloca argumentsMatt Arsenault2019-05-242-3/+74
| | | | | | | This was skipping GetUnderlyingObject for nonprivate addresses, but an alloca could also be found through an addrspacecast if it's flat. llvm-svn: 361649
* [LoopVectorize] update test to be independent of instcombine; NFCSanjay Patel2019-05-241-13/+13
| | | | | | | | This is a regression test for vectorization, so remove instcombine from the RUN line and adjust the comparison predicates to show what the vectorizer is creating rather than how instcombine cleans it up. llvm-svn: 361648
* [clang-tidy] In TransformerClangTidyCheck, require Explanation field.Yitzhak Mandelbaum2019-05-243-17/+33
| | | | | | | | | | | | | | | | | | | Summary: In general, the `Explanation` field is optional in `RewriteRule` cases. But, because the primary purpose of clang-tidy checks is to provide users with diagnostics, we assume that a missing explanation is a bug. This change adds an assertion that checks all cases for an explanation, and updates the code to rely on that assertion correspondingly. Reviewers: ilya-biryukov Subscribers: xazax.hun, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D62340 llvm-svn: 361647
* [CMake] Fix issues building runtimesChris Bieneman2019-05-241-3/+5
| | | | | | | | This resolves two issues: (1) LIBCXX_HEADER_DIR is a very misleadingly named variable because it shouldn't be set to the header directory, instead it needs to be the root binary dir. (2) If you build runtimes without libcxx, we can't depend on the libcxx header target, so we should instaed refer to it by the variable name which will be unset if libcxx isn't present. llvm-svn: 361646
* [CodeComplete] Add whitespace around braces in lambda completionsIlya Biryukov2019-05-242-5/+8
| | | | | | | This produces nicer output. Trivial follow-up to r361461, so sending without review. llvm-svn: 361645
* [AMDGPU] Divergence driven ISel. Assign register class for cross block ↵Alexander Timofeev2019-05-2449-279/+413
| | | | | | | | | | | | | | values according to the divergence. Details: To make instruction selection really divergence driven it is necessary to assign the correct register classes to the cross block values beforehand. For the divergent targets same value type requires different register classes dependent on the value divergence. Reviewers: rampitec, nhaehnle Differential Revision: https://reviews.llvm.org/D59990 llvm-svn: 361644
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