| Commit message (Collapse) | Author | Age | Files | Lines |
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This is a follow-up for r273544.
The end goal is to get rid of the isSwift / isCortexXY / isWhatever methods.
This commit also removes two command-line flags that weren't used in any of the
tests: widen-vmovs and swift-partial-update-clearance. The former may be easily
replaced with the mattr mechanism, but the latter may not (as it is a subtarget
property, and not a proper feature).
Differential Revision: http://reviews.llvm.org/D21797
llvm-svn: 274620
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We already have interceptors for dispatch_source API (e.g. dispatch_source_set_event_handler), but they currently only handle submission synchronization. We also need to synchronize based on the target queue (serial, concurrent), in other words, we need to use dispatch_callback_wrap. This patch implements that.
Differential Revision: http://reviews.llvm.org/D21999
llvm-svn: 274619
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Differential revision: http://reviews.llvm.org/D21984
llvm-svn: 274617
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This is a follow-up for r273544 and r273853.
The end goal is to get rid of the isSwift / isCortexXY / isWhatever methods.
This commit also marks them as obsolete.
Differential Revision: http://reviews.llvm.org/D21796
llvm-svn: 274616
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llvm-svn: 274615
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This is a regular maintenance update to ensure the latest version of isl is
tested.
Interesting Changes:
- AST nodes and expressions are now printed as YAML
llvm-svn: 274614
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The patch removes redundant kmov instructions (not all, we still have a lot of work here) and redundant "and" instructions after "setcc".
I use "AssertZero" marker between X86ISD::SETCC node and "truncate" to eliminate extra "and $1" instruction.
I also changed zext, aext and trunc patterns in the .td file. It allows to remove extra "kmov" instruictions.
This patch fixes https://llvm.org/bugs/show_bug.cgi?id=28173.
Fast ISEL mode is not supported correctly for AVX-512. ICMP/FCMP scalar instruction should return result in k-reg. It will be fixed in one of the next patches. I redirected handling of "cmp" to the DAG builder mode. (The code looks worse in one specific test case, but without this fix the new patch fails).
Differential revision: http://reviews.llvm.org/D21956
llvm-svn: 274613
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Summary:
Since "AMDGPU: Fix verifier errors in SILowerControlFlow", the logic that
ensures that a non-void-returning shader falls off the end of the last
basic block was effectively disabled, since SI_RETURN is now used.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96731
Reviewers: arsenm, tstellarAMD
Subscribers: arsenm, kzhuravl, llvm-commits
Differential Revision: http://reviews.llvm.org/D21975
llvm-svn: 274612
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Differential revision: http://reviews.llvm.org/D21957
llvm-svn: 274611
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Revision r178818 added tests for TBAA but was missing negative tests to ensure
that TBAA markers are not emitted when TBAA is off.
Differential Revision: http://reviews.llvm.org/D21295
llvm-svn: 274610
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isl is already the default code generator since we switched from CLooG several
years ago.
llvm-svn: 274609
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makes them the same as what is done when using the SSE builtins for these same encodings.
llvm-svn: 274608
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clang can special handle some of the immediate values.
llvm-svn: 274607
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MemorySSA construction
llvm-svn: 274606
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no more
llvm-svn: 274605
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Summary: This patch is an implementation of sema and parsing for the OpenMP composite pragma 'distribute simd'.
Differential Revision: http://reviews.llvm.org/D22007
llvm-svn: 274604
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llvm-svn: 274603
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native IR using the generic ctlz intrinsic in clang.
llvm-svn: 274602
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ArrayRef is a little better than passing around a pointer/length pair.
No functional change is intended.
llvm-svn: 274601
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to avx512vl.
llvm-svn: 274600
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Found using clang's code coverage tool.
llvm-svn: 274599
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This change moves all status messages that are printed in non-error mode behind
the POLLY_DEBUG flag.
llvm-svn: 274598
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There is function is currently unused and will be replaced in the future by
functions that allow to allocate memory only on the host or only on the device.
llvm-svn: 274597
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When setting the POLLY_DEBUG environment variable, on calls to the run-time
library the name of the function called is printed to stderr.
llvm-svn: 274596
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Broken by r274589.
llvm-svn: 274595
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llvm-svn: 274594
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settings or raise no error if not found.
From time to time it is useful to add some setting to work around or enable
a transitory feature. We've been reluctant to remove them later because then
we will break folks .lldbinit files. With this change you can add an "experimental"
node to the settings. If you later decide you want to keep the option, just move
it to the level that contained the "experimental" setting and it will still be
found. Or just remove it - setting it will then silently fail and won't halt
the .lldbinit file execution.
llvm-svn: 274593
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"More things" = StratifiedAttrs and various bits like interprocedural
summaries.
Patch by Jia Chen.
Differential Revision: http://reviews.llvm.org/D21964
llvm-svn: 274592
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Patch by Jia Chen.
Differential Revision: http://reviews.llvm.org/D21963
llvm-svn: 274591
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llvm-svn: 274590
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StratifiedSets (as implemented) is very fast, but its accuracy is also
limited. If we take a more aggressive andersens-like approach, we can be
way more accurate, but we'll also end up being slower.
So, we've decided to split CFLAA into CFLSteensAA and CFLAndersAA.
Long-term, we want to end up in a place where CFLSteens is queried
first; if it can provide an answer, great (since queries are basically
map lookups). Otherwise, we'll fall back to CFLAnders, BasicAA, etc.
This patch splits everything out so we can try to do something like
that when we get a reasonable CFLAnders implementation.
Patch by Jia Chen.
Differential Revision: http://reviews.llvm.org/D21910
llvm-svn: 274589
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The test is matching against 'KB' but it looks like the output can be
'MB'.
llvm-svn: 274587
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I think the Ops filled out by Regex::match contain pointers into the temporary
std::string returned by StringRef::upper. Its lifetime is extended by the call
to match, but only until the end of that call (not to the uses of Ops later
on).
llvm-svn: 274586
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it works for DWARF in .o files on Darwin.
I changed "m_is_optimized" in lldb_private::CompileUnit over to be a lldb::LazyBool so that it can be set to eLazyBoolCalculate if it needs to be parsed later. With SymbolFileDWARFDebugMap, we don't actually open the DWARF in the .o files for each compile unit until later, and we can't tell if a compile unit is optimized ahead of time. So to avoid pulling in all .o right away just so we can answer the questions of "is this compile unit optimized" we defer it until a point where we will have the compile unit parsed.
<rdar://problem/26068360>
llvm-svn: 274585
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llvm-svn: 274584
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llvm-svn: 274583
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llvm-svn: 274582
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Registers are printed a lot, so don't create temporary
std::strings. Using char instead of a string to an ostream
saves a function call.
llvm-svn: 274581
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Also added a testcase.
<rdar://problem/22786569>
llvm-svn: 274580
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llvm-svn: 274579
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llvm-svn: 274578
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llvm-svn: 274577
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The way the named arguments for various system instructions are handled at the
moment has a few problems:
- Large-scale duplication between AArch64BaseInfo.h and AArch64BaseInfo.cpp
- That weird Mapping class that I have no idea what I was on when I thought
it was a good idea.
- Searches are performed linearly through the entire list.
- We print absolutely all registers in upper-case, even though some are
canonically mixed case (SPSel for example).
- The ARM ARM specifies sysregs in terms of 5 fields, but those are relegated
to comments in our implementation, with a slightly opaque hex value
indicating the canonical encoding LLVM will use.
This adds a new TableGen backend to produce efficiently searchable tables, and
switches AArch64 over to using that infrastructure.
llvm-svn: 274576
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It's being immediately converted to a "string", but being able to tell what
type the field was originally can be useful in backends.
llvm-svn: 274575
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llvm-svn: 274574
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This reverts commit r259387 because it inserts illegal code after legalization
in some backends where i64 OR type is illegal for example.
llvm-svn: 274573
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Only support broadcast from vector register so far - memory folding support will have to wait.
llvm-svn: 274572
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enabled them for target shuffle combining
Corrected element mask masking to extract the bottom index bits (now matches the perm2 implementation but for unary inputs).
llvm-svn: 274571
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Not all code-paths set the relocation model to static for Windows. This
currently breaks on Windows ARM with `-mlong-calls` when built with clang.
Loosen the assertion to what it was previously. We would ideally ensure that
all the configuration sets Windows to static relocation model.
llvm-svn: 274570
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This only really matters when the index is non-constant since the
constant case already gets taken care of by other combines.
llvm-svn: 274569
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