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* [bindings/go] Add coroutine passeswhitequark2018-08-192-0/+25
| | | | | | | | Add Go bindings for CoroEarly, CoroSplit, CoroElide and CoroCleanup. Differential Revision: https://reviews.llvm.org/D50951 llvm-svn: 340148
* [LLVM-C] Add coroutine passeswhitequark2018-08-192-0/+72
| | | | | | Differential Revision: https://reviews.llvm.org/D50950 llvm-svn: 340147
* [C-API][DIBuilder] Added DIFlags in LLVMDIBuilderCreateBasicTypewhitequark2018-08-194-4/+11
| | | | | | | | | | | Added DIFlags in LLVMDIBuilderCreateBasicType to add optional DWARF attributes, such as DW_AT_endianity. Patch by Chirag Patel. Differential Revision: https://reviews.llvm.org/D50832 llvm-svn: 340146
* [Lex] Fix some inconsistent parameter names and duplicate comments. NFCFangrui Song2018-08-198-58/+56
| | | | llvm-svn: 340145
* [InstCombine] Add test cases for an icmp combine that is missing support for ↵Craig Topper2018-08-191-0/+51
| | | | | | splat vector constants. llvm-svn: 340144
* [SelectionDAG] Add basic demanded elements support to ComputeNumSignBits for ↵Simon Pilgrim2018-08-192-43/+36
| | | | | | | | | | BITCAST nodes Only adds support to the existing 'large element' scalar/vector to 'small element' vector bitcasts. The next step would be to support cases where the large elements aren't all sign bits, and determine the small element equivalent based on the demanded elements. llvm-svn: 340143
* [CodeGen] add test file that should have been included with r340141Sanjay Patel2018-08-191-0/+66
| | | | llvm-svn: 340142
* [CodeGen] add rotate builtins that map to LLVM funnel shift Sanjay Patel2018-08-194-0/+102
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a partial retry of rL340137 (reverted at rL340138 because of gcc host compiler crashing) with 1 change: Remove the changes to make microsoft builtins also use the LLVM intrinsics. This exposes the LLVM funnel shift intrinsics as more familiar bit rotation functions in clang (when both halves of a funnel shift are the same value, it's a rotate). We're free to name these as we want because we're not copying gcc, but if there's some other existing art (eg, the microsoft ops) that we want to replicate, we can change the names. The funnel shift intrinsics were added here: https://reviews.llvm.org/D49242 With improved codegen in: https://reviews.llvm.org/rL337966 https://reviews.llvm.org/rL339359 And basic IR optimization added in: https://reviews.llvm.org/rL338218 https://reviews.llvm.org/rL340022 ...so these are expected to produce asm output that's equal or better to the multi-instruction alternatives using primitive C/IR ops. In the motivating loop example from PR37387: https://bugs.llvm.org/show_bug.cgi?id=37387#c7 ...we get the expected 'rolq' x86 instructions if we substitute the rotate builtin into the source. Differential Revision: https://reviews.llvm.org/D50924 llvm-svn: 340141
* [NEON] Define fp16 vld and vst intrinsics conditionallyIvan A. Kosarev2018-08-194-30/+270
| | | | | | | | | | This patch fixes definitions of vld and vst NEON intrinsics so that we only define them if half-precision arithmetic is supported on the target platform, as prescribed in ACLE 2.0. Differential Revision: https://reviews.llvm.org/D49075 llvm-svn: 340140
* [X86][SSE] Add PACKSS test showing ComputeNumSignBits failure to handle ↵Simon Pilgrim2018-08-191-0/+143
| | | | | | demanded elts through a bitcast llvm-svn: 340139
* revert r340137: [CodeGen] add rotate builtinsSanjay Patel2018-08-196-199/+118
| | | | | | At least a couple of bots (gcc host compiler on PPC only?) are showing the compiler dying while trying to compile. llvm-svn: 340138
* [CodeGen] add/fix rotate builtins that map to LLVM funnel shift (retry)Sanjay Patel2018-08-196-118/+199
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a retry of rL340135 (reverted at rL340136 because of gcc host compiler crashing) with 2 changes: 1. Move the code into a helper to reduce code duplication (and hopefully work-around the crash). 2. The original commit had a formatting bug in the docs (missing an underscore). Original commit message: This exposes the LLVM funnel shift intrinsics as more familiar bit rotation functions in clang (when both halves of a funnel shift are the same value, it's a rotate). We're free to name these as we want because we're not copying gcc, but if there's some other existing art (eg, the microsoft ops that are modified in this patch) that we want to replicate, we can change the names. The funnel shift intrinsics were added here: https://reviews.llvm.org/D49242 With improved codegen in: https://reviews.llvm.org/rL337966 https://reviews.llvm.org/rL339359 And basic IR optimization added in: https://reviews.llvm.org/rL338218 https://reviews.llvm.org/rL340022 ...so these are expected to produce asm output that's equal or better to the multi-instruction alternatives using primitive C/IR ops. In the motivating loop example from PR37387: https://bugs.llvm.org/show_bug.cgi?id=37387#c7 ...we get the expected 'rolq' x86 instructions if we substitute the rotate builtin into the source. Differential Revision: https://reviews.llvm.org/D50924 llvm-svn: 340137
* revert r340135: [CodeGen] add rotate builtinsSanjay Patel2018-08-195-197/+118
| | | | | | | | At least a couple of bots (PPC only?) are showing the compiler dying while trying to compile: http://lab.llvm.org:8011/builders/clang-ppc64be-linux-multistage/builds/11065/steps/build%20stage%201/logs/stdio http://lab.llvm.org:8011/builders/clang-ppc64be-linux-lnt/builds/18267/steps/build%20stage%201/logs/stdio llvm-svn: 340136
* [CodeGen] add rotate builtinsSanjay Patel2018-08-195-118/+197
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This exposes the LLVM funnel shift intrinsics as more familiar bit rotation functions in clang (when both halves of a funnel shift are the same value, it's a rotate). We're free to name these as we want because we're not copying gcc, but if there's some other existing art (eg, the microsoft ops that are modified in this patch) that we want to replicate, we can change the names. The funnel shift intrinsics were added here: D49242 With improved codegen in: rL337966 rL339359 And basic IR optimization added in: rL338218 rL340022 ...so these are expected to produce asm output that's equal or better to the multi-instruction alternatives using primitive C/IR ops. In the motivating loop example from PR37387: https://bugs.llvm.org/show_bug.cgi?id=37387#c7 ...we get the expected 'rolq' x86 instructions if we substitute the rotate builtin into the source. Differential Revision: https://reviews.llvm.org/D50924 llvm-svn: 340135
* [X86] Fix an issue in the matching for ADDUS.Craig Topper2018-08-192-30/+14
| | | | | | | | We were basically assuming only one operand of the compare could be an ADD node and using that to swap operands. But we can have a normal add followed by a saturing add. This rewrites the canonicalization to just be based on the condition code. llvm-svn: 340134
* [X86] Add a test case showing an issue in our addusw pattern matching.Craig Topper2018-08-191-0/+41
| | | | | | We are unable to handle a normal add followed by a saturing add with certain operand orders on the icmp. llvm-svn: 340133
* [msan] Remove XFAIL: freebsd from test/msan/tls_reuse.ccFangrui Song2018-08-181-1/+0
| | | | | | This passes now. llvm-svn: 340132
* Updating MergeFunctions.rstAditya Kumar2018-08-181-191/+174
| | | | | | | | | Improving readability, removing redundant contents. Reviewers: hiraditya Differential Revision: https://reviews.llvm.org/D50686 llvm-svn: 340131
* [X86] Use SDValue::operator== instead of DAG.isEqualTo in strictly integer ↵Craig Topper2018-08-181-2/+2
| | | | | | | | matching. isEqualTo is more useful for floating point. operator== is sufficient for integer. llvm-svn: 340130
* [X86] Simplify the PADDUS legality check in combineSelect to match PSUBUS. NFCCraig Topper2018-08-181-4/+5
| | | | | | While there remove some trailing whitespace. llvm-svn: 340129
* [X86] Add support for using 512-bit PSUBUS to combineSelect.Craig Topper2018-08-182-9/+10
| | | | | | | | The code already support 128 and 256 and even knows to split 256 for AVX1. So we really just needed to stop looking for specific VTs and subtarget features and just look for legal VTs with i8/i16 elements. While there, add some curly braces around outer if statement bodies that contain only another if. It makes all the closing curly braces look more regular. llvm-svn: 340128
* [X86] Add test cases to show missed opportunities to use 512-bit PSUBUS.Craig Topper2018-08-181-0/+123
| | | | llvm-svn: 340127
* [MS Demangler] Resolve backreferences eagerly, not lazily.Zachary Turner2018-08-183-117/+210
| | | | | | | | | | | | | | | | | | | | A while back I submitted a patch to resolve backreferences lazily, thinking this that it was not always possible to know in advance what type you were looking at until you had completed a full pass over the input, and therefore it would be impossible to resolve backreferences eagerly. This was mistaken though, and turned out to be an unrelated problem. In fact, the reverse is true. You *must* resolve backreferences eagerly. This is because certain types of nested mangled symbols do not share a backreference context with their parent symbol, and as such, if you try to resolve them lazily their backreference context will have been lost by the time you finish demangling the entire input. On the other hand, resolving them eagerly appears to always work, and enables us to port many more tests over. llvm-svn: 340126
* [RuntimeDyld] Fix a bug in RuntimeDyld::loadObjectImpl that was over-allocatingLang Hames2018-08-181-1/+1
| | | | | | | | | | space for common symbols. Patch by Dmitry Sidorov. Thanks Dmitry! Differential revision: https://reviews.llvm.org/D50240 llvm-svn: 340125
* [X86] Replace all single match schedule class instregexs with instrs entriesSimon Pilgrim2018-08-186-475/+455
| | | | | | Helps reduce cost of instrw collection llvm-svn: 340124
* [X86] Merge shift/rotate schedule class instregexsSimon Pilgrim2018-08-185-102/+51
| | | | | | Helps reduce cost of instrw collection llvm-svn: 340123
* [DebugInfo] In FastISel, convert llvm.dbg.label to DBG_LABEL MI.Hsiangkai Wang2018-08-184-5/+17
| | | | | | | | Convert llvm.dbg.label(!label_metadata) to DBG_LABEL !label_metadata. Differential Revision: https://reviews.llvm.org/D50622 llvm-svn: 340122
* [X86] Add a signed test case for PR38622. Use nounwind to reduce the output ↵Craig Topper2018-08-181-25/+57
| | | | | | on the unsigned test case. llvm-svn: 340121
* [DAGCombiner] Allow divide by constant optimization on opaque constants.Craig Topper2018-08-182-2/+80
| | | | | | | | | | | | | | | | | Summary: I believe this restores the behavior we had before r339147. Fixes PR38622. Reviewers: RKSimon, chandlerc, spatel Reviewed By: chandlerc Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D50936 llvm-svn: 340120
* Revert "Add a basic integration test for C++ smart pointers"Bruno Cardoso Lopes2018-08-181-41/+0
| | | | | | | | | | | This reverts commit 73786631984289b3d601034b2bf4ba2b8f5845eb. Revert r339961 since its causing debuginfo-tests to fail: http://green.lab.llvm.org/green/job/clang-stage1-configure-RA/48514/ rdar://problem/43449629 llvm-svn: 340119
* Add the extended XMM registers mappings for AVX-512.Zachary Turner2018-08-182-0/+34
| | | | | | | After this we should have the entire AVX-512 register set mapping in place. llvm-svn: 340118
* Revert "[analyzer] [NFC] Split up RetainSummaryManager from RetainCountChecker"Bruno Cardoso Lopes2018-08-1814-270/+335
| | | | | | | | | | | | | | This reverts commit a786521fa66c72edd308baff0c08961b6d964fb1. Bots haven't caught up yet, but broke modules build with: ../tools/clang/include/clang/StaticAnalyzer/Checkers/MPIFunctionClassifier.h:18:10: fatal error: cyclic dependency in module 'Clang_StaticAnalyzer_Core': Clang_StaticAnalyzer_Core -> Clang_Analysis -> Clang_StaticAnalyzer_Checkers -> Clang_StaticAnalyzer_Core ^ llvm-svn: 340117
* [ORC] Fix some parameter names. NFC.Lang Hames2018-08-181-4/+4
| | | | llvm-svn: 340116
* [ORC] Rename 'finalize' to 'emit' to avoid potential confusion.Lang Hames2018-08-186-94/+101
| | | | | | | | | | | | | | | An emitted symbol has had its contents written and its memory protections applied, but it is not automatically ready to execute. Prior to ORC supporting concurrent compilation, the term "finalized" could be interpreted two different (but effectively equivalent) ways: (1) The finalized symbol's contents have been written and its memory protections applied, and (2) the symbol is ready to run. Now that ORC supports concurrent compilation, sense (1) no longer implies sense (2). We have already introduced a new term, 'ready', to capture sense (2), so rename sense (1) to 'emitted' to avoid any lingering confusion. llvm-svn: 340115
* [analyzer] [NFC] Split up RetainSummaryManager from RetainCountCheckerGeorge Karpenkov2018-08-1814-335/+270
| | | | | | | | | | | | | ARCMigrator is using code from RetainCountChecker, which is a layering violation (and it also does it badly, by using a different header, and then relying on implementation being present in a header file). This change splits up RetainSummaryManager into a separate library in lib/Analysis, which can be used independently of a checker. Differential Revision: https://reviews.llvm.org/D50934 llvm-svn: 340114
* MC: Remove dead code from WinCOFFObjectWriter.cpp. NFCI.Peter Collingbourne2018-08-181-20/+0
| | | | | | | | Remove code for writing auxiliary symbols of type function definition and begin function. These types of symbols are associated with pre-CodeView debug info and we never emit them. llvm-svn: 340113
* Skip tests on Darwin for now. The build bots are not passing due to heavy ↵Greg Clayton2018-08-188-3/+24
| | | | | | load and poor machines. llvm-svn: 340112
* [GISel]: Add Legalization/lowering code for bit counting operationsAditya Nandakumar2018-08-187-1/+517
| | | | | | | | | | https://reviews.llvm.org/D48847#inline-448257 Ported legalization expansions for CTLZ/CTTZ from DAG to GISel. Reviewed by rtereshin. llvm-svn: 340111
* Quickfix for failing tests.George Karpenkov2018-08-171-2/+2
| | | | llvm-svn: 340110
* [index] For an ObjC message call, also record as receivers the protocols if ↵Argyrios Kyrtzidis2018-08-172-4/+38
| | | | | | they are present in the ObjC type llvm-svn: 340109
* [AST] Clarify printing of unknown size locations [NFC]Philip Reames2018-08-172-1/+26
| | | | | | Printing "unknown" is much more clear than an arbitrary large integer llvm-svn: 340108
* [llvm-objcopy] Implement -G/--keep-global-symbol(s).Jordan Rupprecht2018-08-174-0/+200
| | | | | | | | | | | | | | | | | Summary: Port GNU Objcopy -G/--keep-global-symbol(s). This is slightly different than the already-implemented --globalize-symbol, which marks a symbol as global when copying. When --keep-global-symbol (alias -G) is used, *only* those symbols marked will stay global, and all other globals are demoted to local. (Also note that it doesn't *promote* a symbol to global). Additionally, there is a pluralized version of the flag --keep-global-symbols, which effectively applies --keep-global-symbol for every non-comment in a file. Reviewers: jakehehrlich, jhenderson, alexshap Reviewed By: jhenderson Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D50589 llvm-svn: 340105
* [DebugCounters] don't do redundant map lookups; NFCGeorge Burgess IV2018-08-171-4/+8
| | | | llvm-svn: 340104
* [ObjC] Error out when using forward-declared protocol in a @protocolAlex Lorenz2018-08-1715-38/+50
| | | | | | | | | | | | | | | | | | | | | | expression Clang emits invalid protocol metadata when a @protocol expression is used with a forward-declared protocol. The protocol metadata is missing protocol conformance list of the protocol since we don't have access to the definition of it in the compiled translation unit. The linker then might end up picking the invalid metadata when linking which will lead to incorrect runtime protocol conformance checks. This commit makes sure that Clang fails to compile code that uses a @protocol expression with a forward-declared protocol. This ensures that Clang does not emit invalid protocol metadata. I added an extra assert in CodeGen to ensure that this kind of issue won't happen in other places. rdar://32787811 Differential Revision: https://reviews.llvm.org/D49462 llvm-svn: 340102
* Don't warn on returning the address of a label from a statement expressionReid Kleckner2018-08-172-0/+13
| | | | | | | | | | | | | | | | | Summary: There isn't anything inherently wrong with returning a label from a statement expression. In practice, the Linux kernel uses this pattern to materialize PCs. Fixes PR38569 Reviewers: niravd, rsmith, nickdesaulniers Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D50805 llvm-svn: 340101
* [AST][Tests] Clarify what each test is doingPhilip Reames2018-08-171-20/+23
| | | | llvm-svn: 340100
* [AST[Tests] Shorten tests using noalias paramsPhilip Reames2018-08-171-12/+4
| | | | llvm-svn: 340099
* [analyzer] [NFC] Minor refactoring of ISL-specific code in RetainCountCheckerGeorge Karpenkov2018-08-172-14/+9
| | | | | | Differential Revision: https://reviews.llvm.org/D50879 llvm-svn: 340098
* [analyzer] Re-instate support for MakeCollectable is RetainCountCheckerGeorge Karpenkov2018-08-177-522/+679
| | | | | | Differential Revision: https://reviews.llvm.org/D50872 llvm-svn: 340097
* [analyzer] [NFC] Move ObjCRetainCount to include/AnalysisGeorge Karpenkov2018-08-174-3/+3
| | | | | | Differential Revision: https://reviews.llvm.org/D50869 llvm-svn: 340096
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