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After much back and forth, I decided to deviate from ARM design and split LDR into 4 instructions (r + imm12, r + imm8, r + r << imm12, constantpool). The advantage of this is 1) it follows the latest ARM technical manual, and 2) makes it easier to reduce the width of the instruction later. The down side is this creates more inconsistency between the two sub-targets. We should split ARM LDR instruction in a similar fashion later. I've added a README entry for this.
llvm-svn: 74420
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llvm-svn: 74419
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llvm-svn: 74418
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Implemented by making lib/CompilerDriver a shared library that holds all the
global static data (CommandLine options, plugin registry) that we unfortunately
have to live with.
llvm-svn: 74417
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llvm-svn: 74416
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llvm-svn: 74415
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llvm-svn: 74414
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Fixes PR4470.
llvm-svn: 74413
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default to on.
llvm-svn: 74412
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The issue this was working around is no longer present in TOT clang.
llvm-svn: 74411
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llvm-svn: 74410
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handled by RetrieveArray().
llvm-svn: 74409
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symbol.
llvm-svn: 74408
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llvm-svn: 74407
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memregion.
llvm-svn: 74406
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function attributes. There are predefined macros that are defined when stack
protectors are used: __SSP__=1 with -fstack-protector and __SSP_ALL__=2 with
-fstack-protector-all.
llvm-svn: 74405
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Handle rules for ExtVector + ExtVector and ExtVector + Scalar operations.
Fix problem Eli noticed where we were allowing pointer types to be splatted to
vector elements.
llvm-svn: 74404
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llvm-svn: 74402
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llvm-svn: 74401
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llvm-svn: 74400
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doesn't have an IV-based operand. This fixes PR4471.
llvm-svn: 74399
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LoopInfo will handle removing it from the Loop, as well as updating
its own tables.
llvm-svn: 74398
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llvm-svn: 74397
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when one of them can be converted to a trivial icmp and conditional
branch.
This addresses what is essentially a phase ordering problem.
SimplifyCFG knows how to do this transformation, but it doesn't do so
if the primary block has any instructions in it other than an icmp and
a branch. In the given testcase, the block contains other instructions,
however they are loop-invariant and can be hoisted. SimplifyCFG doesn't
have LoopInfo though, so it can't hoist them. And, it's important that
the blocks be merged before LoopRotation, as it doesn't support
multiple-exit loops.
llvm-svn: 74396
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llvm-svn: 74395
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llvm-svn: 74394
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of a team of individual allocations and a team of std::maps.
llvm-svn: 74393
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llvm-svn: 74392
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llvm-svn: 74391
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llvm-svn: 74390
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llvm-svn: 74389
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out an error for a malformed __builtin_offsetof.
llvm-svn: 74388
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llvm-svn: 74387
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llvm-svn: 74386
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llvm-svn: 74385
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llvm-svn: 74384
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making sure we return true when annotating a function template with
explicit template arguments, but not when we don't annotate anything.)
llvm-svn: 74383
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llvm-svn: 74382
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it doesn't actually work yet; we just error out a bit more gracefully.
llvm-svn: 74381
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parameter has a dependent type.
llvm-svn: 74380
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target-specific operand printing functionality. Yay.
llvm-svn: 74379
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llvm-svn: 74378
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llvm-svn: 74377
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inserted to replace that value must dominate all of of the basic
blocks associated with the uses of the value in the PHI, not just
one of them.
llvm-svn: 74376
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llvm-svn: 74375
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a base register. We just ignore it for now.
llvm-svn: 74374
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globals. This implements remat-constant.ll even without aggressive-remat.
llvm-svn: 74373
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implementation primarily differs from the former in that the asmprinter
doesn't make a zillion decisions about whether or not something will be
RIP relative or not. Instead, those decisions are made by isel lowering
and propagated through to the asm printer. To achieve this, we:
1. Represent RIP relative addresses by setting the base of the X86 addr
mode to X86::RIP.
2. When ISel Lowering decides that it is safe to use RIP, it lowers to
X86ISD::WrapperRIP. When it is unsafe to use RIP, it lowers to
X86ISD::Wrapper as before.
3. This removes isRIPRel from X86ISelAddressMode, representing it with
a basereg of RIP instead.
4. The addressing mode matching logic in isel is greatly simplified.
5. The asmprinter is greatly simplified, notably the "NotRIPRel" predicate
passed through various printoperand routines is gone now.
6. The various symbol printing routines in asmprinter now no longer infer
when to emit (%rip), they just print the symbol.
I think this is a big improvement over the previous situation. It does have
two small caveats though: 1. I implemented a horrible "no-rip" modifier for
the inline asm "P" constraint modifier. This is a short term hack, there is
a much better, but more involved, solution. 2. I had to xfail an
-aggressive-remat testcase because it isn't handling the use of RIP in the
constant-pool reading instruction. This specific test is easy to fix without
-aggressive-remat, which I intend to do next.
llvm-svn: 74372
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llvm-svn: 74371
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by Evan.
llvm-svn: 74370
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