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* GPGPU: Map initial schedule to GPU scheduleTobias Grosser2016-07-144-7/+73
| | | | | | | | This change now applies ppcg's GPU mapping on our initial schedule. For this to work, we need to also initialize the set of all names (isl_ids) used in the scop as well as the program context. llvm-svn: 275396
* GPGPU: Do not dump schedule by defaultTobias Grosser2016-07-141-1/+1
| | | | llvm-svn: 275395
* mark newly failing tests as XFAILPavel Labath2016-07-142-2/+6
| | | | llvm-svn: 275394
* [test] [linux] define PR_SET_PTRACER constants if the system does not ↵Pavel Labath2016-07-141-3/+8
| | | | | | | | | | provide them Android API <= 16 header do not have these symbols defined, but the kernel does support the relevant calls. And in general, since these calls are on a best-effort basis, it won't hurt even if we try to run in on a really ancient kernel. llvm-svn: 275393
* [NFC] Add full title/author information to "Apply the BLIS matmul ↵Roman Gareev2016-07-141-6/+11
| | | | | | optimization pattern" llvm-svn: 275392
* [X86][AVX2] VBROADCASTSSrr/VBROADCASTSSYrr require AVX2 not AVXSimon Pilgrim2016-07-141-1/+1
| | | | llvm-svn: 275391
* GPGPU: compute new schedule from polly scopTobias Grosser2016-07-146-17/+164
| | | | | | | | | | | | | | | | | | | | To do so we copy the necessary information to compute an initial schedule from polly::Scop to ppcg's scop. Most of the necessary information is directly available and only needs to be passed on to ppcg, with the exception of 'tagged' access relations, access relations that additionally carry information about which memory access an access relation originates from. We could possibly perform the construction of tagged accesses as part of ScopInfo, but as this format is currently specific to ppcg we do not do this yet, but keep this functionality local to our GPU code generation. After the scop has been initialized, we compute data dependences and ask ppcg to compute an initial schedule. Some of this functionality is already available in polly::DependenceInfo and polly::ScheduleOptimizer, but to keep differences to ppcg small we use ppcg's functionality here. We may later investiage if a closer integration of these tools makes sense. llvm-svn: 275390
* GPGPU: create default initialized PPCG scop and gpu programTobias Grosser2016-07-146-3/+214
| | | | | | | | | | | | | | At this stage, we do not yet modify the IR but just generate a default initialized ppcg_scop and gpu_prog and free both immediately. Both will later be filled with data from the polly::Scop and are needed to use PPCG for GPU schedule generation. This commit does not yet perform any GPU code generation, but ensures that the basic infrastructure has been put in place. We also add a simple test case to ensure the new code is run and use this opportunity to verify that GPU_CODEGEN tests are only run if GPU code generation has been enabled in cmake. llvm-svn: 275389
* [clang-rename] add documentationBenjamin Kramer2016-07-142-0/+100
| | | | | | | | | | | clang-rename needs at least to have a minimum documentation to provide a small introduction for new users Patch by Kirill Bobyrev! Differential Revision: http://reviews.llvm.org/D22129 llvm-svn: 275388
* [clang-rename] exit code-related bugfix and code cleanupBenjamin Kramer2016-07-145-28/+47
| | | | | | | | | | | | | | This patch does the following: * enforces proper formatting for few files (i.e. deals with 80 linewidth violations and few other things) * ensures '\n' chars are passed to the output streams instead of "\n" strings * fixes a bug caused by calling cl::PrintHelpMessage(), which occasionally calls exit(0), so that exit(1) (which is right after cl::PrintHelpMessage line) becomes dead code Patch by Kirill Bobyrev! Differential Revision: http://reviews.llvm.org/D22091 llvm-svn: 275387
* [include-fixer] Correct an incorrecst judgement about prefix scoped qualifiers.Haojian Wu2016-07-142-5/+15
| | | | | | | | | | | | | | | Summary: The judgement that checks whether the fully-qualified name has scoped qualifiers prefix is incorrect. Should always check whether the first matched postion is the beginning position. Reviewers: bkramer Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D22343 llvm-svn: 275386
* [ELF] r275383 reverted due to buildbot failureEugene Leviant2016-07-142-14/+3
| | | | llvm-svn: 275385
* [X86][AVX512F] minor fix of the parameter namesAsaf Badouh2016-07-141-18/+18
| | | | | | add "__" prefix llvm-svn: 275384
* [ELF] Allow overriding reserved symbols in linker scriptsEugene Leviant2016-07-142-3/+14
| | | | llvm-svn: 275383
* This implements a more optimal algorithm for selecting a base constant inSjoerd Meijer2016-07-148-7/+186
| | | | | | | | | | | | | | constant hoisting. It not only takes into account the number of uses and the cost of expressions in which constants appear, but now also the resulting integer range of the offsets. Thus, the algorithm maximizes the number of uses within an integer range that will enable more efficient code generation. On ARM, for example, this will enable code size optimisations because less negative offsets will be created. Negative offsets/immediates are not supported by Thumb1 thus preventing more compact instruction encoding. Differential Revision: http://reviews.llvm.org/D21183 llvm-svn: 275382
* Fix -break-enable/-break-disable commands (MI)Ilia K2016-07-142-23/+48
| | | | | | | | | | | | | * Previously -break-enable mistakenly set BP's enabled flag to false. * These commands print fake =breakpoint-modified messages, what's not needed anymore because that events are come in normal way. * Add tests for -break-enable/-break-disable commands Initial patch from xuefangliang@hotmail.com. The test case was improved by me. Differential Revision: http://reviews.llvm.org/D21757 llvm-svn: 275381
* [InstCombine] Masked loads with undef masks can fold to normal loadsDavid Majnemer2016-07-142-6/+28
| | | | | | | | We were able to fold masked loads with an all-ones mask to a normal load. However, we couldn't turn a masked load with a mask with mixed ones and undefs into a normal load. llvm-svn: 275380
* Simplify llvm.masked.load w/ undef masksDavid Majnemer2016-07-143-19/+49
| | | | | | | We can always pick the passthru value if the mask is undef: we are permitted to treat the mask as-if it were filled with zeros. llvm-svn: 275379
* [AVX512] Implement EXTLOAD lowering with patterns to select existing VPMOVZX ↵Craig Topper2016-07-141-46/+76
| | | | | | instructions instead of creating CodeGenOnly instructions. llvm-svn: 275378
* Use hasFlag instead of hasArgDean Michael Berris2016-07-141-2/+2
| | | | | | | | | | | | Summary: Fix the build to use hasFlag instead of hasArg for checking some flags. Reviewers: echristo Subscribers: mehdi_amini, cfe-commits Differential Revision: http://reviews.llvm.org/D22338 llvm-svn: 275377
* [X86] Fix stupid typo in isel lowering.Eli Friedman2016-07-142-1/+37
| | | | | | | Apparently someone miscounted the number of zeros in the immediate. Fixes https://llvm.org/bugs/show_bug.cgi?id=28544 . llvm-svn: 275376
* AMDGPU/R600: Delete/rename intrinsics no longer used by mesaMatt Arsenault2016-07-1424-1721/+1450
| | | | | | Use the replacement pass to update the tests, and delete old names. llvm-svn: 275375
* Set sh_addralign to 1 instead of 0.Rui Ueyama2016-07-143-10/+5
| | | | | | | | ELF spec says that alignment of 0 is equivalent to 1. Previously, we arbitrary set to 0 or 1, but always setting to 1 makes our program simpler. llvm-svn: 275374
* Attempt to unbreak msan bot.Rui Ueyama2016-07-141-1/+4
| | | | | | | | r275301 made .got section be aligned on Target->GotEntrySize, so GotEntrySize must have been initialized. We didn't initialize it for AMDGPU. llvm-svn: 275373
* AMDGPU/R600: Remove intrinsics with no tests and no usersMatt Arsenault2016-07-144-76/+15
| | | | | | Mesa removed this path, so nothing is using these anymore. llvm-svn: 275372
* AMDGPU: Remove unused intrinsicsMatt Arsenault2016-07-143-119/+0
| | | | llvm-svn: 275371
* AMDGPU: Fix test not actually testing anythingMatt Arsenault2016-07-142-4/+28
| | | | | | | | | | It wasn't actually running the pass, and since it is missing the llvm prefix, the eh intrinsic was not really an IntrinsicInst. Also add missing test for lifetime markers. llvm-svn: 275370
* AMDGPU: Remove dead codeMatt Arsenault2016-07-142-10/+0
| | | | llvm-svn: 275369
* Add C++ dependencies to xray runtimeDean Michael Berris2016-07-141-2/+17
| | | | | | | | | | | | | | | | Summary: Depends on D21982 which implements the in-memory logging implementation of the XRay runtime. These additional changes also depends on D20352 which adds the bulk of XRay flags/dependencies when using the `-fxray-instrument` flag from Clang. Reviewers: echristo, rnk, aaron.ballman Subscribers: mehdi_amini, cfe-commits Differential Revision: http://reviews.llvm.org/D21983 llvm-svn: 275368
* XRay: Add entry and exit sledsDean Michael Berris2016-07-1418-12/+317
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: In this patch we implement the following parts of XRay: - Supporting a function attribute named 'function-instrument' which currently only supports 'xray-always'. We should be able to use this attribute for other instrumentation approaches. - Supporting a function attribute named 'xray-instruction-threshold' used to determine whether a function is instrumented with a minimum number of instructions (IR instruction counts). - X86-specific nop sleds as described in the white paper. - A machine function pass that adds the different instrumentation marker instructions at a very late stage. - A way of identifying which return opcode is considered "normal" for each architecture. There are some caveats here: 1) We don't handle PATCHABLE_RET in platforms other than x86_64 yet -- this means if IR used PATCHABLE_RET directly instead of a normal ret, instruction lowering for that platform might do the wrong thing. We think this should be handled at instruction selection time to by default be unpacked for platforms where XRay is not availble yet. 2) The generated section for X86 is different from what is described from the white paper for the sole reason that LLVM allows us to do this neatly. We're taking the opportunity to deviate from the white paper from this perspective to allow us to get richer information from the runtime library. Reviewers: sanjoy, eugenis, kcc, pcc, echristo, rnk Subscribers: niravd, majnemer, atrick, rnk, emaste, bmakam, mcrosier, mehdi_amini, llvm-commits Differential Revision: http://reviews.llvm.org/D19904 llvm-svn: 275367
* [SCCP] Pass a Value * instead of templating this function. NFC.Davide Italiano2016-07-141-9/+8
| | | | | | Thanks to Eli for the suggestion! llvm-svn: 275366
* [OpenMP] Sema and parsing for 'target parallel for simd' pragmaKelvin Li2016-07-1446-12/+4555
| | | | | | | | This patch is to implement sema and parsing for 'target parallel for simd' pragma. Differential Revision: http://reviews.llvm.org/D22096 llvm-svn: 275365
* clarify a bit.Chris Lattner2016-07-141-1/+1
| | | | llvm-svn: 275364
* [IPSCCP] Constant fold struct argument/instructions when all the lattice ↵Davide Italiano2016-07-142-13/+15
| | | | | | | | | | | values are constant. This now should also work with the interprocedural variant of the pass. Slightly easier now that the yak is shaved. Differential Revision: http://reviews.llvm.org/D22329 llvm-svn: 275363
* [lld] Update LLD for Archive::child_iterator change in LLVM r275361.Lang Hames2016-07-146-22/+33
| | | | llvm-svn: 275362
* [Object] Re-apply r275316 now that I have the corresponding LLD patch ready.Lang Hames2016-07-1415-197/+236
| | | | llvm-svn: 275361
* Teach fast isel about thiscall (and callee-pop) calls.Nico Weber2016-07-142-10/+26
| | | | | | http://reviews.llvm.org/D22315 llvm-svn: 275360
* [Scalarizer] PR28108: Skip over nullptr rather than crashing on it.Mehdi Amini2016-07-142-1/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: In Scalarizer::gather we see if we already have a scattered form of Op, and in that case use the new form. In the particular case of PR28108, the found ValueVector SV has size 2, where the first Value is nullptr, and the second is indeed a proper Value. The nullptr then caused an assert to blow when we tried to do cast<Instruction>(SV[I]). With this patch we check SV[I] before doing the cast, and if it's nullptr we just skip over it. I don't know the Scalarizer well enough to know if this is the best fix or if something should be done else where to prevent the nullptr from being in the ValueVector at all, but at least this avoids the crash and looking at the test case output it looks reasonable. Reviewers: hfinkel, frasercrmck, wala, mehdi_amini Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D21518 llvm-svn: 275359
* Add missing test for r275347 "[IPRA] Set callee saved registers to none for ↵Mehdi Amini2016-07-141-0/+30
| | | | | | local function when IPRA is enabled." llvm-svn: 275358
* [SCCP] Generalize tryToReplaceInstWithConstant to work also with arguments.Davide Italiano2016-07-141-22/+18
| | | | llvm-svn: 275357
* Add a comment mirroring the one in LLVM's Dwarf.hAdrian Prantl2016-07-141-0/+1
| | | | llvm-svn: 275356
* MIRParser: Fix MIRParser not reporting nullptr on error.Matthias Braun2016-07-141-1/+1
| | | | | | | While some code paths in MIRParserImpl::parse() already returned nullptr in case of error one of the important ones did not. llvm-svn: 275355
* Synchronize LLVM and clang's ObjCDeclSpec::ObjCPropertyAttributeKind.Adrian Prantl2016-07-147-19/+77
| | | | | | | | | | This adds Clang-specific DWARF constants for nullability and ObjC class properties that are already generated by clang. This patch adds dwarfdump support and a more comprehensive testcase. <rdar://problem/27335745> llvm-svn: 275354
* [Object] Revert r275316, Archive::child_iterator changes, while I update lld.Lang Hames2016-07-1415-236/+197
| | | | | | Should fix the bots broken by r275316. llvm-svn: 275353
* [ConstantFolding] Fold masked loadsDavid Majnemer2016-07-142-1/+47
| | | | | | | | | We can constant fold a masked load if the operands are appropriately constant. Differential Revision: http://reviews.llvm.org/D22324 llvm-svn: 275352
* www/cxx_status: give more precise links to initialization order wordingRichard Smith2016-07-141-2/+6
| | | | llvm-svn: 275351
* P0305R0: Semantic analysis and code generation for C++17 init-statement for ↵Richard Smith2016-07-1422-62/+369
| | | | | | | | | | 'if' and 'switch': if (stmt; condition) { ... } Patch by Anton Bikineev! Some minor formatting and comment tweets by me. llvm-svn: 275350
* Force a semicolon at the end of the LLVM_ENABLE_BITMASK_ENUMS_IN_NAMESPACE() ↵Justin Lebar2016-07-131-1/+2
| | | | | | | | macro. This silences a warning about an extra semicolon on gcc. llvm-svn: 275349
* Add EnableIPRA to TargetOptions, and move the cl::opt -enable-ipra to ↵Mehdi Amini2016-07-135-13/+17
| | | | | | | | | | | | TargetMachine.cpp Avoid exposing a cl::opt in a public header and instead promote this option in the API. Alternatively, we could land the cl::opt in CommandFlags.h so that it is available to every tool, but we would still have to find an option for clang. llvm-svn: 275348
* [IPRA] Set callee saved registers to none for local function when IPRA is ↵Mehdi Amini2016-07-135-10/+46
| | | | | | | | | | | | | | | | | | | | enabled. IPRA try to optimize caller saved register by propagating register usage information from callee to caller so it is beneficial to have caller saved registers compare to callee saved registers when IPRA is enabled. Please find more detailed explanation here https://groups.google.com/d/msg/llvm-dev/XRzGhJ9wtZg/tjAJqb0eEgAJ. This change makes local function do not have any callee preserved register when IPRA is enabled. A simple test case is also added to verify this change. Patch by Vivek Pandya <vivekvpandya@gmail.com> Differential Revision: http://reviews.llvm.org/D21561 llvm-svn: 275347
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