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* CUDA: the device and host attributes must be inheritable, in orderPeter Collingbourne2012-05-201-2/+2
| | | | | | | to deal with NVIDIA's headers. We'll need to think of another way to handle multiple host/device definitions within the same TU. llvm-svn: 157171
* test/Tooling/clang-check-pwd.cpp: Mark as XFAIL:mingw for now. Fixing is ↵NAKAMURA Takumi2012-05-201-0/+1
| | | | | | work-in-progress. llvm-svn: 157170
* Clear kill flags on the fly when joining intervals.Jakob Stoklund Olesen2012-05-201-36/+22
| | | | | | | | | | | With physreg joining out of the way, it is easy to recognize the instructions that need their kill flags cleared while testing for interference. This allows us to skip the final scan of all instructions for an 11% speedup of the coalescer pass. llvm-svn: 157169
* CUDA: add CodeGen support for global variable address spaces.Peter Collingbourne2012-05-206-6/+67
| | | | | | | | | Because in CUDA types do not have associated address spaces, globals are declared in their "native" address space, and accessed by bitcasting the pointer to address space 0. This relies on address space 0 being a unified address space. llvm-svn: 157167
* Add RPO to the lexicon.Nick Lewycky2012-05-201-0/+2
| | | | llvm-svn: 157166
* Make the global base reg GR32_NOSP.Jakob Stoklund Olesen2012-05-201-1/+1
| | | | | | It can sometimes be used in addressing modes that don't support %ESP. llvm-svn: 157165
* Constrain regclasses in PeepholeOptimizer.Jakob Stoklund Olesen2012-05-201-1/+10
| | | | | | | It can be necessary to restrict to a sub-class before accessing sub-registers. llvm-svn: 157164
* Constrain register classes in TailDup.Jakob Stoklund Olesen2012-05-201-3/+5
| | | | | | | When rewriting operands, make sure the new registers have a compatible register class. llvm-svn: 157163
* When legalising shifts, do not pre-build a list of operands whichPeter Collingbourne2012-05-202-10/+32
| | | | | | | may be RAUW'd by the recursive call to LegalizeOps; instead, retrieve the other operands when calling UpdateNodeOperands. Fixes PR12889. llvm-svn: 157162
* Emit memcmp directly from the StringMatcherEmitter.Benjamin Kramer2012-05-201-4/+4
| | | | | | | | | There should be no difference in the resulting binary, given a sufficiently smart compiler. However we already had compiler timeouts on the generated code in Intrinsics.gen, this hopefully makes the lives of slow buildbots a little easier. llvm-svn: 157161
* Plug a leak when using MCJIT.Benjamin Kramer2012-05-202-3/+4
| | | | | | Found by valgrind. llvm-svn: 157160
* Add a missing PPC 64-bit stwu pattern.Hal Finkel2012-05-202-0/+36
| | | | | | | This seems to fix the remaining compile-time failures on PPC64 when compiling with -enable-ppc-preinc. llvm-svn: 157159
* Bitpack CodeCompletionResults.Benjamin Kramer2012-05-202-39/+32
| | | | llvm-svn: 157158
* Add documentation regarding -fno-rtti.Howard Hinnant2012-05-201-0/+9
| | | | llvm-svn: 157157
* Use TargetMachine's register info instead of creating a new one and leaking it.Benjamin Kramer2012-05-201-1/+1
| | | | llvm-svn: 157155
* Fix test for 32-bit hosts.Jakob Stoklund Olesen2012-05-201-1/+1
| | | | llvm-svn: 157154
* Use the right register class for LDRrs.Jakob Stoklund Olesen2012-05-202-3/+3
| | | | llvm-svn: 157152
* Transfer memory operands to the right instruction.Jakob Stoklund Olesen2012-05-202-5/+5
| | | | | | They need to go on the PICLDR as the verifier points out. llvm-svn: 157151
* Properly constrain register classes for sub-registers.Jakob Stoklund Olesen2012-05-202-2/+4
| | | | | | Not all GR64 registers have sub_8bit sub-registers. llvm-svn: 157150
* Properly constrain register classes in 2-addr.Jakob Stoklund Olesen2012-05-202-1/+7
| | | | | | | X86 has 2-addr instructions with different constraints on the tied def and use operands. One is GR32, one is GR32_NOSP. llvm-svn: 157149
* Missed a push_back in r157147.Jakob Stoklund Olesen2012-05-201-1/+0
| | | | llvm-svn: 157148
* Avoid deleting extra copies when RegistersDefinedFromSameValue is true.Jakob Stoklund Olesen2012-05-201-7/+8
| | | | | | | This function adds copies to be erased to DupCopies, avoid also adding them to DeadCopies. llvm-svn: 157147
* Fix build bots.Jakob Stoklund Olesen2012-05-201-4/+4
| | | | | | Avoid looking at the operands of a potentially erased instruction. llvm-svn: 157146
* LiveRangeQuery simplifies shrinkToUses().Jakob Stoklund Olesen2012-05-201-10/+6
| | | | llvm-svn: 157145
* Use LiveRangeQuery in ScheduleDAGInstrs.Jakob Stoklund Olesen2012-05-201-11/+3
| | | | llvm-svn: 157144
* Eliminate some uses of struct LiveRange.Jakob Stoklund Olesen2012-05-201-12/+15
| | | | | | That struct ought to be a LiveInterval implementation detail. llvm-svn: 157143
* Use LiveRangeQuery instead of getLiveRangeContaining().Jakob Stoklund Olesen2012-05-201-4/+4
| | | | llvm-svn: 157142
* Add a LiveRangeQuery class.Jakob Stoklund Olesen2012-05-201-0/+85
| | | | | | | | | | | This class is meant to be the primary interface for examining a live range in the vicinity on a given instruction. It avoids all the messy dealings with iterators and early clobbers. This is a more abstract interface to live ranges, hiding the implementation as a vector of segments. llvm-svn: 157141
* Do not pass an invalid domtree to SimplifyInstruction fromPeter Collingbourne2012-05-202-2/+27
| | | | | | LoopUnswitch. Fixes PR12887. llvm-svn: 157140
* Error when using typeid() with -fno-rtti. PR 12888.Nico Weber2012-05-203-0/+17
| | | | llvm-svn: 157139
* Zap a bogus assert for delegating constructors. PR12890, part 2.Eli Friedman2012-05-202-1/+11
| | | | | | I'm pretty sure we are in fact doing the right thing here, but someone who knows the standard better should double-check that we are in fact supposed to zero out the member in the given testcase. llvm-svn: 157138
* Simplify overlap check.Jakob Stoklund Olesen2012-05-191-8/+1
| | | | llvm-svn: 157137
* Make delegating initializers use a similar codepath to base initializers in ↵Eli Friedman2012-05-192-0/+28
| | | | | | dependent contexts. PR12890. llvm-svn: 157136
* Fix 12892.Jakob Stoklund Olesen2012-05-193-4/+146
| | | | | | | | | | | | Dead code elimination during coalescing could cause a virtual register to be split into connected components. The following rewriting would be confused about the already joined copies present in the code, but without a corresponding value number in the live range. Erase all joined copies instantly when joining intervals such that the MI and LiveInterval representations are always in sync. llvm-svn: 157135
* Do not eliminate allocas whose alignment exceeds that of thePeter Collingbourne2012-05-192-12/+71
| | | | | | | copied-in constant, as a subsequent user may rely on over alignment. Fixes PR12885. llvm-svn: 157134
* Add a FIXME about access to negative stack-pointer offsets on PPC32.Hal Finkel2012-05-191-0/+2
| | | | | | | | | | | | | | The current code will generate a prologue which starts with something like: mflr 0 stw 31, -4(1) stw 0, 4(1) stwu 1, -16(1) But under the PPC32 SVR4 ABI, access to negative offsets from R1 is not allowed. This was pointed out by Peter Bergner. llvm-svn: 157133
* Remove the late DCE in RegisterCoalescer.Jakob Stoklund Olesen2012-05-191-145/+2
| | | | | | | | | | | Dead code and joined copies are now eliminated on the fly, and there is no need for a post pass. This makes the coalescer work like other modern register allocator passes: Code is changed on the fly, there is no pending list of changes to be committed. llvm-svn: 157132
* Erase joined copies immediately.Jakob Stoklund Olesen2012-05-192-14/+16
| | | | | | | | | The late dead code elimination is no longer necessary. The test changes are cause by a register hint that can be either %rdi or %rax. The choice depends on the use list order, which this patch changes. llvm-svn: 157131
* Fix an ancient bug in removeCopyByCommutingDef().Jakob Stoklund Olesen2012-05-191-2/+5
| | | | | | | | | | | | | | | Before rewriting uses of one value in A to register B, check that there are no tied uses. That would require multiple A values to be rewritten. This bug can't bite in the current version of the code for a fairly subtle reason: A tied use would have caused 2-addr to insert a copy before the use. If the copy has been coalesced, it will be found by the same loop changed by this patch, and the optimization is aborted. This was exposed by 400.perlbench and lua after applying a patch that deletes joined copies aggressively. llvm-svn: 157130
* On Haswell, perfer storing YMM registers using a single instruction.Nadav Rotem2012-05-192-5/+18
| | | | llvm-svn: 157129
* Revert fix to http://llvm.org/bugs/show_bug.cgi?id=12867 for the reason now ↵Howard Hinnant2012-05-191-2/+3
| | | | | | included in the code comment. llvm-svn: 157128
* Add support for additional in-reg vbroadcast patternsNadav Rotem2012-05-192-3/+46
| | | | llvm-svn: 157127
* Disambiguate call to operator==.Benjamin Kramer2012-05-191-1/+1
| | | | | | clang++ and msvc happily had no problem with it but g++ refuses to compile. llvm-svn: 157126
* Collect inflatable virtual registers on the fly.Jakob Stoklund Olesen2012-05-191-16/+11
| | | | | | | There is no reason to defer the collection of virtual registers whose register class may be replaced with a larger class. llvm-svn: 157125
* ValueMap: Use DenseMap's find_as mechanism to reduce use list churn.Benjamin Kramer2012-05-191-5/+17
| | | | | | Otherwise just looking up a value in the map requires creating a VH, adding it to the use lists and destroying it again. llvm-svn: 157124
* Move CallbackVHs dtor inline, it can be devirtualized in many cases. Move ↵Benjamin Kramer2012-05-192-8/+9
| | | | | | the other virtual methods out of line as they are only called from within Value.cpp anyway. llvm-svn: 157123
* Tidy up some spacing and inconsistent use of pre/post increment. No ↵Craig Topper2012-05-192-28/+28
| | | | | | functional change intended. llvm-svn: 157122
* objective-c: Warn if default synthesizing readonly IBOutlet propertiesFariborz Jahanian2012-05-193-0/+88
| | | | | | | and provide a 'fixit' to change 'readonly' to 'readwrite'. 'fixit' part needs little more work. // rdar://11448209 llvm-svn: 157121
* Missing line break.Dmitri Gribenko2012-05-191-1/+2
| | | | llvm-svn: 157120
* Use RecordDecl::field_iterator because D1, D2 are RecordDecls. No ↵Dmitri Gribenko2012-05-191-2/+2
| | | | | | functional change. llvm-svn: 157119
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