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* [X86][AsmParser] re-introduce 'offset' operatorEric Astor2019-12-3014-139/+274
| | | | | | | | | | | | | | | | | | | | | | | Summary: Amend MS offset operator implementation, to more closely fit with its MS counterpart: 1. InlineAsm: evaluate non-local source entities to their (address) location 2. Provide a mean with which one may acquire the address of an assembly label via MS syntax, rather than yielding a memory reference (i.e. "offset asm_label" and "$asm_label" should be synonymous 3. address PR32530 Based on http://llvm.org/D37461 Fix broken test where the break appears unrelated. - Set up appropriate memory-input rewrites for variable references. - Intel-dialect assembly printing now correctly handles addresses by adding "offset". - Pass offsets as immediate operands (using "r" constraint for offsets of locals). Reviewed By: rnk Differential Revision: https://reviews.llvm.org/D71436
* AMDGPU/GlobalISel: Select mul24 intrinsicsMatt Arsenault2019-12-303-4/+77
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* TableGen: Fix assert on PatFrags with predicate codeMatt Arsenault2019-12-302-5/+84
| | | | | | | | This assumed a single pattern if there was a predicate. Relax this a bit, and allow multiple patterns as long as they have the same class. This was only broken for the DAG path. GlobalISel seems to have handled this correctly already.
* [X86] Add X86ISD::PCMPGT to SimplifyMultipleUseDemandedBitsForTargetNode.Craig Topper2019-12-305-187/+194
| | | | | If only the sign bit is demanded, and the LHS is all zeroes, then we can bypass the PCMPGT.
* [test] do not parse ls output for file size; NFCIBryan Chan2019-12-302-3/+3
| | | | | | | | Parsing `ls -l` output to obtain the size of a file is unreliable; the exact output format is not specified, and some user or group names may contain multiple words, causing `cut -f5 -d' '` to extract an incorrect value. `wc -c`, on the other hand, is portable, and there are precendents of its use in test cases.
* AMDGPU/GlobalISel: Re-use MRI available in selectorMatt Arsenault2019-12-301-9/+7
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* Ignore "no-frame-pointer-elim" and "no-frame-pointer-elim-non-leaf" in favor ↵Fangrui Song2019-12-306-13/+65
| | | | | | | | | | | | | of "frame-pointer" D56351 (included in LLVM 8.0.0) introduced "frame-pointer". All tests which use "no-frame-pointer-elim" or "no-frame-pointer-elim-non-leaf" have been migrated to use "frame-pointer". Implement UpgradeFramePointerAttributes to upgrade the two obsoleted function attributes for bitcode. Their semantics are ignored. Differential Revision: https://reviews.llvm.org/D71863
* [InstCombine] remove stale comment on test; NFCSanjay Patel2019-12-301-1/+1
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* [MIPS GlobalISel] Select bitreverse. RecommitPetar Avramovic2019-12-306-7/+465
| | | | | | | | | | | | | | | G_BITREVERSE is generated from llvm.bitreverse.<type> intrinsics, clang genrates these intrinsics from __builtin_bitreverse32 and __builtin_bitreverse64. Add lower and narrowscalar for G_BITREVERSE. Lower G_BITREVERSE on MIPS32. Recommit notes: Introduce temporary variables in order to make sure instructions get inserted into MachineFunction in same order regardless of compiler used to build llvm. Differential Revision: https://reviews.llvm.org/D71363
* AMDGPU/GlobalISel: Select llvm.amdgcn.fmad.ftzMatt Arsenault2019-12-303-4/+242
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* [InstCombine] propagate sign argument through nested copysignsSanjay Patel2019-12-302-2/+11
| | | | | This is another optimization suggested in PR44153: https://bugs.llvm.org/show_bug.cgi?id=44153
* [ARM][Thumb][FIX] Add unwinding information to t4Diogo Sampaio2019-12-302-0/+17
| | | | | | | | | | | | | | | | | Summary: Add missing part of patch D71361. Now that the stack-frame can be operated using a addw/subw instruction, they should appear in the unwinding list. Reviewers: dmgreen, efriedma Reviewed By: dmgreen Subscribers: kristof.beyls, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72000
* AMDGPU/GlobalISel: Add select test for fexp2Matt Arsenault2019-12-301-0/+42
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* GlobalISel: moreElementsVector for FP min/maxMatt Arsenault2019-12-304-57/+36
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* AMDGPU: Improve llvm.round.f64 lowering for CI+Matt Arsenault2019-12-303-500/+158
| | | | | The path already used for f16/f32 works a lot better when v_trunc_f64 is available.
* AMDGPU: Generate check linesMatt Arsenault2019-12-301-27/+1078
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* AMDGPU/GlobalISel: Account for G_PHI result bankMatt Arsenault2019-12-303-25/+121
| | | | | | | | | Sometimes the result bank of the phi is already assigned to something, and should not be ignored. This is in preparation for additional boolean phi handling changes. Also refine the logic to fix some cases that were incorrectly deciding to use SGPRs.
* [PowerPC] Legalize rounding nodesNemanja Ivanovic2019-12-306-278/+717
| | | | | | | | VSX provides a full complement of rounding instructions yet we somehow ended up with some of them legal and others not. This just legalizes all of the FP rounding nodes and the FP -> int rounding nodes with unsafe math. Differential revision: https://reviews.llvm.org/D69949
* Revert "[MIPS GlobalISel] Select bitreverse"Dmitri Gribenko2019-12-306-464/+7
| | | | | | This reverts commit dbc136e0fe7e14c64dcb78e72321bb41af60afa4. It broke buildbots: http://lab.llvm.org:8011/builders/clang-x86_64-debian-fast/builds/21066
* [ARM] Sink splat to ICmpDavid Green2019-12-305-190/+184
| | | | | | | | | This adds ICmp to the list of instructions that we sink a splat to in a loop, allowing the register forms of instructions to be selected more often. It does not add FCmp yet as the results look a little odd, trying to keep the register in an float reg and having to move it back to a GPR. Differential Revision: https://reviews.llvm.org/D70997
* [ARM] MVE sink ICmp test. NFCDavid Green2019-12-301-0/+627
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* [LV][NFC] Keep dominator tree up to date during vectorization.Evgeniy Brevnov2019-12-303-72/+64
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* [LV][NFC] Some refactoring and renaming to facilitate next change.Evgeniy Brevnov2019-12-301-69/+80
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* [ARM][THUMB2] Allow emitting T3 types of add and subDiogo Sampaio2019-12-304-45/+123
| | | | | | | | | | | | | | | | | | Summary: This patch allows to emit thumb2 add and sub instructions with 12 bit immediates in the emitT2RegPlusImmediate function. - Splitting parts of the D70680 Reviewers: eli.friedman, olista01, efriedma Reviewed By: efriedma Subscribers: efriedma, kristof.beyls, hiraditya, dmgreen, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D71361
* [OpenCL] Add mipmap builtin functionsSven van Haastregt2019-12-301-0/+177
| | | | | | | Add the mipmap builtin functions from the OpenCL extension specification. Patch by Pierre Gondois and Sven van Haastregt.
* [MIPS GlobalISel] Select bitreversePetar Avramovic2019-12-306-7/+464
| | | | | | | | | | G_BITREVERSE is generated from llvm.bitreverse.<type> intrinsics, clang genrates these intrinsics from __builtin_bitreverse32 and __builtin_bitreverse64. Add lower and narrowscalar for G_BITREVERSE. Lower G_BITREVERSE on MIPS32. Differential Revision: https://reviews.llvm.org/D71363
* [MIPS GlobalISel] Select bswapPetar Avramovic2019-12-308-0/+300
| | | | | | | | | G_BSWAP is generated from llvm.bswap.<type> intrinsics, clang genrates these intrinsics from __builtin_bswap32 and __builtin_bswap64. Add lower and narrowscalar for G_BSWAP. Lower G_BSWAP on MIPS32, select G_BSWAP on MIPS32 revision 2 and later. Differential Revision: https://reviews.llvm.org/D71362
* [MCP] Add stats for backward copy propagation. NFC.Kai Luo2019-12-301-1/+5
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* [opt] Fix run-twice crash and detection problemPeter Kokai2019-12-301-4/+9
| | | | | | | | | | | | | 1. Execute `opt -run-twice a.ll` with in a terminal will crash. https://bugs.llvm.org/show_bug.cgi?id=44382 2. `-run-twice` saves output into two buffers and compares them. When outputing the result is disabled, that produces two empty string thus they are going to be equal all the time resulting false-positive results. The proposed solution is to generate the results even if the output will not be emitted, as that is required for the comparision. Differential Revision: https://reviews.llvm.org/D71967
* [Diagnostic] Add ftabstop to -Wmisleading-indentationTyker2019-12-302-5/+119
| | | | | | | | | | | | | | | Summary: this allow much better support of codebases like the linux kernel that mix tabs and spaces. -ftabstop=//Width// allow specifying how large tabs are considered to be. Reviewers: xbolva00, aaron.ballman, rsmith Reviewed By: aaron.ballman Subscribers: jyknight, riccibruno, rsmith, nathanchance Differential Revision: https://reviews.llvm.org/D71037
* [NFC] Add test for load-insert-store patternQiu Chaofan2019-12-301-0/+98
| | | | | | | This patch adds necessary test cases for load-update-store pattern which only updates single element of vector. Differential Revision: https://reviews.llvm.org/D71886
* [Attributor] Use `changeUseAfterManifest` in AAValueSimplify manifestHideto Ueno2019-12-307-10/+18
| | | | | | | | | | | | | | Summary: This patch makes `AAValueSimplify` use `changeUsesAfterManifest` in `manifest`. This will invoke simple folding after the manifest. Reviewers: jdoerfert, sstefan1 Reviewed By: jdoerfert Subscribers: hiraditya, arphaman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D71972
* [ELF][PPC64] Improve "call lacks nop" diagnostic and make it compatible with ↵Fangrui Song2019-12-295-5/+20
| | | | | | | | | | | | | | | | GCC<5.5 and GCC<6.4 GCC before r245813 (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79439) did not emit nop after b/bl. This can happen with recursive calls. r245813 was back ported to GCC 5.5 and GCC 6.4. This is common, for example, libstdc++.a(locale.o) shipped with GCC 4.9 and many objects in netlib lapack can cause lld to error. gold allows such calls to the same section. Our __plt_foo symbol's `section` field is used for ThunkSection, so we can't implement a similar loosen rule easily. But we can make use of its `file` field which is currently NULL. Differential Revision: https://reviews.llvm.org/D71639
* [ELF][PPC32] Implement IPLT code sequence for non-preemptible IFUNCFangrui Song2019-12-295-24/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Similar to D71509 (EM_PPC64), on EM_PPC, the IPLT code sequence should be similar to a PLT call stub. Unlike EM_PPC64, EM_PPC -msecure-plt has small/large PIC model differences. * -fpic/-fpie: R_PPC_PLTREL24 r_addend=0. The call stub loads an address relative to `_GLOBAL_OFFSET_TABLE_`. * -fPIC/-fPIE: R_PPC_PLTREL24 r_addend=0x8000. (A partial linked object file may have an addend larger than 0x8000.) The call stub loads an address relative to .got2+0x8000. Just assume large PIC model for now. This patch makes: // clang -fuse-ld=lld -msecure-plt -fno-pie -no-pie a.c // clang -fuse-ld=lld -msecure-plt -fPIE -pie a.c #include <stdio.h> static void impl(void) { puts("meow"); } void thefunc(void) __attribute__((ifunc("resolver"))); void *resolver(void) { return &impl; } int main(void) { thefunc(); void (*theptr)(void) = &thefunc; theptr(); } work on Linux glibc. -fpie will crash because the compiler and the linker do not agree on the value which r30 stores (_GLOBAL_OFFSET_TABLE_ vs .got2+0x8000). Differential Revision: https://reviews.llvm.org/D71621
* [ELF][PPC64] Implement IPLT code sequence for non-preemptible IFUNCFangrui Song2019-12-295-33/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Non-preemptible IFUNC are placed in in.iplt (.glink on EM_PPC64). If there is a non-GOT non-PLT relocation, for pointer equality, we change the type of the symbol from STT_IFUNC and STT_FUNC and bind it to the .glink entry. On EM_386, EM_X86_64, EM_ARM, and EM_AARCH64, the PLT code sequence loads the address from its associated .got.plt slot. An IPLT also has an associated .got.plt slot and can use the same code sequence. On EM_PPC64, the PLT code sequence is actually a bl instruction in .glink . It jumps to `__glink_PLTresolve` (the PLT header). and `__glink_PLTresolve` computes the .plt slot (relocated by R_PPC64_JUMP_SLOT). An IPLT does not have an associated R_PPC64_JUMP_SLOT, so we cannot use `bl` in .iplt . Instead, create a call stub which has a similar code sequence as PPC64PltCallStub. We don't save the TOC pointer, so such scenarios will not work: a function pointer to a non-preemptible ifunc, which resolves to a function defined in another DSO. This is the restriction described by https://sourceware.org/glibc/wiki/GNU_IFUNC (though on many architectures it works in practice): Requirement (a): Resolver must be defined in the same translation unit as the implementations. If an ifunc is taken address but not called, technically we don't need an entry for it, but we currently do that. This patch makes // clang -fuse-ld=lld -fno-pie -no-pie a.c // clang -fuse-ld=lld -fPIE -pie a.c #include <stdio.h> static void impl(void) { puts("meow"); } void thefunc(void) __attribute__((ifunc("resolver"))); void *resolver(void) { return &impl; } int main(void) { thefunc(); void (*theptr)(void) = &thefunc; theptr(); } work on Linux glibc and FreeBSD. Calling a function pointer pointing to a Non-preemptible IFUNC never worked before. Differential Revision: https://reviews.llvm.org/D71509
* [SelectionDAT] Simplify SelectionDAGBuilder::visitInlineAsmFangrui Song2019-12-291-11/+3
| | | | | | Indirect C_Immediate or C_Other constraints have been excluded. Also simplify an unneeded change to indirect 'X' by D60942.
* [CMake] Added remote test execution support into CrossWinToARMLinux CMake ↵Vladimir Vereschaka2019-12-291-1/+29
| | | | | | | | | | | | cache file. Added two confguration argument to provide a host name and SSH user name to run the tests on the remote target host. * REMOTE_TEST_HOST - remote host name or address. * REMOTE_TEST_USER - passwordless SSH account name. Differential Revision: https://reviews.llvm.org/D71625
* [PowerPC] Exploit the rlwinm instructions for "and" with constantQingShan Zhang2019-12-305-8/+49
| | | | | | | | | | | | | | | | | | | | For now, PowerPC will using several instructions to get the constant and "and" it with the following case: define i32 @test1(i32 %a) { %and = and i32 %a, -2 ret i32 %and } However, we could exploit it with the rotate mask instructions. MB ME +----------------------+ |xxxxxxxxxxx00011111000| +----------------------+ 0 32 64 Notice that, we can only do it if the MB is larger than 32 and MB <= ME as RLWINM will replace the content of [0 - 32) with [32 - 64) even we didn't rotate it. Differential Revision: https://reviews.llvm.org/D71829
* [X86] Use APInt::isOneValue and ConstantSDNode::isOne. NFCCraig Topper2019-12-291-4/+4
| | | | | These are implemented slightly more efficiently than comparing to 1 in the case that the value is more than 64 bits.
* [X86] Use isOneConstant to simplify some code. NFCCraig Topper2019-12-291-2/+1
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* [X86] Remove dyn_casts to ConstantSDNode for operand 1 of ↵Craig Topper2019-12-291-108/+99
| | | | | | | | X86ISD::VSRLI/VSRAI/VSRLI. Use getConstantOperandVal and APInt operations. These nodes should only ever be formed with an i8 TargetConstant so we don't need to check for it to be a constant. It's also always 8-bits so we don't need to use APInt compare functions.
* [SelectionDAG] Disallow indirect "i" constraintFangrui Song2019-12-2913-25/+8
| | | | | | | | | This allows us to delete InlineAsm::Constraint_i workarounds in SelectionDAGISel::SelectInlineAsmMemoryOperand overrides and TargetLowering::getInlineAsmMemConstraint overrides. They were introduced to X86 in r237517 to prevent crashes for constraints like "=*imr". They were later copied to other targets.
* [lldb][NFC] Simplify ClangASTContext::GetTypeForDeclRaphael Isemann2019-12-303-23/+12
| | | | Also removes the GetASTContext call from this code.
* [lldb][NFC] Make integer types functions in ClangASTContext not staticRaphael Isemann2019-12-292-53/+34
| | | | | | These functions need a ClangASTContext instance that we would otherwise recalculate by calling GetASTContext (which is no longer necessary with this patch).
* Fix formatting in previous commitsStephen Kelly2019-12-292-7/+12
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* [lldb][NFC] Delete static versions of ClangASTContext::CreateFunctionTypeRaphael Isemann2019-12-293-37/+17
| | | | We can always call the member function version of this function.
* [X86] Make the AVX1 check lines in vec-strict-inttofp-256.ll test 'avx' ↵Craig Topper2019-12-291-118/+592
| | | | instead of 'avx2'. Add AVX2 checks. NFC
* [mlir] Update mlir/CMakeLists.txt to install *.td filesKern Handa2019-12-291-0/+1
| | | | | | | | | | Currently when you build the `install` target, TableGen files don't get installed. TableGen files are needed when authoring new MLIR dialects, but right now they're missing when using the pre-built binaries. Differential Revision: https://reviews.llvm.org/D71958
* [lldb][NFC] Remove most GetASTContext calls in AST metadata codeRaphael Isemann2019-12-293-38/+21
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* Fix use of named values surrounded by newlines in clang-queryStephen Kelly2019-12-292-7/+27
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