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* [MC/Darwin] Fix a -Wmisleading-indentation warning, reported by GCC 6.Davide Italiano2016-07-051-2/+2
| | | | llvm-svn: 274563
* Revert "test: Use add_lit_testsuites so that subsets of tests can be specified"Justin Bogner2016-07-0511-12/+7
| | | | | | | This reverts r274560. It's breaking a bunch of bots due to a directory with a space in the name. Doesn't repro locally for some reason. llvm-svn: 274562
* AMDGPU/SI: Remove address space query functions from AMDGPUDAGToDAGISelTom Stellard2016-07-053-156/+78
| | | | | | | | | | | | | | | Summary: These have been replaced with TableGen code (except for isConstantLoad, which is still used for R600). The queries were broken for cases where MemOperand was a PseudoSourceValue. Reviewers: arsenm Subscribers: arsenm, kzhuravl, llvm-commits Differential Revision: http://reviews.llvm.org/D21684 llvm-svn: 274561
* test: Use add_lit_testsuites so that subsets of tests can be specifiedJustin Bogner2016-07-0511-7/+12
| | | | | | | | | This creates make/ninja targets like check-clang-codegen and check-clang-unit, much like LLVM already has. I had to move some input files into Input directories so they weren't picked up as test directories. llvm-svn: 274560
* [Clang][Feature] Adding CLFLUSHOPT feature and intrinsic to clangMichael Zuckerman2016-07-055-0/+58
| | | | | | Differential Revision: http://reviews.llvm.org/D21792 llvm-svn: 274559
* [LV] Refactor integer induction widening (NFC)Matthew Simpson2016-07-051-87/+86
| | | | | | | | | This patch also removes the SCEV variants of getStepVector() since they have no uses after the refactoring. Differential Revision: http://reviews.llvm.org/D21903 llvm-svn: 274558
* cmake: do not check-format anything in lib/ExternalTobias Grosser2016-07-051-4/+2
| | | | | | | | | | There is no need to specifically match for isl, but we can exclude anything in lib/External from formatting as we assume that externally contributed code should always match the upstream code. This simplifies the cmake script and allows additional external projects to be added without the need to explicitly exclude them from formatting. llvm-svn: 274557
* [AMDGPU] rename DS_1A1D_Off8_NORET to DS_1A2D_Off8_NORET as ds_write2xx use ↵Valery Pykhtin2016-07-052-5/+5
| | | | | | 2 source registers. NFC. llvm-svn: 274556
* [X86][AVX512] Remove vector BROADCAST builtins.Simon Pilgrim2016-07-052-98/+0
| | | | llvm-svn: 274555
* [X86][AVX512] Remove vector BROADCAST builtins.Simon Pilgrim2016-07-051-17/+0
| | | | llvm-svn: 274554
* [LLVM][INTRINSICS] adding intrinsics of CLFLUSHOPTMichael Zuckerman2016-07-052-1/+8
| | | | | | Differential Revision: http://reviews.llvm.org/D21789 llvm-svn: 274553
* [clang-tidy] UnnecessaryValueParamCheck - only warn for virtual methodsFelix Berger2016-07-052-2/+17
| | | | | | | | | | | | | | Summary: As changing virtual methods could break method overrides disable applying the fix and just warn. Reviewers: alexfh, sbenza Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D21936 llvm-svn: 274552
* [AMDGPU] Assembler: Fix parsing error with floating-point literals passed to ↵Sam Kolton2016-07-053-6/+19
| | | | | | | | integer instructions Differential Revision: http://reviews.llvm.org/D21972 llvm-svn: 274551
* [X86][AVX512] Autoupgrade the BROADCAST intrinsicsSimon Pilgrim2016-07-057-344/+356
| | | | llvm-svn: 274550
* [tsan] Synchronize leaving a GCD group with notificationsKuba Brecka2016-07-052-9/+73
| | | | | | | | In the patch that introduced support for GCD barrier blocks, I removed releasing a group when leaving it (in dispatch_group_leave). However, this is necessary to synchronize leaving a group and a notification callback (dispatch_group_notify). Adding this back, simplifying dispatch_group_notify_f and adding a test case. Differential Revision: http://reviews.llvm.org/D21927 llvm-svn: 274549
* [tsan] dispatch_once interceptor will cause a crash/deadlock when the ↵Kuba Brecka2016-07-052-2/+43
| | | | | | | | | | original dispatch_once is used Because we use SCOPED_TSAN_INTERCEPTOR in the dispatch_once interceptor, the original dispatch_once can also be sometimes called (when ignores are enabled or when thr->is_inited is false). However the original dispatch_once function doesn’t expect to find “2” in the storage and it will spin forever (but we use “2” to indicate that the initialization is already done, so no waiting is necessary). This patch makes sure we never call the original dispatch_once. Differential Revision: http://reviews.llvm.org/D21976 llvm-svn: 274548
* [mips][ias] Remove k_PhysReg since it's not possible to create an operand of ↵Daniel Sanders2016-07-051-20/+7
| | | | | | | | | | | | this kind. Reviewers: sdardis Subscribers: dsanders, sdardis, llvm-commits Differential Revision: http://reviews.llvm.org/D21986 llvm-svn: 274547
* [CMake] Adjust export_executable_symbols to cope with non-target link librariesJohn Brawn2016-07-051-13/+15
| | | | | | | | | export_executable_symbols looks though the link libraries of the executable in order to figure out transitive dependencies, but in doing so it assumes that all link libraries are also targets. This is not true as of r273302, so adjust it to check if they actually are targets. llvm-svn: 274546
* [X86][AVX512BW] Added BROADCAST intrinsics fast-isel generic IR testsSimon Pilgrim2016-07-052-0/+364
| | | | llvm-svn: 274545
* [X86][AVX512] Converted the VBROADCAST intrinsics to generic IRSimon Pilgrim2016-07-058-219/+250
| | | | llvm-svn: 274544
* [Thumb] Reapply r272251 with a fix for PR28348 (mk 2)James Molloy2016-07-053-1/+86
| | | | | | | | | | | | | | | | | | | | | | | | | The important thing I was missing was ensuring newly added constants were kept in topological order. Repositioning the node is correct if the constant is newly added (so it has no topological ordering) but wrong if it already existed - positioning it next in the worklist would break the topological ordering. Original commit message: [Thumb] Select a BIC instead of AND if the immediate can be encoded more optimally negated If an immediate is only used in an AND node, it is possible that the immediate can be more optimally materialized when negated. If this is the case, we can negate the immediate and use a BIC instead; int i(int a) { return a & 0xfffffeec; } Used to produce: ldr r1, [CONSTPOOL] ands r0, r1 CONSTPOOL: 0xfffffeec And now produces: movs r1, #255 adds r1, #20 ; Less costly immediate generation bics r0, r1 llvm-svn: 274543
* [X86][AVX512F] add float/double abs intrinsicsAsaf Badouh2016-07-052-22/+77
| | | | | | | | | add abs intrinsics that use native LLVM-IR. change _mm512_mask[z]_and_epi{32|64} to use select intrinsic Differential Revision: http://reviews.llvm.org/D21973 llvm-svn: 274542
* [AVX512] minor fix in sqrt{ss|sd} intrinsics argumentsAsaf Badouh2016-07-051-18/+18
| | | | | | Differential Revision: http://reviews.llvm.org/D21988 llvm-svn: 274541
* [OpenCL] An implementation of device side enqueue (DSE) from OpenCL v2.0 ↵Anastasia Stulova2016-07-059-19/+713
| | | | | | | | | | | | | | | | | s6.13.17. - Added new Builtins: enqueue_kernel, get_kernel_work_group_size and get_kernel_preferred_work_group_size_multiple. These Builtins use custom check to diagnose parameters of the passed Blocks i. e. variable number of 'local void*' type params, and check different overloads specified in Table 6.31 of OpenCL v2.0. - IR is generated as an internal library call for each OpenCL Builtin, reusing ObjC Block implementation. Review: http://reviews.llvm.org/D20249 llvm-svn: 274540
* ntrinsics _mm256_permutexvar_epi64 doesn't accept three parameters as ↵Michael Zuckerman2016-07-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | specify bellow. I deleted the extra mask parameter. __m256i _mm256_permutexvar_epi64 (__m256i idx, __m256i a) #include "immintrin.h" Instruction: vpermq CPUID Flags: AVX512VL + AVX512F Description Shuffle 64-bit integers in a across lanes using the corresponding index in idx, and store the results in dst. Operation FOR j := 0 to 3 i := j*64 id := idx[i+1:i]*64 dst[i+63:i] := a[id+63:id] ENDFOR dst[MAX:256] := 0 dst[MAX:256] := 0 (From: Intel intrinsics guide) llvm-svn: 274539
* Revert r274536: [mips][ias] Don't break apart and reconstruct StringRef's ↵Daniel Sanders2016-07-051-4/+6
| | | | | | | | for k_Token. NFC. It turns out that MSVC requires this. llvm-svn: 274538
* [X86][AVX512] Added BROADCAST intrinsics fast-isel generic IR testsSimon Pilgrim2016-07-052-18/+795
| | | | llvm-svn: 274537
* [mips][ias] Don't break apart and reconstruct StringRef's for k_Token. NFC.Daniel Sanders2016-07-051-6/+4
| | | | llvm-svn: 274536
* [PowerPC] - Legalize vector types by widening instead of integer promotionNemanja Ivanovic2016-07-058-47/+182
| | | | | | | | | | | | | | | | | | | This patch corresponds to review: http://reviews.llvm.org/D20443 It changes the legalization strategy for illegal vector types from integer promotion to widening. This only applies for vectors with elements of width that is a multiple of a byte since we have hardware support for vectors with 1, 2, 3, 8 and 16 byte elements. Integer promotion for vectors is quite expensive on PPC due to the sequence of breaking apart the vector, extending the elements and reconstituting the vector. Two of these operations are expensive. This patch causes between minor and major improvements in performance on most benchmarks. There are very few benchmarks whose performance regresses. These regressions can be handled in a subsequent patch with a DAG combine (similar to how this patch handles int -> fp conversions of illegal vector types). llvm-svn: 274535
* [X86][AVX512] Added VSHUFPD intrinsics fast-isel generic IR testsSimon Pilgrim2016-07-051-0/+52
| | | | llvm-svn: 274534
* [X86][AVX512VL] Added VSHUFPD/VSHUFPS intrinsics fast-isel generic IR testsSimon Pilgrim2016-07-051-0/+274
| | | | llvm-svn: 274533
* [Clang][BuiltIn][AVX512] adding ↵Michael Zuckerman2016-07-055-0/+125
| | | | | | | | _mm{|256|512}_mask_cvt{s|us|}epi16_storeu_epi8 intrinsics Differential Revision: http://reviews.llvm.org/D21729 llvm-svn: 274532
* [ASTMatchers] New forEachOverriden matcher.Clement Courbet2016-07-057-9/+134
| | | | | | Matches methods overridden by the given method. llvm-svn: 274531
* [OpenMP] Sema and parse for 'distribute parallel for simd'Kelvin Li2016-07-0541-15/+5238
| | | | | | | | Summary: This patch is an implementation of sema and parsing for the OpenMP composite pragma 'distribute parallel for simd'. Differential Revision: http://reviews.llvm.org/D21977 llvm-svn: 274530
* test: relax the match on the timestampSaleem Abdulrasool2016-07-051-1/+1
| | | | llvm-svn: 274529
* Object: support empty UID/GID fieldsSaleem Abdulrasool2016-07-053-2/+13
| | | | | | | | | Normal archives do not have empty UID/GID fields. However, the Microsoft Import library format is a customized archive (it just uses an alternate symbol index format). When the import library is constructed by lib.exe, the UID and GID fields are left empty. Do not abort on such an input. llvm-svn: 274528
* AMDGPU/R600: Add PatFrags for selecting the correct vtx id for loadsTom Stellard2016-07-054-45/+65
| | | | | | | | | This moves of the r600 logic out of isGlobalLoad() and into the TableGen files. Differential Revision: http://reviews.llvm.org/D21710 llvm-svn: 274527
* [Support][Error] Make logAllUnhandledErrors take a Twine for the banner, ratherLang Hames2016-07-042-11/+11
| | | | | | than a const string&. llvm-svn: 274526
* [X86] Use undefined instead of setzero in shufflevector based intrinsics ↵Craig Topper2016-07-0411-217/+228
| | | | | | when the second source is unused. Rewrite immediate extractions in shuffle intrinsics to be in ((c >> x) & y) form instead of ((c & z) >> x). This way only x varies between each use instead of having to vary x and z. llvm-svn: 274525
* [ELF] Support --entry= option variant. Update tests while I'm there.Davide Italiano2016-07-042-2/+3
| | | | llvm-svn: 274524
* [X86][AVX512] Converted the VSHUFPD intrinsics to generic IRSimon Pilgrim2016-07-044-65/+74
| | | | llvm-svn: 274523
* [IR,X86] Remove some intrinsic prefixes earlier in the auto-upgrade code so ↵Craig Topper2016-07-041-214/+226
| | | | | | we can shorten the length of the comparison strings and avoid repeatedly comparing the common prefix. No functional change intended. llvm-svn: 274522
* AMDGPU/SI: Remove hack for selecting < 32-bit loads to MUBUF instructionsTom Stellard2016-07-043-15/+15
| | | | | | | | | | | | | | | Summary: The isGlobalLoad() query was returning true for constant address space loads with memory types less than 32-bits, which is wrong. This logic has been replaced with PatFrag in the TableGen files, to provide the same functionality. Reviewers: arsenm Subscribers: arsenm, kzhuravl, llvm-commits Differential Revision: http://reviews.llvm.org/D21696 llvm-svn: 274521
* [X86][AVX512] Add support for lowering shuffles to VSHUFPDSimon Pilgrim2016-07-043-8/+8
| | | | llvm-svn: 274520
* [AVX512] Remove masked VPERMD/VPERMQ/VPERMILPS/VPERMILPD intrinsics. They ↵Craig Topper2016-07-042-67/+1
| | | | | | were autoupgraded to native IR in r274506 and r274506. llvm-svn: 274519
* [OutputSection] Work around GCC not being able to deduce auto.Davide Italiano2016-07-041-5/+10
| | | | | | | | | | | | | | | | | | | The build otherwise fails with: [ 39%] Building CXX object tools/lld/ELF/CMakeFiles/lldELF.dir/OutputSections.cpp.o /export/gnu/import/git/llvm/tools/lld/ELF/OutputSections.cpp: In member function ‘void lld::elf::GnuHashTableSection<ELFT>::addSymbols(std::vector<std::pair<lld::elf::SymbolBody*, long unsigned int> >&)’: /export/gnu/import/git/llvm/tools/lld/ELF/OutputSections.cpp:585:8: error: inconsistent deduction for ‘auto’: ‘auto’ and then ‘__gnu_cxx::__normal_iterator<std::pair<lld::elf::SymbolBody*, long unsigned int>*, std::vector<std::pair<lld::elf::SymbolBody*, long unsigned int> > >’ Reported by: H. J. Liu llvm-svn: 274518
* AMDGPU/R600: Add indentation to VTX and TEX fetch asm stringsJan Vesely2016-07-041-2/+2
| | | | | | | | These are printed as part of Fetch clauses. Differential Revision: http://reviews.llvm.org/D21730 llvm-svn: 274517
* [AVX512] Remove VPERMD/VPERMQ/VPERMILPS/VPERMILPD builtins. These were made ↵Craig Topper2016-07-042-12/+0
| | | | | | unused in r274492 and r274502. llvm-svn: 274516
* [TableGen] Remove dead code. NFCI.Davide Italiano2016-07-041-28/+0
| | | | llvm-svn: 274515
* ELF/AMDGPU: Add support for GOT relocationsTom Stellard2016-07-042-9/+37
| | | | | | | | | | Reviewers: arsenm, rafael, tony-tye, kzhuravl, ruiu Subscribers: llvm-commits, kzhuravl Differential Revision: http://reviews.llvm.org/D21481 llvm-svn: 274514
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