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* [llvm-dwp] Restructure inputs for test case so they're all grouped togetherDavid Blaikie2015-12-075-2/+2
| | | | llvm-svn: 254922
* ScopInfo: Add MemoryAccess::isScalar()Tobias Grosser2015-12-072-1/+4
| | | | | Suggested-by: Michael Kruse <llvm@meinersbur.de> llvm-svn: 254921
* Tighten checks so we can see existing codegen Sanjay Patel2015-12-071-8/+106
| | | | | | | | The 2-element vector case shows a surprising bug: we failed to eliminate ops on undefs, so there are 4 fmax calls even though there can only be 2 valid elements in the inputs. llvm-svn: 254920
* [Orc] Removing traces of takeOwnershipOfBuffers left after r251560.Lang Hames2015-12-073-47/+0
| | | | | | Patch by Joshua Gerrard. Thanks Joshua! llvm-svn: 254919
* [ELF] - fixed mistype in comment, NFC.George Rimar2015-12-071-1/+1
| | | | llvm-svn: 254918
* Link declaration lazily.Rafael Espindola2015-12-0714-6/+64
| | | | | | | We already linked available_externally and linkonce lazily, this just adds declarations to the list. llvm-svn: 254917
* Simplify test.Rafael Espindola2015-12-071-3/+1
| | | | llvm-svn: 254916
* Silence all C4592 warnings with MSVC 2015 Update 1. This warning produces ↵Aaron Ballman2015-12-071-0/+3
| | | | | | | | false positives that Microsoft says will be fixed in Update 2. Until this produces reliable diagnostics, it is safe to disable the diagnostic -- the compiler is not doing anything different than it previously did aside from issuing the diagnostic. (Note, this silences at least one false positive in LLVM with FeatureBitset uses.) llvm-svn: 254915
* [ThinLTO] Support cloning of temporary DILocation metadataTeresa Johnson2015-12-072-2/+12
| | | | | | | | | | This is needed to support linking of module-level metadata as a postpass after function importing, where we will be leaving temporary metadata on imported instructions until the postpass metadata import. Also added unittest. Split from D14838. llvm-svn: 254914
* VX-512: Fixed a bug in FP logic operation loweringElena Demikhovsky2015-12-076-21/+111
| | | | | | | | | | | | | | FP logic instructions are supported in DQ extension on AVX-512 target. I use integer operations instead. Added tests. I also enabled FABS in this patch in order to check ANDPS. The operations are FOR, FXOR, FAND, FANDN. The instructions, that supported for 512-bit vector under DQ are: VORPS/PD, VXORPS/PD, VANDPS/PD, FANDNPS/PD. Differential Revision: http://reviews.llvm.org/D15110 llvm-svn: 254913
* [ARM] Generate ABI_optimization_goals build attribute, as described in the ↵Artyom Skrobov2015-12-079-15/+157
| | | | | | | | | | | | | | ARM ARM. Summary: This reverts r254234, and adds a simple fix for the annoying case of use-after-free. Reviewers: rengolin Subscribers: aemerson, llvm-commits, rengolin Differential Revision: http://reviews.llvm.org/D15236 llvm-svn: 254912
* [mips][ias] Removed DSP/DSPr2 instructions from base architecture ↵Daniel Sanders2015-12-078-765/+255
| | | | | | | | | | | | | | | | | valid-xfail.s's. Summary: valid-xfail.s is for instructions that should be valid in the given ISA but incorrectly fail. DSP/DSPr2 instructions are correct to fail since DSP/DSPr2 is not enabled. Reviewers: vkalintiris Subscribers: dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D15072 llvm-svn: 254911
* [RenderScript] Mips64 allocations workaroundEwan Crawford2015-12-072-90/+180
| | | | | | | | | Workaround for Mips64 compiler bug by using function pointers to call functions for expression evaluation. This avoids the emission of the JAL instruction, which can only jump within a particular range of the PC. Author: Dean De Leo, dean@codeplay.com llvm-svn: 254910
* AVX-512: Fixed masked load / store instruction selection for KNL.Elena Demikhovsky2015-12-074-32/+151
| | | | | | | | | | | | | | | Patterns were missing for KNL target for <8 x i32>, <8 x float> masked load/store. This intrinsic comes with all legal types: <8 x float> @llvm.masked.load.v8f32(<8 x float>* %addr, i32 align, <8 x i1> %mask, <8 x float> %passThru), but still requires lowering, because VMASKMOVPS, VMASKMOVDQU32 work with 512-bit vectors only. All data operands should be widened to 512-bit vector. The mask operand should be widened to v16i1 with zeroes. Differential Revision: http://reviews.llvm.org/D15265 llvm-svn: 254909
* AVX-512: implement kunpck intrinsics.Igor Breger2015-12-076-74/+194
| | | | | | Differential Revision: http://reviews.llvm.org/D14821 llvm-svn: 254908
* Change how the linker handles the old llvm.global_ctors.Rafael Espindola2015-12-072-92/+42
| | | | | | | | | | | | | | | | | Now instead of changing it to the new format and then linking, it just handles the old format while copying it over. The main differences are: * There is no rauw in the source module. * An old format input is always upgraded. The first item helps with having a sane API that passes in a GV list to the linker. The second one is a small step in deprecating the old format. llvm-svn: 254907
* [avx512] rename gcc intrinsics to be align with gcc formatAsaf Badouh2015-12-072-72/+72
| | | | | | | | rename the gcc intrinsics suffix : _mask ->_round Differential Revision: http://reviews.llvm.org/D15284 llvm-svn: 254906
* [avx512] rename gcc intrinsics to be align with gcc formatAsaf Badouh2015-12-071-12/+12
| | | | | | | | rename the gcc intrinsics suffix : _mask ->_round Differential Revision: http://reviews.llvm.org/D15285 llvm-svn: 254905
* [X86] Adding support for FWORD type for MS inline asmMarina Yatsina2015-12-072-0/+4
| | | | | | | | Adding support for FWORD type for MS inline asm. Differential Revision: http://reviews.llvm.org/D15268 llvm-svn: 254904
* [OPENMP 4.5] parsing/sema support for 'grainsize' clause.Alexey Bataev2015-12-0718-10/+342
| | | | | | OpenMP 4.5 adds 'taksloop' and 'taskloop simd' directives, which have 'grainsize' clause. Patch adds parsing/sema analysis of this clause. llvm-svn: 254903
* Recommit "Fix race during process interruption"Pavel Labath2015-12-074-128/+120
| | | | | | | | This is a resubmit of r254403, see that commit's message for context. This fixes an issue in the original commit, where we would incorrectly interrupt the process if the interrupt request came just as we were about to send the stopped event to the public. llvm-svn: 254902
* Make TestThreadStates more stablePavel Labath2015-12-071-25/+11
| | | | | | | | | | | | | | | | | | | | | Summary: Because of the large number of XFAILs TestThreadStates has decayed quite a bit. This commit does the following: - removes the "breakpoint list" expectations. Most tests have been failing on this, because the command output changed quite a while back. I remove it, because run_break_set_by_file_and_line already does a decent amount of checking - fixup test_state_after_expression: this was calling the wrong function by mistake. As now the function actually tests something (which we know is broken), I needed to XFAIL it as well. - replaces the sleep() with a proper wait-for-event functionality in parts which use async mode, to stabilize the one function that actually tests something. Reviewers: clayborg Subscribers: lldb-commits Differential Revision: http://reviews.llvm.org/D15233 llvm-svn: 254901
* [ARM] Flag vcvt{t,b} with an f16 type specifier as part of the FP16 extensionBradley Smith2015-12-074-5/+28
| | | | | | Additionally correct the Cortex-R7 definition to allow the FP16 feature. llvm-svn: 254900
* [OPENMP 4.5] parsing/sema support for 'nogroup' clause.Alexey Bataev2015-12-0718-9/+100
| | | | | | OpenMP 4.5 adds 'taskloop' and 'taskloop simd' directives. These directives have new 'nogroup' clause. Patch adds basic parsing/sema support for this clause. llvm-svn: 254899
* [X86][AVX] Added tests to load+broadcast non-zero'th vector elementsSimon Pilgrim2015-12-072-3/+375
| | | | | | Baseline for an upcoming patch for PR23022 llvm-svn: 254898
* [mips][microMIPS] Implement LH, LHE, LHU and LHUE instructionsZlatko Buljan2015-12-0711-10/+113
| | | | | | Differential Revision: http://reviews.llvm.org/D9824 llvm-svn: 254897
* Renamed addLocalModelTlsIndex() -> addCurrentModuleTlsIndex(), NFC.George Rimar2015-12-073-3/+3
| | | | | | (per discussion with Michael Spencer) llvm-svn: 254896
* Add uint8_t size to LegalizeTypeAction enum and use the enum type directly ↵Craig Topper2015-12-071-6/+6
| | | | | | to remove some typecasts. NFC llvm-svn: 254895
* Added lldbsuite.lldb_test_root, switched formatter to use it.Todd Fiala2015-12-072-5/+10
| | | | llvm-svn: 254894
* Add uint8_t size to LegalizeAction enum so we can use the enum type directly ↵Craig Topper2015-12-071-12/+11
| | | | | | and remove some casts. NFC llvm-svn: 254893
* [LLDB][MIPS] Marking some expected failuresMohit K. Bhakkad2015-12-072-11/+17
| | | | | | | | Reviewers: clayborg, zturner. Subscribers: jaydeep, bhushan, sagar, nitesh.jain, tberghammer,lldb-commits. Differential Revision: http://reviews.llvm.org/D14944 llvm-svn: 254892
* Moved total test count and rerun count into summary counts.Todd Fiala2015-12-071-8/+22
| | | | llvm-svn: 254891
* Move test summary counts to end; simplify issue detail lineTodd Fiala2015-12-071-6/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Test summary counts now show at the end, with issue details above. Issue details now print "ISSUE_TYPE: test method (relative path)". Relative paths are relative to the packages/Python/lldbsuite/test directory. Sample output: test/dotest.py --executable `pwd`/build/Debug/lldb --results-formatter lldbsuite.test.basic_results_formatter.BasicResultsFormatter --threads 12 Testing: 415 test suites, 12 threads 415 out of 415 test suites processed - TestLldbGdbServer.py Test Results Total Test Methods Run (excluding reruns): 2470 Test Method rerun count: 0 Details: UNEXPECTED SUCCESS: test_symbol_name_dsym (functionalities/completion/TestCompletion.py) UNEXPECTED SUCCESS: test_symbol_name_dwarf (functionalities/completion/TestCompletion.py) =================== Test Result Summary =================== Success: 1329 Expected Failure: 79 Failure: 0 Error: 0 Unexpected Success: 2 Skip: 1060 llvm-svn: 254890
* Fix PR20334: invalid assertion while diagnosing list initialization failureFaisal Vali2015-12-072-1/+23
| | | | | | | | | | | | | https://llvm.org/bugs/show_bug.cgi?id=20334 Unfortunately, clang currently checks for a certain brokenness of implementations of std::initializer_list in CodeGen (void AggExprEmitter::VisitCXXStdInitializerListExpr), not in SemaInit. Until that is fixed, make sure we don't let broken attempts that are aggregates leak through into sema, which allows maintenance of expected invariants, and avoids triggering an assertion. llvm-svn: 254889
* [llvm-objdump/MachoDump] Make code much more concise.Davide Italiano2015-12-071-20/+5
| | | | llvm-svn: 254888
* [Verifier] Fix !dbg validation if Scope is the SubprogramKeno Fischer2015-12-063-2/+30
| | | | | | | | | | | | | | | | | | Summary: We are inserting both Scope and SP into the Seen map and check whether it was already there in which case we skip the validation (the idea being that we already checked this Subprogram before). However, if (Scope == SP) as MDNodes, then inserting the Scope, will trigger the Seen check causing us to incorrectly not validate this !dbg attachment. Fix this by not performing the SP Seen check if Scope == SP Reviewers: pcc, dexonsmith, dblaikie Subscribers: dblaikie, llvm-commits Differential Revision: http://reviews.llvm.org/D14697 llvm-svn: 254887
* [X86][AVX] Tidied up BROADCASTPD/BROADCASTPS testsSimon Pilgrim2015-12-061-45/+72
| | | | | | Regenerate tests using update_llc_test_checks.py llvm-svn: 254886
* [Orc] Rename IndirectStubsManagerBase to IndirectStubsManager.Lang Hames2015-12-067-9/+11
| | | | | | No functional change. llvm-svn: 254885
* [WebAssembly] Factor out a TypeToString function, since we need it in ↵Dan Gohman2015-12-063-31/+24
| | | | | | multiple places. llvm-svn: 254884
* [WebAssembly] Make tableswitch's 'default' operand explicit. NFC.Dan Gohman2015-12-061-6/+6
| | | | llvm-svn: 254883
* [WebAssembly] Enable folding of offsets into global variable addresses.Dan Gohman2015-12-063-8/+56
| | | | llvm-svn: 254882
* [WebAssembly] Tighten up some testcase regular expressions.Dan Gohman2015-12-063-13/+13
| | | | llvm-svn: 254881
* [WebAssembly] Add some more ideas to README.txt.Dan Gohman2015-12-061-0/+43
| | | | llvm-svn: 254880
* [x86] add missing maxnum/minnum tests for 256-bit vectorsSanjay Patel2015-12-062-42/+66
| | | | | | | | Also, switch to x86-64 because once we can lower these to something more reasonable, there will be less noise in the checks. And add AVX runs because those will be different than SSE. llvm-svn: 254879
* Create llvm.global_ctors in the new format.Rafael Espindola2015-12-062-4/+4
| | | | llvm-svn: 254878
* [X86] Add support for loopz, loopnz for Intel syntaxMarina Yatsina2015-12-062-2/+7
| | | | | | | | According to x86 spec, loopz and loopnz should be supported for Intel syntax, where loopz is equivalent to loope and loopnz is equivalent to loopne. Differential Revision: http://reviews.llvm.org/D15148 llvm-svn: 254877
* [PGO] Instrument only base constructors and destructors.Serge Pavlov2015-12-069-34/+67
| | | | | | | | | | | | | | | | Constructors and destructors may be represented by several functions in IR. Only base structors correspond to source code, others are small pieces of code and eventually call the base variant. In this case instrumentation of non-base structors has little sense, this fix remove it. Now profile data of a declaration corresponds to exactly one function in IR, it agrees with the current logic of the profile data loading. This change fixes PR24996. Differential Revision: http://reviews.llvm.org/D15158 llvm-svn: 254876
* [X86][AVX512] add vmovss/sd missing encoding Asaf Badouh2015-12-066-39/+245
| | | | | | Differential Revision: http://reviews.llvm.org/D14701 llvm-svn: 254875
* [X86] Always generate precise CFA adjustments.Michael Kuperstein2015-12-067-25/+65
| | | | | | | | | | This removes the code path that generate "synchronous" (only correct at call site) CFA. We will probably want to re-introduce it once we are capable of emitting different .eh_frame and .debug_frame sections. Differential Revision: http://reviews.llvm.org/D14948 llvm-svn: 254874
* AVX512: support AVX512BW Intrinsic in 32bit mode.Igor Breger2015-12-062-53/+1139
| | | | | | Differential Revision: http://reviews.llvm.org/D15076 llvm-svn: 254873
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