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* [ARM GlobalISel] Map G_FPTOSI and G_FPTOUIDiana Picus2018-01-302-0/+105
| | | | | | | Straightforward mapping (integer operand goes to GPR, floating point operand goes to FPR). llvm-svn: 323727
* [ARM GlobalISel] Legalize G_FPTOSI and G_FPTOUIDiana Picus2018-01-303-3/+173
| | | | | | | | | Legal if we have hardware support for floating point, libcalls otherwise. Also add the necessary support for libcalls in the legalizer helper. llvm-svn: 323726
* [COFF] Remove the temporary file if not updating the import libraryMartin Storsjo2018-01-301-0/+2
| | | | | | Differential Revision: https://reviews.llvm.org/D42621 llvm-svn: 323725
* [X86] Auto-generate complete checks. NFCCraig Topper2018-01-301-125/+330
| | | | llvm-svn: 323724
* dotest: Apply --skip-categories to debug info categoriesVedant Kumar2018-01-301-1/+1
| | | | llvm-svn: 323723
* add prefix with '_' support for property name. Corresponding apple dev doc: ↵Yan Zhang2018-01-306-28/+115
| | | | | | | | | | | | | | https://developer.apple.com/library/content/qa/qa1908/_index.html Reviewers: benhamilton, hokein Reviewed By: benhamilton Subscribers: klimek, cfe-commits Differential Revision: https://reviews.llvm.org/D42464 llvm-svn: 323722
* [DWARF] Corrected test committed in r323670 to use llc instead of llc_dwarf ↵Wolfgang Pieb2018-01-301-2/+2
| | | | | | to avoid multiple triples. llvm-svn: 323721
* First cut at issue statuses for JAXMarshall Clow2018-01-301-51/+63
| | | | llvm-svn: 323720
* Add tests to make sure that <string_view> provides std::size/data/empty in ↵Marshall Clow2018-01-305-1/+40
| | | | | | C++17 mode. This is LWG#3009, coming up for a vote in JAX - but we already do it, just don't have tests llvm-svn: 323719
* [utils] De-duplicate utils/update_{llc_,}test_checks.pyFangrui Song2018-01-305-333/+296
| | | | | | | | Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D42654 llvm-svn: 323718
* Revert "[coroutines] Fix application of NRVO to Coroutine "Gro" or return ↵Eric Fiselier2018-01-303-89/+5
| | | | | | | | | object." This reverts commit r323712. It's causing some test failures on certain machines. Not sure why, will investigate. llvm-svn: 323717
* [InstSimplify] (X * Y) / Y --> X for relaxed floating-point opsSanjay Patel2018-01-303-0/+54
| | | | | | | | | This is the FP counterpart that was mentioned in PR35709: https://bugs.llvm.org/show_bug.cgi?id=35709 Differential Revision: https://reviews.llvm.org/D42385 llvm-svn: 323716
* [SelectionDAG]: Ignore "returned" in the presence of an implicit sret.Dan Gohman2018-01-302-2/+24
| | | | | | | | | | | | | | | | When a function return value can't be directly lowered, such as returning an i128 on WebAssembly, as indicated by the CanLowerReturn target hook, SelectionDAGBuilder can translate it to return the value through a hidden sret-like argument. If such a function has an argument with the "returned" attribute, the attribute can't be automatically lowered, because the function no longer has a normal return value. For now, just discard the "returned" attribute. This fixes PR36128. llvm-svn: 323715
* [CUDA] Added partial support for CUDA-9.1Artem Belevich2018-01-308-32/+1872
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clang can use CUDA-9.1 now, though new APIs (are not implemented yet. The major change is that headers in CUDA-9.1 went through substantial changes that started in CUDA-9.0 which required substantial changes in the cuda compatibility headers provided by clang. There are two major issues: * CUDA SDK no longer provides declarations for libdevice functions. * A lot of device-side functions have become nvcc's builtins and CUDA headers no longer contain their implementations. This patch changes the way CUDA headers are handled if we compile with CUDA 9.x. Both 9.0 and 9.1 are affected. * Clang provides its own declarations of libdevice functions. * For CUDA-9.x clang now provides implementation of device-side 'standard library' functions using libdevice. This patch should not affect compilation with CUDA-8. There may be some observable differences for CUDA-9.0, though they are not expected to affect functionality. Tested: CUDA test-suite tests for all supported combinations of: CUDA: 7.0,7.5,8.0,9.0,9.1 GPU: sm_20, sm_35, sm_60, sm_70 Differential Revision: https://reviews.llvm.org/D42513 llvm-svn: 323713
* [coroutines] Fix application of NRVO to Coroutine "Gro" or return object.Eric Fiselier2018-01-293-5/+89
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Fix NRVO for Gro variable. Previously, we only marked the GRO declaration as an NRVO variable when its QualType and the function return's QualType matched exactly (using operator==). However, this was incorrect for two reasons: 1. We were marking non-class types, such as ints, as being NRVO variables. 2. We failed to handle cases where the canonical types were the same, but the actual `QualType` objects were different. For example, if one was represented by a typedef. (Example: https://godbolt.org/g/3UFgsL) This patch fixes these bugs by marking the Gro variable as supporting NRVO only when `BuildReturnStmt` marks the Gro variable as a coroutine candidate. Reviewers: rsmith, GorNishanov, nicholas Reviewed By: GorNishanov Subscribers: majnemer, cfe-commits Differential Revision: https://reviews.llvm.org/D42343 llvm-svn: 323712
* [globalisel][legalizer] Fix a fallthrough case in the unittests debug printingDaniel Sanders2018-01-291-1/+1
| | | | llvm-svn: 323711
* [RAFast] Don't dereference MBB::endQuentin Colombet2018-01-292-5/+32
| | | | | | | | | | | | | | | | When RAFast sees liveins in on a basic block, it uses that information to initialize the availability of the registers. The called method uses an instruction as one of its argument and in the liveins case, RAFast was dereferencing MBB::begin which can be MBB::end for empty basic block. Change the API of definePhysReg to use MachineBasicBlock::iterator instead of MachineInstr so that we don't dereference an invalid iterator while making the call. rdar://problem/36952401 llvm-svn: 323710
* AMDGPU: Move ADDRIndirect complex pattern into R600Instructions.tdTom Stellard2018-01-292-1/+1
| | | | | | | | | | | | | | Summary: This is only used by R600. Reviewers: arsenm Reviewed By: arsenm Subscribers: kzhuravl, wdng, nhaehnle, mgorny, yaxunl, dstuttard, tpr, t-tye, llvm-commits Differential Revision: https://reviews.llvm.org/D37114 llvm-svn: 323709
* [X86] Use VMOVDQA64 for aligned vXi32 stores.Craig Topper2018-01-292-4/+13
| | | | | | I meant to do this with the unaligned stores in r322820, but looks like I missed it. llvm-svn: 323708
* [test-suite] UNXfail several tests that now pass locally.Davide Italiano2018-01-292-5/+0
| | | | | | | Another step towards enabling unexpected successes as failures by default. llvm-svn: 323707
* AMDGPU: Allow a SGPR for the conditional KILL operandMarek Olsak2018-01-292-23/+48
| | | | | | | | | | | | | | | | | | Patch by: Bas Nieuwenhuizen Just use the _e64 variant if needed. This should be possible as per def : Pat < (int_amdgcn_kill (i1 (setcc f32:$src, InlineFPImm<f32>:$imm, cond:$cond))), (SI_KILL_F32_COND_IMM_PSEUDO $src, (bitcast_fpimm_to_i32 $imm), (cond_as_i32imm $cond)) > ; I don't think we can get an immediate for the other operand for which we need the second 32-bit word. https://reviews.llvm.org/D42302 llvm-svn: 323706
* Fix some regular expressions in llvm-mode.el.Rafael Espindola2018-01-291-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | In some cases it was using "\" unnecessarily. In another case it needed an additional "\" to properly indicate a numbered sub-match. Make comment-start buffer-local in llvm-mode.el llvm-mode was setting comment-start globally. However, it is better to only set it locally in the current buffer. Don't use purecopy in llvm-mode.el There's no reason to use purecopy in llvm-mode.el. purecopy is only needed for files that are dumped in emacs. Add a version header to llvm-mode.el Adding a version header to llvm-mode.el allows it to be installed by the Emacs package manager. There are not many requirements on the version number; however it is useful to users to bump it when something significant changes. Here I've chosen just to start at 1.0. Patch by Tom Tromey! llvm-svn: 323705
* [DSE] add test for PR36129; NFCSanjay Patel2018-01-291-0/+15
| | | | | | | We can miscompile because we're not checking is the memory might me modified between the seemingly redundant store ops. llvm-svn: 323704
* [clangd] Fix r323658 test failure on windows.Eric Liu2018-01-293-6/+11
| | | | llvm-svn: 323703
* LiveInterval: Print weight in print() function.Matthias Braun2018-01-291-0/+1
| | | | llvm-svn: 323702
* Stop tracking .debug_line_str in DWARFUnit. NFC.Paul Robinson2018-01-295-30/+22
| | | | llvm-svn: 323701
* [X86] Add FeaturePOPCNTFalseDeps to skylake server CPU to match skylake client.Craig Topper2018-01-292-1/+3
| | | | llvm-svn: 323700
* Warn on nonexistent comdat sections in an /order file.Rui Ueyama2018-01-292-5/+30
| | | | | | | | | | | | | I didn't implement the feature in the original patch because I didn't come up with an idea to do that easily and efficiently. Turned out that that is actually easy to implement. In this patch, we collect comdat sections before gc is run and warn on nonexistent symbols in an order file. Differential Revision: https://reviews.llvm.org/D42658 llvm-svn: 323699
* Update a help message.Rui Ueyama2018-01-291-1/+1
| | | | llvm-svn: 323698
* [analyzer] Use stable filenames in analyzer testing infrastructureGeorge Karpenkov2018-01-291-0/+1
| | | | | | | | Makes finding the right file in test results easier. Differential Revision: https://reviews.llvm.org/D42445 llvm-svn: 323697
* [analyzer] [NFC] Remove unused method visitItemsInWorkListGeorge Karpenkov2018-01-292-41/+0
| | | | | | Differential Revision: https://reviews.llvm.org/D42562 llvm-svn: 323696
* [JumpThreading][NFC] Rename LoadInst variablesBrian M. Rzycki2018-01-291-43/+46
| | | | | | | | | | | | | | | | | | Summary: The JumpThreading pass has several locations where to the variable name LI refers to a LoadInst type. This is confusing and inhibits the ability to use LI for LoopInfo as a member of the JumpThreading class. Minor formatting and comments were also altered to reflect this change. Reviewers: dberlin, kuba, spop, sebpop Reviewed by: sebpop Subscribers: sebpop, hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D42601 llvm-svn: 323695
* Minor updated to the main libcxx page; add a link to the deprecation pageMarshall Clow2018-01-291-6/+9
| | | | llvm-svn: 323694
* [X86] Emit 11-byte or 15-byte NOPs on recent AMD targets, else default to ↵Simon Pilgrim2018-01-2910-34/+91
| | | | | | | | | | | | 10-byte NOPs (PR22965) We currently emit up to 15-byte NOPs on all targets (apart from Silvermont), which stalls performance on some targets with decoders that struggle with 2 or 3 more '66' prefixes. This patch flags recent AMD targets (btver1/znver1) to still emit 15-byte NOPs and bdver* targets to emit 11-byte NOPs. All other targets now emit 10-byte NOPs apart from SilverMont CPUs which still emit 7-byte NOPS. Differential Revision: https://reviews.llvm.org/D42616 llvm-svn: 323693
* [ARM][GISel] PR35965 Constrain RegClasses of nested instructions built from ↵Daniel Sanders2018-01-295-6/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Dst Pattern Summary: Apparently, we missed on constraining register classes of VReg-operands of all the instructions built from a destination pattern but the root (top-level) one. The issue exposed itself while selecting G_FPTOSI for armv7: the corresponding pattern generates VTOSIZS wrapped into COPY_TO_REGCLASS, so top-level COPY_TO_REGCLASS gets properly constrained, while nested VTOSIZS (or rather its destination virtual register to be exact) does not. Fixing this by issuing GIR_ConstrainSelectedInstOperands for every nested GIR_BuildMI. https://bugs.llvm.org/show_bug.cgi?id=35965 rdar://problem/36886530 Patch by Roman Tereshin Reviewers: dsanders, qcolombet, rovka, bogner, aditya_nandakumar, volkan Reviewed By: dsanders, qcolombet, rovka Subscribers: aemerson, javed.absar, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D42565 llvm-svn: 323692
* [DWARFv5] Re-enable dumping a line table with no CU.Paul Robinson2018-01-299-40/+78
| | | | | | | | | | | r323476 added support for DW_FORM_line_strp, and incorrectly made that depend on having a DWARFUnit available. We shouldn't be tracking .debug_line_str in DWARFUnit after all. After this patch, I can do an NFC follow up and undo a bunch of the "plumbing" part of r323476. Differential Revision: https://reviews.llvm.org/D42609 llvm-svn: 323691
* [X86] Avoid using high register trick for test instructionAmaury Sechet2018-01-297-82/+29
| | | | | | | | | | | | | | | Summary: It seems it's main effect is to create addition copies when values are inr register that do not support this trick, which increase register pressure and makes the code bigger. The main noteworthy regression I was able to observe was pattern of the type (setcc (trunc (and X, C)), 0) where C is such as it would benefit from the hi register trick. To prevent this, a new pattern is added to materialize such pattern using a 32 bits test. This has the added benefit of working with any constant that is materializable as a 32bits immediate, not just the ones that can leverage the high register trick, as demonstrated by the test case in test-shrink.ll using the constant 2049 . Reviewers: craig.topper, niravd, spatel, hfinkel Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D42646 llvm-svn: 323690
* [globalisel][legalizer] Change identity() to changeTo() to clarify that it ↵Daniel Sanders2018-01-292-5/+5
| | | | | | | | | | | | | changes things. NFC Prior to committing r323681, we decided to change pick() to identity() since it wasn't clear from the name what pick() did. However, identity() isn't a very good name either since it implies that no changes are made. For some reason, naming it changeTo() didn't occur to me until just after the commit. This should resolve the lack of clarity that pick() had while still implying that it changes the MIR. llvm-svn: 323689
* [CodeGen] Simplify conditional. NFCShoaib Meenai2018-01-291-1/+1
| | | | | | | | | | | Rafael pointed out that `hasInternalLinkage() || hasPrivateLinkage()` is equivalent to `hasLocalLinkage()` in post-commit review. I'm intentionally not updating the comment, partly because I like it being explicit, and partly because "global symbols with local linkage" sounds like an oxymoron. llvm-svn: 323688
* [X86] Add test case to ensure testw is generated when optimizing for size. NFCAmaury Sechet2018-01-291-0/+44
| | | | llvm-svn: 323687
* [AArch64] Change the filename of the Exynos M1 scheduling defsEvandro Menezes2018-01-292-3/+3
| | | | | | After request by Matthias Braun in https://reviews.llvm.org/D42387. llvm-svn: 323686
* [scudo] Add support for Fuchsia OS.Kostya Kortchinsky2018-01-291-1/+1
| | | | | | | | | | | | | | Summary: Built & tested in Fuchsia's build system. Reviewers: alekseyshl, cryptoad, aarongreen Reviewed By: cryptoad Subscribers: srhines, mgorny Differential Revision: https://reviews.llvm.org/D42610 llvm-svn: 323685
* [clang-format] Add more tests for ObjC protocol list formatting behaviorBen Hamilton2018-01-291-0/+14
| | | | | | | | | | | | | | | | | | | | | | | Summary: The existing unit tests in FormatTestObjC.cpp didn't fully cover all the cases for protocol confirmance list formatting. This extends the unit tests to more cases of protocol conformance list formatting, especially how the behavior changes when `BinPackParameters` changes from `true` (the default) to `false`. Test Plan: make -j12 FormatTests && \ ./tools/clang/unittests/Format/FormatTests --gtest_filter=FormatTestObjC.\* Reviewers: krasimir, jolesiak, stephanemoore Reviewed By: krasimir Subscribers: benhamilton, klimek, cfe-commits, hokein, Wizard Differential Revision: https://reviews.llvm.org/D42649 llvm-svn: 323684
* Revert "AArch64: Omit callframe setup/destroy when not necessary"Jun Bum Lim2018-01-299-87/+68
| | | | | | | | This reverts commit r322917 due to multiple performance regressions in spec2006 and spec2017. XFAILed llvm/test/CodeGen/AArch64/big-callframe.ll which initially motivated this change. llvm-svn: 323683
* Remove trailing space.Rui Ueyama2018-01-291-1/+1
| | | | llvm-svn: 323682
* [globalisel][legalizer] Adapt LegalizerInfo to support inter-type ↵Daniel Sanders2018-01-297-375/+843
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dependencies and other things. Summary: As discussed in D42244, we have difficulty describing the legality of some operations. We're not able to specify relationships between types. For example, declaring the following setAction({..., 0, s32}, Legal) setAction({..., 0, s64}, Legal) setAction({..., 1, s32}, Legal) setAction({..., 1, s64}, Legal) currently declares these type combinations as legal: {s32, s32} {s64, s32} {s32, s64} {s64, s64} but we currently have no means to say that, for example, {s64, s32} is not legal. Some operations such as G_INSERT/G_EXTRACT/G_MERGE_VALUES/ G_UNMERGE_VALUES have relationships between the types that are currently described incorrectly. Additionally, G_LOAD/G_STORE currently have no means to legalize non-atomics differently to atomics. The necessary information is in the MMO but we have no way to use this in the legalizer. Similarly, there is currently no way for the register type and the memory type to differ so there is no way to cleanly represent extending-load/truncating-store in a way that can't be broken by optimizers (resulting in illegal MIR). It's also difficult to control the legalization strategy. We've added support for legalizing non-power of 2 types but there's still some hardcoded assumptions about the strategy. The main one I've noticed is that type0 is always legalized before type1 which is not a good strategy for `type0 = G_EXTRACT type1, ...` if you need to widen the container. It will converge on the same result eventually but it will take a much longer route when legalizing type0 than if you legalize type1 first. Lastly, the definition of legality and the legalization strategy is kept separate which is not ideal. It's helpful to be able to look at a one piece of code and see both what is legal and the method the legalizer will use to make illegal MIR more legal. This patch adds a layer onto the LegalizerInfo (to be removed when all targets have been migrated) which resolves all these issues. Here are the rules for shift and division: for (unsigned BinOp : {G_LSHR, G_ASHR, G_SDIV, G_UDIV}) getActionDefinitions(BinOp) .legalFor({s32, s64}) // If type0 is s32/s64 then it's Legal .clampScalar(0, s32, s64) // If type0 is <s32 then WidenScalar to s32 // If type0 is >s64 then NarrowScalar to s64 .widenScalarToPow2(0) // Round type0 scalars up to powers of 2 .unsupported(); // Otherwise, it's unsupported This describes everything needed to both define legality and describe how to make illegal things legal. Here's an example of a complex rule: getActionDefinitions(G_INSERT) .unsupportedIf([=](const LegalityQuery &Query) { // If type0 is smaller than type1 then it's unsupported return Query.Types[0].getSizeInBits() <= Query.Types[1].getSizeInBits(); }) .legalIf([=](const LegalityQuery &Query) { // If type0 is s32/s64/p0 and type1 is a power of 2 other than 2 or 4 then it's legal // We don't need to worry about large type1's because unsupportedIf caught that. const LLT &Ty0 = Query.Types[0]; const LLT &Ty1 = Query.Types[1]; if (Ty0 != s32 && Ty0 != s64 && Ty0 != p0) return false; return isPowerOf2_32(Ty1.getSizeInBits()) && (Ty1.getSizeInBits() == 1 || Ty1.getSizeInBits() >= 8); }) .clampScalar(0, s32, s64) .widenScalarToPow2(0) .maxScalarIf(typeInSet(0, {s32}), 1, s16) // If type0 is s32 and type1 is bigger than s16 then NarrowScalar type1 to s16 .maxScalarIf(typeInSet(0, {s64}), 1, s32) // If type0 is s64 and type1 is bigger than s32 then NarrowScalar type1 to s32 .widenScalarToPow2(1) // Round type1 scalars up to powers of 2 .unsupported(); This uses a lambda to say that G_INSERT is unsupported when type0 is bigger than type1 (in practice, this would be a default rule for G_INSERT). It also uses one to describe the legal cases. This particular predicate is equivalent to: .legalFor({{s32, s1}, {s32, s8}, {s32, s16}, {s64, s1}, {s64, s8}, {s64, s16}, {s64, s32}}) In terms of performance, I saw a slight (~6%) performance improvement when AArch64 was around 30% ported but it's pretty much break even right now. I'm going to take a look at constexpr as a means to reduce the initialization cost. Future work: * Make it possible for opcodes to share rulesets. There's no need for G_LSHR/G_ASHR/G_SDIV/G_UDIV to have separate rule and ruleset objects. There's no technical barrier to this, it just hasn't been done yet. * Replace the type-index numbers with an enum to get .clampScalar(Type0, s32, s64) * Better names for things like .maxScalarIf() (clampMaxScalar?) and the vector rules. * Improve initialization cost using constexpr Possible future work: * It's possible to make these rulesets change the MIR directly instead of returning a description of how to change the MIR. This should remove a little overhead caused by parsing the description and routing to the right code, but the real motivation is that it removes the need for LegalizeAction::Custom. With Custom removed, there's no longer a requirement that Custom legalization change the opcode to something that's considered legal. Reviewers: ab, t.p.northover, qcolombet, rovka, aditya_nandakumar, volkan, reames, bogner Reviewed By: bogner Subscribers: hintonda, bogner, aemerson, mgorny, javed.absar, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D42251 llvm-svn: 323681
* Improve testcase.Rafael Espindola2018-01-291-21/+13
| | | | | | | | We now test that pic and static produce different results for bar. The function names were demangled. The attributes are written inline. llvm-svn: 323680
* [NFC] Fixup comment with function name, actually incorrect name!Erich Keane2018-01-291-3/+2
| | | | llvm-svn: 323679
* [clang-format] Disable some text proto delimiters and functions for google styleKrasimir Georgiev2018-01-291-9/+1
| | | | | | | | | | | | | | | | | | Summary: This disables some of the most commonly used text proto delimiters and functions for google style until we resolve several style options for that style. In particular, wheter there should be a space surrounding braces ``msg { sub { key : value } }`` and the extent of packing of submessages on a same line. Reviewers: sammccall Reviewed By: sammccall Subscribers: klimek, cfe-commits Differential Revision: https://reviews.llvm.org/D42651 llvm-svn: 323678
* math.h: Set HAVE_HW_FMA32 based on compiler provided macroJan Vesely2018-01-291-0/+5
| | | | | | | | | Fixes sin/cos piglits on non-FMA capable asics. Bugzilla: https://bugs.llvm.org/show_bug.cgi?id=35983 Reviewer: Tom Stellard Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu> llvm-svn: 323677
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