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* [Clang][CodeGen][ObjC]: Fix CoreFoundation on ELF with `-fconstant-cfstrings`.Kristina Brooks2018-09-242-24/+73
| | | | | | | | | | | | | | | | | | | [Clang][CodeGen][ObjC]: Fix non-bridged CoreFoundation builds on ELF targets that use `-fconstant-cfstrings`. The original changes from differential for a similar patch to PE/COFF (https://reviews.llvm.org/D44491) did not check for an edge case where the global could be a constant which surfaced as an issue when building for ELF because of different linkage semantics. This patch addresses several issues with crashes related to CF builds on ELF as well as improves data layout by ensuring string literals that back the actual CFConstStrings end up in .rodata in line with Mach-O. Change itself tested with CoreFoundation on Linux x86_64 but should be valid for BSD-like systems as well that use ELF as the native object format. Differential Revision: https://reviews.llvm.org/D52344 llvm-svn: 342883
* [PowerPC] Support operand modifier 'x' in inline asmZaara Syeda2018-09-242-0/+37
| | | | | | | | | | | gcc uses operand modifier 'x' in inline asm for VSX registers. Without this modifier, instructions which use VSX numbering for their operands are printed as VMX registers. This patch adds support for the operand modifier 'x'. Differential Revision: https://reviews.llvm.org/D52244 llvm-svn: 342882
* [dsymutil] Set LSan blacklist whenever sanitizers are enabled.Jonas Devlieghere2018-09-241-1/+1
| | | | | | | | LSan can be enabled by itself or as part of the address sanitizer. Rather than checking the enabled sanitizers for both, just set the LSan env options whenever a sanitizer is enabled. llvm-svn: 342881
* [NFC][CodeGen][X86][AArch64] More tests for 'bit field extract' w/ constantsRoman Lebedev2018-09-242-0/+189
| | | | | | | | | | It would be best to introduce ISD::BitFieldExtract, because clearly more than one backend faces the same problem. But for now let's solve this in the x86-specific DAG combine. https://bugs.llvm.org/show_bug.cgi?id=38938 llvm-svn: 342880
* AMDGPU: Fix private handling for allowsMisalignedMemoryAccessesMatt Arsenault2018-09-243-35/+34
| | | | | | | | | | | | | If the alignment is at least 4, this should report true. Something still seems off with how < 4-byte types are handled here though. Fixing this seems to change how some combines get to where they get, but somehow isn't changing the net result. llvm-svn: 342879
* Fix some missing opcodes in bcanalyzerMatt Arsenault2018-09-242-0/+19
| | | | llvm-svn: 342878
* [llvm-mca] Improve code comments in LSUnit.{h, cpp}. NFCAndrea Di Biagio2018-09-242-15/+25
| | | | llvm-svn: 342877
* Fix Wundef NDEBUG warning; NFCSven van Haastregt2018-09-241-1/+1
| | | | | | | Check for definedness of the NDEBUG macro rather than its value, to be consistent with other uses. llvm-svn: 342876
* Add NativeProcessProtocol unit testsPavel Labath2018-09-242-0/+156
| | | | | | | | | | | | | | | | | | | | | | Summary: NativeProcessProtocol is an abstract class, but it still contains a significant amount of code. Some of that code is tested via tests of specific derived classes, but these tests don't run everywhere, as they are OS and arch-specific. They are also relatively high-level, which means some functionalities (particularly the failure cases) are hard/impossible to test. In this approach, I replace the abstract methods with mocks, which allows me to inject failures into the lowest levels of breakpoint setting code and test the class behavior in this situation. Reviewers: zturner, teemperor Subscribers: mgorny, lldb-commits Differential Revision: https://reviews.llvm.org/D52152 llvm-svn: 342875
* [ARM] Do not fuse VADD and VMUL on the Cortex-M4 and Cortex-M33Sjoerd Meijer2018-09-244-6/+26
| | | | | | | | | | | | A sequence of VMUL and VADD instructions always give the same or better performance than a fused VMLA instruction on the Cortex-M4 and Cortex-M33. Executing the VMUL and VADD back-to-back requires the same cycles, but having separate instructions allows scheduling to avoid the hazard between these 2 instructions. Differential Revision: https://reviews.llvm.org/D52289 llvm-svn: 342874
* Revert r341932 "[ARM] Enable ARMCodeGenPrepare by default"Hans Wennborg2018-09-241-1/+1
| | | | | | | | | | | This caused miscompilation of WebRTC for Android: PR39060. > We've had the pass enabled downstream for a couple of weeks and it > seems to be okay, so enable it by default. > > Differential Revision: https://reviews.llvm.org/D51920 llvm-svn: 342873
* [ARM][ARMLoadStoreOptimizer]Luke Cheeseman2018-09-242-0/+54
| | | | | | | | | | | - The load store optimizer is currently merging multiple loads/stores into VLDM/VSTM with more than 16 doubleword registers - This is an UNPREDICTABLE instruction and shouldn't be done - It looks like the Limit for how many registers included in a merge got dropped at some point so I am reintroducing it in this patch - This fixes https://bugs.llvm.org/show_bug.cgi?id=38389 Differential Revision: https://reviews.llvm.org/D52085 llvm-svn: 342872
* [deadargelim] Update dbg.value of 'unused' parametersPetar Jovanovic2018-09-242-3/+94
| | | | | | | | | | | | DeadArgElim pass marks unused function arguments as ‘undef’ without updating existing dbg.values referring to it. As a consequence the debug info metadata in the final executable was wrong. Patch by Djordje Todorovic. Differential Revision: https://reviews.llvm.org/D51968 llvm-svn: 342871
* [ARM] bottom-top mul support ARMParallelDSPSam Parker2018-09-244-27/+712
| | | | | | | | | | | | | | | | Originally committed in rL342210 but was reverted in rL342260 because it was causing issues in vectorized code, because I had forgotten to ensure that we're operating on scalar values. Original commit message: On failing to find sequences that can be converted into dual macs, try to find sequential 16-bit loads that are used by muls which we can then use smultb, smulbt, smultt with a wide load. Differential Revision: https://reviews.llvm.org/D51983 llvm-svn: 342870
* When running the ios/iossim prepare script show the script output when it ↵Dan Liew2018-09-241-1/+6
| | | | | | | | | | | | | | | | | | | returns with a non-zero exit code. Summary: Previously we'd just show the exception and not the output from the executed script. This is unhelpful in the case that the script actually reports some useful information on the failure. Now we print the output and re-raise the exception. Reviewers: kubamracek, george.karpenkov Subscribers: #sanitizers, llvm-commits Differential Revision: https://reviews.llvm.org/D52350 llvm-svn: 342869
* Fix the configuration of the Primary allocator for Darwin ARM64 byDan Liew2018-09-241-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | changing the value of `SANITIZER_MMAP_RANGE_SIZE` to something more sensible. The available VMA is at most 64GiB and not 256TiB that was previously being used. This change gives us several wins: * Drastically improves LeakSanitizer performance on Darwin ARM64 devices. On a simple synthentic benchmark this took leak detection time from ~30 seconds to 0.5 seconds due to the `ForEachChunk(...)` method enumerating a much smaller number of regions. Previously we would pointlessly iterate over a large portion of the SizeClassAllocator32's ByteMap that would could never be set due it being configured for a much larger VM space than is actually availble. * Decreases the memory required for the Primary allocator. Previously the ByteMap inside the the allocator used an array of pointers that took 512KiB of space. Now the required space for the array is 128 bytes. rdar://problem/43509428 Differential Revision: https://reviews.llvm.org/D51173 llvm-svn: 342868
* [clangd] Force Dex to respect symbol collector flagsKirill Bobyrev2018-09-242-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | `Dex` should utilize `FuzzyFindRequest.RestrictForCodeCompletion` flags and omit symbols not meant for code completion when asked for it. The measurements below were conducted with setting `FuzzyFindRequest.RestrictForCodeCompletion` to `true` (so that it's more realistic). Sadly, the average latency goes down, I suspect that is mostly because of the empty queries where the number of posting lists is critical. | Metrics | Before | After | Relative difference | ----- | ----- | ----- | ----- | Cumulative query latency (7000 `FuzzyFindRequest`s over LLVM static index) | 6182735043 ns | 7202442053 ns | +16% | Whole Index size | 81.24 MB | 81.79 MB | +0.6% Out of 292252 symbols collected from LLVM codebase 136926 appear to be restricted for code completion. Reviewers: ioeric Differential Revision: https://reviews.llvm.org/D52357 llvm-svn: 342866
* [llvm-exegesis] Fix PR39021.Clement Courbet2018-09-241-2/+6
| | | | | | | | | | | | | | Summary: The `set` statements was incorrectly reading the value of the local variable and setting the value of the parent variable. Reviewers: tycho, gchatelet, john.brawn Subscribers: mgorny, tschuett, llvm-commits Differential Revision: https://reviews.llvm.org/D52343 llvm-svn: 342865
* Fix llvm-diff anon-func.ll testHans Wennborg2018-09-241-4/+4
| | | | llvm-svn: 342864
* Remove debug printf leftover from r342397Hans Wennborg2018-09-241-2/+0
| | | | llvm-svn: 342863
* [ARM][AArch64] Add feature +fp16fmlSjoerd Meijer2018-09-246-26/+326
| | | | | | | | | | | | | | | | | | | | | Armv8.4-A adds a few FP16 instructions that can optionally be implemented in CPUs of Armv8.2-A and above. This patch adds a feature to clang to permit selection of these instructions. This interacts with the +fp16 option as follows: Prior to Armv8.4-A: *) +fp16fml implies +fp16 *) +nofp16 implies +nofp16fml From Armv8.4-A: *) The above conditions apply, additionally: +fp16 implies +fp16fml Patch by Bernard Ogden. Differential Revision: https://reviews.llvm.org/D50229 llvm-svn: 342862
* Add inherited attributes before parsed attributes.Michael Kruse2018-09-246-15/+53
| | | | | | | | | | | | | | | | | Currently, attributes from previous declarations ('inherited attributes') are added to the end of a declaration's list of attributes. Before r338800, the attribute list was in reverse. r338800 changed the order of non-inherited (parsed from the current declaration) attributes, but inherited attributes are still appended to the end of the list. This patch appends inherited attributes after other inherited attributes, but before any non-inherited attribute. This is to make the order of attributes in the AST correspond to the order in the source code. Differential Revision: https://reviews.llvm.org/D50214 llvm-svn: 342861
* [X86] Add 512-bit test cases to setcc-wide-types.ll. NFCCraig Topper2018-09-241-0/+588
| | | | llvm-svn: 342860
* [XRay] Clean up XRay build configurationDean Michael Berris2018-09-245-16/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This change spans both LLVM and compiler-rt, where we do the following: - Add XRay to the LLVMBuild system, to allow for distributing the XRay trace loading library along with the LLVM distributions. - Use `llvm-config` better in the compiler-rt XRay implementation, to depend on the potentially already-distributed LLVM XRay library. While this is tested with the standalone compiler-rt build, it does require that the LLVMXRay library (and LLVMSupport as well) are available during the build. In case the static libraries are available, the unit tests will build and work fine. We're still having issues with attempting to use a shared library version of the LLVMXRay library since the shared library might not be accessible from the standard shared library lookup paths. The larger change here is the inclusion of the LLVMXRay library in the distribution, which allows for building tools around the XRay traces and profiles that the XRay runtime already generates. Reviewers: echristo, beanz Subscribers: mgorny, hiraditya, mboerger, llvm-commits Differential Revision: https://reviews.llvm.org/D52349 llvm-svn: 342859
* Fix asserts when linking wrong address space declarationsMatt Arsenault2018-09-243-3/+25
| | | | llvm-svn: 342858
* llvm-diff: Fix crash on anonymous functionsMatt Arsenault2018-09-242-2/+34
| | | | | | | Not sure what the correct behavior is for this. Skip them and report how many there were. llvm-svn: 342857
* [DAGCombiner] Remove some dead code from ConstantFoldBITCASTofBUILD_VECTORCraig Topper2018-09-241-9/+2
| | | | | | This code handled SCALAR_TO_VECTOR being returned by the recursion, but the code that used to return SCALAR_TO_VECTOR was removed in 2015. llvm-svn: 342856
* [libcxx] Fix the binder deprecation tests on Clang 5.Louis Dionne2018-09-2311-110/+46
| | | | | | Tested on Docker containers with Clang 4, 5 and 6. llvm-svn: 342855
* [libcxx] Fix buildbots on DebianLouis Dionne2018-09-2311-0/+11
| | | | | | | | | | | | | | | | Debian build bots are running Clang 4, which apparently does not support the "deprecated" attribute properly. Clang pretends to support the attribute, but the attribute doesn't do anything. (live example: https://wandbox.org/permlink/0De69aXns0t1D59r) On a separate note, I'm not sure I understand why we're even running the libc++ tests under Clang-4. Is this a configuration we support? I can understand that libc++ should _build_ with Clang 4, but it's not clear to me that new libc++ headers should be usable under older compilers like that. llvm-svn: 342854
* [ORC] Add some debugging output to Core.h/Core.cppLang Hames2018-09-232-0/+11
| | | | | | Core now logs when materialization units are dispatched or return to JITDylibs. llvm-svn: 342853
* [X86] Split WriteShift/WriteRotate schedule classes by CL usage.Simon Pilgrim2018-09-2311-95/+64
| | | | | | Variable Shifts/Rotates using the CL register have different behaviours to the immediate instructions - split accordingly to help remove yet more repeated overrides from the schedule models. llvm-svn: 342852
* [DAGCombiner] Clarify a comment. NFCCraig Topper2018-09-231-2/+4
| | | | | | This comment was misleading about why we were restricting to before legalize types. The reason given would only apply to before legalize ops. But there is a before legalize types reason that should also be listed. llvm-svn: 342851
* [LegalizeTypes] Fix bad indentation. NFCCraig Topper2018-09-231-1/+1
| | | | llvm-svn: 342850
* [libcxx] Document new symbols __u64toa and __u32toa on DarwinLouis Dionne2018-09-232-0/+5
| | | | | | | | | | | | | | Summary: This is the counterpart for https://reviews.llvm.org/D50130 and https://reviews.llvm.org/D52391 on Darwin. Reviewers: EricWF Subscribers: christof, dexonsmith, cfe-commits, libcxx-commits, lichray Differential Revision: https://reviews.llvm.org/D52396 llvm-svn: 342849
* [X86] Remove unnecessary WriteRotate override. NFCI.Simon Pilgrim2018-09-231-4/+2
| | | | | | SNB was the last override for ROT(L|R)r(1|i) - they now all use WriteRotate correctly. llvm-svn: 342848
* Fix line ending mismatches. NFCI.Simon Pilgrim2018-09-231-6/+6
| | | | llvm-svn: 342847
* [X86] ROR*mCL instruction models should match ROL*mCL etc.Simon Pilgrim2018-09-238-64/+40
| | | | | | | | Confirmed with Craig Topper - fix a typo that was missing a Port4 uop for ROR*mCL instructions on some Intel models. Yet another step on the scheduler model cleanup marathon...... llvm-svn: 342846
* [Aarch64] Fix memcpy that was copying 4x too many bytesBenjamin Kramer2018-09-231-1/+1
| | | | | | Found by asan. llvm-svn: 342845
* [DAGCombiner][x86] extend decompose of integer multiply into shift/add with ↵Sanjay Patel2018-09-233-131/+72
| | | | | | | | | | | | | | | | | negation This is an alternative to https://reviews.llvm.org/D37896. We can't decompose multiplies generically without a target hook to tell us when it's profitable. ARM and AArch64 may be able to remove some existing code that overlaps with this transform. This extends D52195 and may resolve PR34474: https://bugs.llvm.org/show_bug.cgi?id=34474 (still an open question about transforming legal vector multiplies, but we could open another bug report for those) llvm-svn: 342844
* [libc++] Add deprecated attributes to many deprecated componentsLouis Dionne2018-09-2318-50/+551
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: These deprecation warnings are opt-in: they are only enabled when the _LIBCXX_DEPRECATION_WARNINGS macro is defined, which is not the case by default. Note that this is a first step in the right direction, but I wasn't able to get an exhaustive list of all deprecated components per standard, so there's certainly stuff that's missing. The list of components this commit marks as deprecated is: in C++11: - auto_ptr, auto_ptr_ref - binder1st, binder2nd, bind1st(), bind2nd() - pointer_to_unary_function, pointer_to_binary_function, ptr_fun() - mem_fun_t, mem_fun1_t, const_mem_fun_t, const_mem_fun1_t, mem_fun() - mem_fun_ref_t, mem_fun1_ref_t, const_mem_fun_ref_t, const_mem_fun1_ref_t, mem_fun_ref() in C++14: - random_shuffle() in C++17: - unary_negate, binary_negate, not1(), not2() <rdar://problem/18168350> Reviewers: mclow.lists, EricWF Subscribers: christof, dexonsmith, llvm-commits Differential Revision: https://reviews.llvm.org/D48912 llvm-svn: 342843
* [X86] Added missing RCL/RCR schedule overrides to the generic SNB modelSimon Pilgrim2018-09-234-290/+314
| | | | | | | | | | | | The SandyBridge model was missing schedule values for the RCL/RCR values - instead using the (incredibly optimistic) WriteShift (now WriteRotate) defaults. I've added overrides with more realistic (slow) values, based on a mixture of Agner/instlatx64 numbers and what later Intel models do as well. This is necessary to allow WriteRotate to be updated to remove other rotate overrides. It'd probably be a good idea to investigate a WriteRotateCarry class at some point but its not high priority given the unusualness of these instructions. llvm-svn: 342842
* [X86] Remove unnecessary WriteRotate overrides. NFCI.Simon Pilgrim2018-09-234-26/+6
| | | | llvm-svn: 342841
* [NFC][libcxx] Rename helpers with 4 underscores to something more reasonableLouis Dionne2018-09-231-14/+14
| | | | llvm-svn: 342840
* [X86] Move RORX instructions back to WriteShift schedule classSimon Pilgrim2018-09-231-2/+4
| | | | | | Despite being rotates, these more modern instructions avoid many of the quirks of the regular x86 rotate instructions and consistently have a schedule closer to shifts. llvm-svn: 342839
* [x86] add tests for mul decomposition with negative constant; NFCSanjay Patel2018-09-231-0/+292
| | | | llvm-svn: 342838
* [X86] Add WriteRotate schedule class, splitting off from WriteShift.Simon Pilgrim2018-09-2311-16/+27
| | | | | | | | NFCI for now, but it should make it easier to remove a lot of unnecessary overrides in a future commit. Now that funnel shift intrinsics are coming online we need to get this cleaned up to make vectorization costs from scalar rotate patterns more straightforward. llvm-svn: 342837
* [WholeProgramDevirt] Don't process declarations when building type id mapEugene Leviant2018-09-232-1/+26
| | | | | | Differential revision: https://reviews.llvm.org/D52175 llvm-svn: 342836
* Build PassBuilder.cpp with /bigobj to try and appease MSVC EXPENSIVE_CHECKS ↵Simon Pilgrim2018-09-231-0/+4
| | | | | | buildbot llvm-svn: 342835
* [analyzer][UninitializedObjectChecker] Using the new const methods of ↵Kristof Umann2018-09-232-20/+10
| | | | | | | | ImmutableList Differential Revision: https://reviews.llvm.org/D51886 llvm-svn: 342834
* [CMake] Use internal_linkage rather than always_inline for libc++Petr Hosek2018-09-231-0/+2
| | | | | | | | | | This is a workaround for PR39053 which was uncovered by D50652 when the default attribute has been changed from internal_linkage to always_inline. Differential Revision: https://reviews.llvm.org/D52402 llvm-svn: 342833
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