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Reviewed By: ruiu
Differential Revision: http://reviews.llvm.org/D21128
llvm-svn: 272172
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llvm-svn: 272171
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Teach AArch64RegisterBankInfo that G_OR can be mapped on either GPR or
FPR for 64-bit or 32-bit values.
Add test cases demonstrating how this information is used to coalesce a
computation on a single register bank.
llvm-svn: 272170
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The RegBankSelect pass can now rely on the target to do the remapping of
the instructions.
llvm-svn: 272169
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by "&&", "||".
llvm-svn: 272168
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Differential Revision: http://reviews.llvm.org/D21116
llvm-svn: 272167
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The new version of the header introduces the INSTR_PROF_VISIBILITY
macro. See http://reviews.llvm.org/D21116 for more details.
llvm-svn: 272166
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Now, the target will be able to provide its how implementation to remap
an instruction. This open the way to crazier optimizations, but to
beginning with, we will be able to handle something else than the
default mapping.
llvm-svn: 272165
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Now that we have an entity that hold the remap information the
rewritting should be easier to do.
No functional changes.
llvm-svn: 272164
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The repairing code has no reason to change the source or destination of
the registers.
llvm-svn: 272163
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Differential Revision: http://reviews.llvm.org/D21119
llvm-svn: 272162
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This helper class is used to encapsulate the necessary information
to remap an instruction.
llvm-svn: 272161
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This G_OR is used in GlobalISel to represent bitwise OR.
llvm-svn: 272160
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Variably modified types shouldn't be permitted in catch clauses.
This fixes PR28047.
llvm-svn: 272159
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When the command line option is set, it overrides any thing that the
target may have set. The rationale is that we get what we asked for.
Options are respectively regbankselect-fast and regbankselect-greedy for
fast and greedy mode.
llvm-svn: 272158
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repairing.
Copies are easy because we repair only when there is a mismatch. For
non-copy repairing, i.e., cases that involves breaking down or gathering
up the value, one of the operand may not have a register bank yet. Thus,
derivate a cost from that, requires more work.
llvm-svn: 272157
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Found by clang's misc-unused-using-decls.
llvm-svn: 272156
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macro expansion (e.g. NULL).
Add CHECK-FIX tests.
llvm-svn: 272155
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The MSR instructions can write to the CPSR, but we did not model this
fact, so we could emit them in the middle of IT blocks, changing the
condition flags for later instructions in the block.
The tests use two calls to llvm.write_register.i32 because it is valid
to use these instructions at the end of an IT block, which if conversion
does do in some cases. With two calls, the first clobbers the flags, so
a branch has to be used to make the second one conditional.
Differential Revision: http://reviews.llvm.org/D21139
llvm-svn: 272154
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__builtin_astype does not generate correct LLVM IR for vec3 types. This patch inserts bitcasts to/from vec4 when necessary in addition to generating vector shuffle. Sema and codegen tests are added.
Differential Revision: http://reviews.llvm.org/D20133
llvm-svn: 272153
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Summary:
Currently, removing dot dot in header's path doesn't make include-fixer
minimize path correctly in some cases, for example, specify a relative search
path based on the build directory("-I../include/").
Besides, removing dot dot can break symbolic link directories. So don't
removing it for now.
Reviewers: ioeric, bkramer
Subscribers: cfe-commits
Differential Revision: http://reviews.llvm.org/D21132
llvm-svn: 272152
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llvm-svn: 272151
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llvm-svn: 272150
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According to the Sparc V8 ABI, complex numbers should be passed and returned as pairs of registers:
https://docs.oracle.com/cd/E26502_01/html/E28387/gentextid-2734.html
This fix ensures this is the case. Without this, complex numbers are returned as a struct of two floats, which breaks the ABI rules.
Differential Review: http://reviews.llvm.org/D20955
llvm-svn: 272149
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According to the Sparc V8 ABI, complex numbers should be passed and returned as pairs of registers:
https://docs.oracle.com/cd/E26502_01/html/E28387/gentextid-2734.html
This fix ensures this is the case. Without this, complex numbers are returned as a struct of two floats, which breaks the ABI rules.
Differential Review: http://reviews.llvm.org/D20955
llvm-svn: 272148
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llvm-svn: 272147
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llvm-svn: 272146
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The architecture enumeration is shared across ARM and AArch64. However, the
data is not. The code incorrectly would index into the array using the
architecture index which was offset by the ARMv7 architecture enumeration. We
do not have a marker for indicating the architectural family to which the
enumeration belongs so we cannot be clever about offsetting the index (at least
it is not immediately apparent to me). Instead, fall back to the tried-and-true
method of slowly iterating the array (its not a large array, so the impact of
this is not too high).
Because of the incorrect indexing, if we were lucky, we would crash, but usually
we would return an invalid StringRef. We did not have any tests for the AArch64
target parser previously;. Extend the previous tests I had added for ARM to
cover AArch64 for ensuring that we return expected StringRefs.
Take the opportunity to change some iterator types to references.
This work is needed to support parsing `.arch name` directives in the AArch64
target asm parser.
llvm-svn: 272145
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Summary:
Looks like the original code was copied from clang-format-diff.py.
Update help message to make it clang-tidy specific.
Reviewers: klimek, alexfh
Subscribers: Eugene.Zelenko, cfe-commits
Patch by Igor Sugak!
Differential Revision: http://reviews.llvm.org/D21050
llvm-svn: 272144
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llvm-svn: 272143
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Summary:
The JavaScript import sorter has a corner condition that can cause the overall
source text length to shrink. This change circumvents the issue by appending
trailing space in the line after the import blocks to match at least the
previous source code length.
This needs a better long term fix, but this fixes the immediate issue.
Reviewers: alexeagle, djasper
Subscribers: klimek
Differential Revision: http://reviews.llvm.org/D21108
llvm-svn: 272142
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This will allow us to remove the x86 instrinics from the backend.
Differential Revision: http://reviews.llvm.org/D21060
llvm-svn: 272141
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llvm-svn: 272140
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llvm-svn: 272139
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llvm-svn: 272138
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It was one line global static function that looks nicer to inline,
patch do that.
llvm-svn: 272137
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llvm-svn: 272136
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Also, switch to using functions from LiveIntervalAnalysis to update
live intervals, instead of performing the updates manually.
Re-committing r272045.
llvm-svn: 272135
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llvm-svn: 272134
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That made few places in code a bit shorter.
llvm-svn: 272133
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llvm-svn: 272132
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llvm-svn: 272131
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llvm-svn: 272130
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llvm-svn: 272129
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declarations
Fixes bugzilla issues 26273 and 27399
Reviewers: alexfh
Subscribers: cfe-commits
Differential Revision: http://reviews.llvm.org/D20853
llvm-svn: 272128
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isSwift is tested earlier and known to be false when we reach this code.
llvm-svn: 272127
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As suggested by clang-tidy's performance-unnecessary-copy-initialization.
This can easily hit lifetime issues, so I audited every change and ran the
tests under asan, which came back clean.
llvm-svn: 272126
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This could lead to column limit violations.
llvm-svn: 272125
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.. and simplify it.
Before:
void A::f()&& {}
void f() && {}
After:
void A::f() && {}
void f() && {}
llvm-svn: 272124
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Differential Revision: http://reviews.llvm.org/D21002
llvm-svn: 272123
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