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* [AMDGPU][MC][GFX8][GFX9] Corrected names of integer ↵Dmitry Preobrazhensky2017-11-2063-506/+611
| | | | | | | | | | | | v_{add/addc/sub/subrev/subb/subbrev} See bug 34765: https://bugs.llvm.org//show_bug.cgi?id=34765 Reviewers: tamazov, SamWot, arsenm, vpykhtin Differential Revision: https://reviews.llvm.org/D40088 llvm-svn: 318675
* Handle NetBSD specific indirection of libpthread functionsKamil Rytarowski2017-11-202-1/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Correct handling of libpthread(3) functions in TSan/NetBSD: - pthread_cond_init(3), - pthread_cond_signal(3), - pthread_cond_broadcast(3), - pthread_cond_wait(3), - pthread_cond_destroy(3), - pthread_mutex_init(3), - pthread_mutex_destroy(3), - pthread_mutex_trylock(3), - pthread_rwlock_init(3), - pthread_rwlock_destroy(3), - pthread_rwlock_rdlock(3), - pthread_rwlock_tryrdlock(3), - pthread_rwlock_wrlock(3), - pthread_rwlock_trywrlock(3), - pthread_rwlock_unlock(3), - pthread_once(3). Code out of the libpthread(3) context uses the libc symbols that are prefixed with __libc_, for example: __libc_cond_init. This caused that these functions were invisible to sanitizers on NetBSD. Intercept the libc-specific ones and add them as NetBSD-specific aliases for the common pthread(3) ones. NetBSD needs to intercept both functions, as the regularly named ones are used internally in libpthread(3). Sponsored by <The NetBSD Foundation> Reviewers: joerg, dvyukov, vitalybuka Reviewed By: dvyukov Subscribers: kubamracek, llvm-commits, #sanitizers Tags: #sanitizers Differential Revision: https://reviews.llvm.org/D40243 llvm-svn: 318673
* [Docs] Regenerate the command line option reference.Craig Topper2017-11-201-5/+45
| | | | llvm-svn: 318672
* Add DemangleFunctionName for backtracing on NetBSDKamil Rytarowski2017-11-201-2/+79
| | | | | | | | | | | | | | | | | | | | | Summary: NetBSD uses indirection for old threading functions for historical reasons The mangled names are internal implementation detail and should not be exposed even in backtraces. Sponsored by <The NetBSD Foundation> Reviewers: joerg, vitalybuka, dvyukov Reviewed By: dvyukov Subscribers: kubamracek, llvm-commits, #sanitizers Tags: #sanitizers Differential Revision: https://reviews.llvm.org/D40251 llvm-svn: 318671
* [clang-tidy] revert hicpp-multiway-paths-coveredJonas Toth2017-11-209-859/+0
| | | | | | | | The address sanitizer found a stackoverflow with this patch. There is no obvious fix. This patch will be reapplied when the problem is found. llvm-svn: 318670
* For Linux/gnu compatibility, preinclude <stdc-predef.h> if the file is availableErich Keane2017-11-2020-56/+99
| | | | | | | | | | | | | | | | | | | | | | As reported in llvm bugzilla 32377. Here’s a patch to add preinclude of stdc-predef.h. The gcc documentation says “On GNU/Linux, <stdc-predef.h> is pre-included.” See https://gcc.gnu.org/gcc-4.8/porting_to.html; The preinclude is inhibited with –ffreestanding. Basically I fixed the failing test cases by adding –ffreestanding which inhibits this behavior. I fixed all the failing tests, including some in extra/test, there's a separate patch for that which is linked here Patch By: mibintc Differential Revision: https://reviews.llvm.org/D34158 llvm-svn: 318669
* extra test modifications for D34158Erich Keane2017-11-202-2/+2
| | | | | | | | | | | | When adding support for D34158 which changes preprocessed output, I needed to make tiny test corrections for these. Adding the option -ffreestanding suppresses the new behavior, and that's the change I made to fix the tests. Patch By: mibintc Differential Revision: https://reviews.llvm.org/D34624 llvm-svn: 318668
* Revert r318456 "Issue -Wempty-body warnings for else blocks"Hans Wennborg2017-11-203-25/+1
| | | | | | | | | | | | | | This caused warnings also when the if or else comes from macros. There was an attempt to fix this in r318556, but that introduced new problems and was reverted. Reverting this too until the whole issue is sorted. > This looks like it was just an oversight. > > Fixes http://llvm.org/pr35319 > > git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@318456 91177308-0d34-0410-b5e6-96231b3b80d8 llvm-svn: 318667
* [asan] Use dynamic shadow on 32-bit Android, try 2.Evgeniy Stepanov2017-11-2014-22/+310
| | | | | | | | | | | | | | | | Summary: This change reverts r318575 and changes FindDynamicShadowStart() to keep the memory range it found mapped PROT_NONE to make sure it is not reused. We also skip MemoryRangeIsAvailable() check, because it is (a) unnecessary, and (b) would fail anyway. Reviewers: pcc, vitalybuka, kcc Subscribers: srhines, kubamracek, mgorny, llvm-commits, hiraditya Differential Revision: https://reviews.llvm.org/D40203 llvm-svn: 318666
* Revert r318556 "Loosen -Wempty-body warning"Hans Wennborg2017-11-205-18/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It seems this somehow made -Wempty-body fire in some macro cases where it didn't before, e.g. ../../third_party/ffmpeg/libavcodec/bitstream.c(169,5): error: if statement has empty body [-Werror,-Wempty-body] ff_dlog(NULL, "new table index=%d size=%d\n", table_index, table_size); ^ ../../third_party/ffmpeg\libavutil/internal.h(276,80): note: expanded from macro 'ff_dlog' # define ff_dlog(ctx, ...) do { if (0) av_log(ctx, AV_LOG_DEBUG, __VA_ARGS__); } while (0) ^ ../../third_party/ffmpeg/libavcodec/bitstream.c(169,5): note: put the semicolon on a separate line to silence this warning Reverting until this can be figured out. > Do not show it when `if` or `else` come from macros. > E.g., > > #define USED(A) if (A); else > #define SOME_IF(A) if (A) > > void test() { > // No warnings are shown in those cases now. > USED(0); > SOME_IF(0); > } > > Patch by Ilya Biryukov! > > Differential Revision: https://reviews.llvm.org/D40185 llvm-svn: 318665
* [Expression parser] Remove logging of field that is no longer in clang's ↵Craig Topper2017-11-201-1/+0
| | | | | | | | TargetOptions struct. The Reciprocals field was moved to CodeGenOptions. I don't think lldb was really using this field so I'm just removing the mention. llvm-svn: 318664
* [CodeGen] Move Reciprocals option from TargetOptions to CodeGenOptionsCraig Topper2017-11-204-4/+4
| | | | | | Diffrential Revision: https://reviews.llvm.org/D40226 llvm-svn: 318662
* [MachineCSE] Add new callback for is caller preserved or constant physregsTony Jiang2017-11-205-26/+96
| | | | | | | | | | | | | The instructions addis,addi, bl are used to calculate the address of TLS thread local variables. These TLS access code sequences are generated repeatedly every time the thread local variable is accessed. By communicating to Machine CSE that X2 is guaranteed to have the same value within the same function call (so called Caller Preserved Physical Register), the redundant TLS access code sequences are cleaned up. Differential Revision: https://reviews.llvm.org/D39173 llvm-svn: 318661
* [AMDGPU] Update test r600.amdgpu-alias-analysis.llYaxun Liu2017-11-201-3/+3
| | | | | | | | | | | | | Manually update test r600.amdgpu-alias-analysis.ll for amdgiz environment since it cannot be done by script. The two pointers are swapped in the output because PrintResults in AliasAnalysisEvaluator.cpp sorts the strings obtained from printAsOperand before printing them. Differential Revision: https://reviews.llvm.org/D40131 llvm-svn: 318660
* [sanitizer] New attempt at using runtime checks for Android loggingKostya Kortchinsky2017-11-201-27/+40
| | | | | | | | | | | | | | | | | | | | | | | | Summary: This is a second attempt after D40100 induced racey crashes with ASan (due to `__android_log_write` and the `strncpy` interceptor on API >= 21). This new version checks the runtime API level to be <= `ANDROID_KITKAT` for the use of `__android_log_write`, otherwise we use `syslog`, which should conform with the previous behavior. Unfortunately despite numerous efforts I couldn't reproduce the original crashes in my environments so I couldn't test that the fix was actually preventing crashes. Reviewers: eugenis Reviewed By: eugenis Subscribers: llvm-commits, srhines, kubamracek Differential Revision: https://reviews.llvm.org/D40149 llvm-svn: 318659
* Fixed OMP doacross implementation on 32-bit platforms.Andrey Churbanov2017-11-201-8/+15
| | | | | | Differential Revision: https://reviews.llvm.org/D40171 llvm-svn: 318658
* [mips] Reorder target specific passesSimon Dardis2017-11-202-5/+158
| | | | | | | | | Move the hazard scheduling pass to after the long branch pass, as the long branch pass can create forbiddden slot hazards. Rather than complicating the implementation of the long branch pass to handle forbidden slot hazards, just reorder the passes. llvm-svn: 318657
* [ELF] Fix rewriting of --sysroot in reproducer tarsAlexander Richardson2017-11-202-8/+13
| | | | | | | | | | | | | | | | | | Summary: I noticed that the reproducers files I was getting from building CheriBSD didn't work because the --sysroot option was not being rewritten. I've updated the test to also verify that the rewritten path matches uses a FileCheck capature instead of a {{.+}} regex Reviewers: ruiu Reviewed By: ruiu Subscribers: llvm-commits, emaste Differential Revision: https://reviews.llvm.org/D40125 llvm-svn: 318656
* [ELF] Fall back to search dirs for linker scripts specified with -TAlexander Richardson2017-11-207-14/+39
| | | | | | | | | | | | | | | | | | | | Summary: This matches the behaviour of ld.bfd: https://sourceware.org/binutils/docs/ld/Options.html#Options If scriptfile does not exist in the current directory, ld looks for it in the directories specified by any preceding '-L' options. Multiple '-T' options accumulate. Reviewers: ruiu, grimar Reviewed By: ruiu, grimar Subscribers: emaste, llvm-commits Differential Revision: https://reviews.llvm.org/D40129 llvm-svn: 318655
* Correct return types of NetBSD specific functionsKamil Rytarowski2017-11-201-3/+3
| | | | | | | | | | | | The __libc_mutex_lock, __libc_mutex_unlock and __libc_thr_setcancelstate functions return int, not void. This does not seem to introduce a functional change, however it looks better with fixed the function prototype. Sponsored by <The NetBSD Foundation> llvm-svn: 318654
* [ELF][MIPS] Fix crash in LLD when linking code that needs PIC thunksAlexander Richardson2017-11-202-0/+42
| | | | | | | | | | | | | | | | | | | | | | | Summary: The bug triggers when the following conditions are met: - A thunk is created in a given input section S - A linker script is specified - There is at least one matcher in the linker script .text section output that does not match any of the sections in the input files, before the matcher that matches section S. The issue was found when linking the FreeBSD kernel for MIPS when built with -fPIC. Patch by Alfredo Mazzinghi. Reviewers: ruiu, psmith, atanasyan Reviewed By: ruiu Subscribers: peter.smith, emaste, sdardis, krytarowski, llvm-commits Differential Revision: https://reviews.llvm.org/D40174 llvm-svn: 318653
* [SystemZ] Bugfix for handling of subregisters in getRegAllocationHints().Jonas Paulsson2017-11-202-2/+86
| | | | | | | | The 32 bit subreg indices of GR128 registers must also be checked for in getRC32(). Review: Ulrich Weigand. llvm-svn: 318652
* [PPC] Heuristic to choose between a X-Form VSX ld/st vs a X-Form FP ld/st.Tony Jiang2017-11-2016-106/+263
| | | | | | | | | | | | | | | | | | | | The VSX versions have the advantage of a full 64-register target whereas the FP ones have the advantage of lower latency and higher throughput. So what we’re after is using the faster instructions in low register pressure situations and using the larger register file in high register pressure situations. The heuristic chooses between the following 7 pairs of instructions. PPC::LXSSPX vs PPC::LFSX PPC::LXSDX vs PPC::LFDX PPC::STXSSPX vs PPC::STFSX PPC::STXSDX vs PPC::STFDX PPC::LXSIWAX vs PPC::LFIWAX PPC::LXSIWZX vs PPC::LFIWZX PPC::STXSIWX vs PPC::STFIWX Differential Revision: https://reviews.llvm.org/D38486 llvm-svn: 318651
* [AArch64][TableGen] Skip tied result operands for InstAliasSander de Smalen2017-11-2024-261/+271
| | | | | | | | | | | | | | | | | | | | Summary: This patch fixes an issue so that the right alias is printed when the instruction has tied operands. It checks the number of operands in the resulting instruction as opposed to the alias, and then skips over tied operands that should not be printed in the alias. This allows to generate the preferred assembly syntax for the AArch64 'ins' instruction, which should always be displayed as 'mov' according to the ARM Architecture Reference Manual. Several unit tests have changed as a result, but only to reflect the preferred disassembly. Some other InstAlias patterns (movk/bic/orr) needed a slight adjustment to stop them becoming the default and breaking other unit tests. Please note that the patch is mostly the same as https://reviews.llvm.org/D29219 which was reverted because of an issue found when running TableGen with the Address Sanitizer. That issue has been addressed in this iteration of the patch. Reviewers: rengolin, stoklund, huntergr, SjoerdMeijer, rovka Reviewed By: rengolin, SjoerdMeijer Subscribers: fhahn, aemerson, javed.absar, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D40030 llvm-svn: 318650
* AMDGPU: Partial ILP scheduler port from SelectionDAG to SchedulingDAG ↵Valery Pykhtin2017-11-206-4/+1020
| | | | | | | | (experimental) Differential revision: https://reviews.llvm.org/D39897 llvm-svn: 318649
* [ARM] For assembler files recognize -Xassembler or -Wa, -mthumbPeter Smith2017-11-201-1/+1
| | | | | | Attempt to fix warning picked up by buildbot. llvm-svn: 318648
* [ARM] For assembler files recognize -Xassembler or -Wa, -mthumbPeter Smith2017-11-203-5/+50
| | | | | | | | | | | | | | | | | | | | | | The Unified Arm Assembler Language is designed so that the majority of assembler files can be assembled for both Arm and Thumb with the choice made as a compilation option. The way this is done in gcc is to pass -mthumb to the assembler with either -Wa,-mthumb or -Xassembler -mthumb. This change adds support for these options to clang. There is no assembler equivalent of -mno-thumb, -marm or -mno-arm so we don't need to recognize these. Ideally we would do all of the processing in CollectArgsForIntegratedAssembler(). Unfortunately we need to change the triple and at that point it is too late. Instead we look for the option earlier in ComputeLLVMTriple(). Fixes PR34519 Differential Revision: https://reviews.llvm.org/D40127 llvm-svn: 318647
* Handle NetBSD specific indirection of libpthread functionsKamil Rytarowski2017-11-201-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Correct handling of three libpthread(3) functions on NetBSD: - pthread_mutex_lock(3), - pthread_mutex_unlock(3), - pthread_setcancelstate(3). Code out of the libpthread(3) context uses the libc symbols: - __libc_mutex_lock, - __libc_mutex_unlock, - __libc_thr_setcancelstate. The threading library (libpthread(3)) defines strong aliases: - __strong_alias(__libc_mutex_lock,pthread_mutex_lock) - __strong_alias(__libc_mutex_unlock,pthread_mutex_unlock) - __strong_alias(__libc_thr_setcancelstate,pthread_setcancelstate) This caused that these functions were invisible to sanitizers on NetBSD. Intercept the libc-specific ones and add them as NetBSD-specific aliases for the common pthread(3) ones. NetBSD needs to intercept both functions, as the regularly named ones are used internally in libpthread(3). Sponsored by <The NetBSD Foundation> Reviewers: joerg, dvyukov, vitalybuka Reviewed By: dvyukov Subscribers: llvm-commits, kubamracek, #sanitizers Tags: #sanitizers Differential Revision: https://reviews.llvm.org/D40241 llvm-svn: 318646
* [LV] Model masking in VPlan, introducing VPInstructionsGil Rapaport2017-11-207-129/+709
| | | | | | | | | | | | | | | This patch adds a new abstraction layer to VPlan and leverages it to model the planned instructions that manipulate masks (AND, OR, NOT), introduced during predication. The new VPValue and VPUser classes model how data flows into, through and out of a VPlan, forming the vertices of a planned Def-Use graph. The new VPInstruction class is a generic single-instruction Recipe that models a planned instruction along with its opcode, operands and users. See VectorizationPlan.rst for more details. Differential Revision: https://reviews.llvm.org/D38676 llvm-svn: 318645
* [Driver] Add a cc1 flag for the new TBAA metadata formatIvan A. Kosarev2017-11-203-0/+5
| | | | | | | | | | | This patch starts a series of changes to add support for the new TBAA metadata format proposed in this llvm-dev thread: http://lists.llvm.org/pipermail/llvm-dev/2017-November/118748.html Differential Revision: https://reviews.llvm.org/D39955 llvm-svn: 318644
* [ARM GlobalISel] Add test for RSBri. NFCDiana Picus2017-11-201-0/+58
| | | | | | | | Add instruction selector test for RSBri, which is derived from AsI1_rbin_irs, and make sure it doesn't get mistaken for SUBri, which is derived from the very similar AsI1_bin_irs pattern. llvm-svn: 318643
* [ARM GlobalISel] Clean up binary operator tests. NFCDiana Picus2017-11-201-94/+0
| | | | | | | | Remove some of the instruction selector tests for binary operators (and, or, xor). These are all derived from the same kind of TableGen pattern, AsI1_bin_irs, so there's no point in testing all of them. llvm-svn: 318642
* [LV][X86] Support of AVX2 Gathers code generation and update the LV with thisMohammed Agabaria2017-11-207-781/+346
| | | | | | | | | | | | | | | This patch depends on: https://reviews.llvm.org/D35348 Support of pattern selection of masked gathers of AVX2 (X86\AVX2 code gen) Update LoopVectorize to generate gathers for AVX2 processors. Reviewers: delena, zvi, RKSimon, craig.topper, aaboud, igorb Reviewed By: delena, RKSimon Differential Revision: https://reviews.llvm.org/D35772 llvm-svn: 318641
* [X86] Regenerate a test with broadcast comments. NFCCraig Topper2017-11-201-7/+7
| | | | llvm-svn: 318640
* [IRCE] Smart range intersectionMax Kazantsev2017-11-205-91/+527
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In rL316552, we ban intersection of unsigned latch range with signed range check and vice versa, unless the entire range check iteration space is known positive. It was a correct functional fix that saved us from dealing with ambiguous values, but it also appeared to be a very restrictive limitation. In particular, in the following case: loop: %iv = phi i32 [ 0, %preheader ], [ %iv.next, %latch] %iv.offset = add i32 %iv, 10 %rc = icmp slt i32 %iv.offset, %len br i1 %rc, label %latch, label %deopt latch: %iv.next = add i32 %iv, 11 %cond = icmp i32 ult %iv.next, 100 br it %cond, label %loop, label %exit Here, the unsigned iteration range is `[0, 100)`, and the safe range for range check is `[-10, %len - 10)`. For unsigned iteration spaces, we use unsigned min/max functions for range intersection. Given this, we wanted to avoid dealing with `-10` because it is interpreted as a very big unsigned value. Semantically, range check's safe range goes through unsigned border, so in fact it is two disjoint ranges in IV's iteration space. Intersection of such ranges is not trivial, so we prohibited this case saying that we are not allowed to intersect such ranges. What semantics of this safe range actually means is that we can start from `-10` and go up increasing the `%iv` by one until we reach `%len - 10` (for simplicity let's assume that `%len - 10` is a reasonably big positive value). In particular, this safe iteration space includes `0, 1, 2, ..., %len - 11`. So if we were able to return safe iteration space `[0, %len - 10)`, we could safely intersect it with IV's iteration space. All values in this range are non-negative, so using signed/unsigned min/max for them is unambiguous. In this patch, we alter the algorithm of safe range calculation so that it returnes a subset of the original safe space which is represented by one continuous range that does not go through wrap. In order to reach this, we use modified SCEV substraction function. It can be imagined as a function that substracts by `1` (or `-1`) as long as the further substraction does not cause a wrap in IV iteration space. This allows us to perform IRCE in many situations when we deal with IV space and range check of different types (in terms of signed/unsigned). We apply this approach for both matching and not matching types of IV iteration space and the range check. One implication of this is that now IRCE became smarter in detection of empty safe ranges. For example, in this case: loop: %iv = phi i32 [ %begin, %preheader ], [ %iv.next, %latch] %iv.offset = sub i32 %iv, 10 %rc = icmp ult i32 %iv.offset, %len br i1 %rc, label %latch, label %deopt latch: %iv.next = add i32 %iv, 11 %cond = icmp i32 ult %iv.next, 100 br it %cond, label %loop, label %exit If `%len` was less than 10 but SCEV failed to trivially prove that `%begin - 10 >u %len- 10`, we could end up executing entire loop in safe preloop while the main loop was still generated, but never executed. Now, cutting the ranges so that if both `begin - 10` and `%len - 10` overflow, we have a trivially empty range of `[0, 0)`. This in some cases prevents us from meaningless optimization. Differential Revision: https://reviews.llvm.org/D39954 llvm-svn: 318639
* [CGP] Fix the crash caused by enable of complex addr modeSerguei Katkov2017-11-202-9/+40
| | | | | | | | | | | | | We must collect all AddModes even if they are the same. This is due to Original value is different but we need all original values collected as they are used as anchors in common phi finding. Reviewers: john.brawn, reames Reviewed By: john.brawn Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D40166 llvm-svn: 318638
* COFF: Fix invalid comdat sections in test cases.Peter Collingbourne2017-11-202-19/+15
| | | | | | | | The comdat sections in these test cases do not comply with the COFF specification, and link.exe rejects them. I plan to make a change to how we handle comdat sections which would also cause us to reject them. llvm-svn: 318637
* COFF: Change SparseChunks to be of type std::vector<SectionChunk *>. NFC.Peter Collingbourne2017-11-202-4/+3
| | | | llvm-svn: 318636
* COFF: Remove unused fields. NFC.Peter Collingbourne2017-11-202-7/+1
| | | | llvm-svn: 318635
* [X86] clzero check in getHostCPUFeatures should use getX86CpuIDAndInfo not ↵Craig Topper2017-11-191-1/+1
| | | | | | | | getX86CpuIDAndInfoEx. This leaf doesn't take an additional argument. llvm-svn: 318634
* [X86] Reorder and reformat the feature bit checks in getHostCPUFeatues to ↵Craig Topper2017-11-191-54/+50
| | | | | | keep the bits in order per register and encourage future additions to be in order too. llvm-svn: 318633
* Port ScopInfo to the isl cpp bindingsPhilip Pfaffe2017-11-1923-308/+233
| | | | | | | | | | | | | | | | | | | | | Summary: Most changes are mechanical, but in one place I changed the program semantics by fixing a likely bug: In `Scop::hasFeasibleRuntimeContext()`, I'm now explicitely handling the error-case. Before, when the call to `addNonEmptyDomainConstraints()` returned a null set, this (probably) accidentally worked because isl_bool_error converts to true. I'm checking for nullptr now. Reviewers: grosser, Meinersbur, bollu Reviewed By: Meinersbur Subscribers: nemanjai, kbarton, pollydev, llvm-commits Differential Revision: https://reviews.llvm.org/D39971 llvm-svn: 318632
* Remove 2 unused methods DWARFDebugInfo::Find and their FindCallbackStringJan Kratochvil2017-11-192-81/+0
| | | | | | Differential revision: https://reviews.llvm.org/D40216 llvm-svn: 318631
* [x86] add sqrt tests for partially-inline-libcalls (PR31455)Sanjay Patel2017-11-191-0/+43
| | | | llvm-svn: 318630
* [LibCallSimplifier] allow splat vectors for pow(x, 0.5) -> sqrt() transformsSanjay Patel2017-11-192-10/+10
| | | | llvm-svn: 318629
* [LibCallSimplifier] partly fix pow(x, 0.5) -> sqrt() transformsSanjay Patel2017-11-193-36/+54
| | | | | | | | | | | | | | As the first test shows, we could transform an llvm intrinsic which never sets errno into a libcall which could set errno (even though it's marked readnone?), so that's not ideal. It's possible that we can also transform a libcall which could set errno to an intrinsic given the fast-math-flags constraint, but that's deferred to determine exactly which set of FMF are needed. Differential Revision: https://reviews.llvm.org/D40150 llvm-svn: 318628
* [InstSimplify] fold and/or of fcmp ord/uno when operand is known nnanSanjay Patel2017-11-192-59/+67
| | | | | | | | | | | | | | | | | | | The 'ord' and 'uno' predicates have a logic operation for NAN built into their definitions: FCMP_ORD = 7, ///< 0 1 1 1 True if ordered (no nans) FCMP_UNO = 8, ///< 1 0 0 0 True if unordered: isnan(X) | isnan(Y) So we can simplify patterns like this: (fcmp ord (known NNAN), X) && (fcmp ord X, Y) --> fcmp ord X, Y (fcmp uno (known NNAN), X) || (fcmp uno X, Y) --> fcmp uno X, Y It might be better to split this into (X uno 0) | (Y uno 0) as a canonicalization, but that would be another patch. Differential Revision: https://reviews.llvm.org/D40130 llvm-svn: 318627
* Add comments to DWARFCompileUnit length fields/methodsJan Kratochvil2017-11-191-9/+8
| | | | | | Differential revision: https://reviews.llvm.org/D40211 llvm-svn: 318626
* Attempt to fix template depth test failures on older Clang versionsEric Fiselier2017-11-191-0/+3
| | | | llvm-svn: 318625
* [X86] Add test cases for rndscaless/sd intrinsics.Craig Topper2017-11-192-1/+87
| | | | | | Also fix the memop in the ins for these instructions. Not sure what effect this has. llvm-svn: 318624
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