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* [analyzer] Support inlining lambda-converted blocks.Devin Coughlin2015-12-045-11/+142
| | | | | | | | | clang converts C++ lambdas to blocks with an implicit user-defined conversion operator method on the lambda record. This method returns a block that captures a copy of the lambda. To inline a lambda-converted block, the analyzer now calls the lambda records's call operator method on the lambda captured by the block. llvm-svn: 254702
* [PGO] Fix mips test failure with new test caseXinliang David Li2015-12-041-4/+19
| | | | | | | | | | cmp&swap is not well supported -- the new test case triggers some assembler error. This is a partial fix to the general problem (lack of atomics operation support for certain targets). llvm-svn: 254701
* Revert "[BranchFolding] Merge MMOs during tail merge"Rafael Espindola2015-12-041-26/+16
| | | | | | | | This reverts commit r254694. It broke bootstrap. llvm-svn: 254700
* Don't assert if evaluation of an expression that we're syntactically requiredRichard Smith2015-12-042-1/+7
| | | | | | | to treat as an ICE results in undefined behavior. Instead, return the "natural" result of the operation (signed wraparound / inf / nan). llvm-svn: 254699
* Add a space char so step logging doesn't print things likeJason Molenda2015-12-041-1/+1
| | | | | | "Stepping out from a.out`bar at a.c:3returning to frame" llvm-svn: 254698
* Update for LLVM api change.Rafael Espindola2015-12-041-1/+2
| | | | llvm-svn: 254697
* Move a call to getGlobalContext out of lib/LTO.Rafael Espindola2015-12-044-15/+7
| | | | llvm-svn: 254696
* [Orc] Fix Kaleidoscope example for change in r254693.Lang Hames2015-12-041-1/+1
| | | | llvm-svn: 254695
* [BranchFolding] Merge MMOs during tail mergeJunmo Park2015-12-041-16/+26
| | | | | | | | | | | | | | | | | Summary: If we remove the MMOs from Load/Store instructions, they are treated as volatile. This makes other optimization passes unhappy. eg. Load/Store Optimization So, it looks better to merge, not remove. Reviewers: gberry, mcrosier Subscribers: gberry, llvm-commits Differential Revision: http://reviews.llvm.org/D14797 llvm-svn: 254694
* [Orc] Rename JITCompileCallbackManagerBase to JITCompileCallbackManager.Lang Hames2015-12-048-18/+18
| | | | | | | | | This class is turning into a useful interface, rather than an implementation detail, so I'm dropping the 'Base' suffix. No functional change. llvm-svn: 254693
* .gitignore: ignore vim swap filesSaleem Abdulrasool2015-12-041-0/+4
| | | | llvm-svn: 254692
* ibc++abi: mark visibilitySaleem Abdulrasool2015-12-0410-212/+264
| | | | | | | | | Mark functions and types with the appropriate visibility. This is particularly useful for environments which explicitly indicate origin of functions (Windows). This aids in generating libc++abi as a DSO which exposes only the public interfaces. llvm-svn: 254691
* c++abi: whitespace adjustmentSaleem Abdulrasool2015-12-0410-322/+243
| | | | | | | Cleanup some code with clang-format to make the following change easier to identify material difference. NFC. llvm-svn: 254690
* IR: Use format_hex instead of handrolling the conversion. NFCJustin Bogner2015-12-041-47/+17
| | | | | | Cleans up some very old code in AsmWriter's WriteConstantInternal. llvm-svn: 254688
* Revert "[llvm-profdata] Add support for weighted merge of profile data"Nathan Slingerland2015-12-0413-266/+47
| | | | | | | | This reverts commit b7250858d96b8ce567681214273ac0e62713c661. Reverting in order to investigate Windows test failure. llvm-svn: 254687
* (no commit message)Junmo Park2015-12-041-1/+1
| | | | llvm-svn: 254686
* Move llvm/test/CodeGen/Generic/function-alias.ll to X86. It is incompatible ↵NAKAMURA Takumi2015-12-041-0/+2
| | | | | | | to PECOFF. FIXME: It may be ELF-generic. llvm-svn: 254685
* [ARM] When a bitcast is about to be turned into a VMOVDRR, try to combine itQuentin Colombet2015-12-042-0/+127
| | | | | | | | | | | with its source instead of forcing the values on GPRs. This improves the lowering of vector code when such bitcasts happen in the middle of vector computations. rdar://problem/23691584 llvm-svn: 254684
* ScheduleDAGInstrs: Rework schedule graph builder.Matthias Braun2015-12-0416-156/+279
| | | | | | | | | | | | | | | | | | Re-comitting with a change that avoids undefined uses getting put into the VRegUses list. The new algorithm remembers the uses encountered while walking backwards until a matching def is found. Contrary to the previous version this: - Works without LiveIntervals being available - Allows to increase the precision to subregisters/lanemasks (not used for now) The changes in the AMDGPU tests are necessary because the R600 scheduler is not stable with respect to the order of nodes in the ready queues. Differential Revision: http://reviews.llvm.org/D9068 llvm-svn: 254683
* LLDB JIT needs android vector passing rules.Stephen Hines2015-12-042-9/+94
| | | | | | | | | | | | | | | | Summary: Looking into some recent issues with LLDBs expression parser highlighted that upstream clang passes vectors types differently to Android Open Source Project's clang for Arm Android targets. This patch reflects the changes present in the AOSP and allows LLDB's JIT expression evaluation to work correctly for Arm Android targets when passing vectors. This is submitted with consent of the original author Stephen Hines. Reviewers: asl, rsmith, ADodds, rnk Subscribers: rnk, aemerson, tberghammer, danalbert, srhines, cfe-commits, pirama Differential Revision: http://reviews.llvm.org/D14639 llvm-svn: 254682
* raw_ostream: << operator for callables with raw_ostream argumentMatthias Braun2015-12-045-140/+126
| | | | | | | | | This is a revised version of r254655 which uses a Printable wrapper class to avoid ambiguous overload problems. Differential Revision: http://reviews.llvm.org/D14348 llvm-svn: 254681
* X86InstrInfo::copyPhysReg: workaround reg livenessJF Bastien2015-12-043-10/+57
| | | | | | | | | | | | | | | | | | | | | | Summary: computeRegisterLiveness and analyzePhysReg are currently getting confused about liveness in some cases, breaking copyPhysReg's calculation of whether AX is dead in some cases. Work around this issue temporarily by assuming that AX is always live. See detail in: https://llvm.org/bugs/show_bug.cgi?id=25033#c7 And associated bugs PR24535 PR25033 PR24991 PR24992 PR25201. This workaround makes the code correct but slightly inefficient, but it seems to confuse the machine instr verifier which now things EAX was undefined in some cases where it's being conservatively saved / restored. Reviewers: majnemer, sanjoy Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D15198 llvm-svn: 254680
* IR: Update a comment and a bool that've been out of date since 2012Justin Bogner2015-12-041-3/+2
| | | | | | | It became impossible to get here with a half in r157393, over 3 years ago. llvm-svn: 254679
* [PGO] Unify VP data format between raw and indexed profile (runtime)Xinliang David Li2015-12-042-59/+299
| | | | | | | | | | With the latest refactoring and code sharing patches landed, it is possible to unify the value profile implementation between raw and indexed profile. This is part in prfofile runtime. Differential Revision: http://reviews.llvm.org/D15057 llvm-svn: 254678
* [PGO] Unify VP data format between raw and indexed profile (Reader)Xinliang David Li2015-12-042-40/+22
| | | | | | | | | | | With the latest refactoring and code sharing patches landed, it is possible to unify the value profile implementation between raw and indexed profile. This is the patch in raw profile reader that uses the common interface. Differential Revision: http://reviews.llvm.org/D15056 llvm-svn: 254677
* Fix function-alias.ll test on non-X86 targets.Evgeniy Stepanov2015-12-041-2/+0
| | | | llvm-svn: 254676
* Simplify the error handling in llvm-lto a bit.Rafael Espindola2015-12-041-36/+37
| | | | llvm-svn: 254675
* Emit function alias to data as a function symbol.Evgeniy Stepanov2015-12-042-0/+17
| | | | | | | | | | CFI emits jump slots for indirect functions as a byte array constant, and declares function-typed aliases to these constants. This change fixes AsmPrinter to emit these aliases as function symbols and not data symbols. llvm-svn: 254674
* Don't shadow a variable in the outer scope. Use canonical form of theJoerg Sonnenberger2015-12-041-3/+3
| | | | | | array size idiom. llvm-svn: 254673
* [Docs] Sanitizer docs migrated from code.google.com to github.com.Alexey Samsonov2015-12-044-9/+4
| | | | llvm-svn: 254672
* Don't punish vectorized arithmetic instruction whose type will be split to ↵Cong Hou2015-12-042-6/+2
| | | | | | | | | | | | | | | | | | | | | multiple registers Currently in LLVM's cost model, a vectorized arithmetic instruction will have high cost if its type is split into multiple registers. However, this punishment is too heavy and unnecessary. The overhead of the split should not be on arithmetic instructions but instructions that implement the split. Note that during vectorization we have calculated the register pressure, and we only choose proper interleaving factor (and also vectorization factor) so that we don't use more registers than the maximum number. Here is a very simple example: if a vadd has the cost 1, and if we double VF so that we need two registers to perform it, then its cost will become 4 with the current implementation, which will prevent us to use larger VF. Differential revision: http://reviews.llvm.org/D15159 llvm-svn: 254671
* [PowerPC] Fix calculating address of arguments on stack for variadic funcPetar Jovanovic2015-12-043-32/+43
| | | | | | | | | | | Fix calculating address of arguments larger than 32 bit on stack for variadic functions (rounding up address to alignment) on ppc32 architecture. Patch by Strahinja Petrovic. Differential Revision: http://reviews.llvm.org/D14871 llvm-svn: 254670
* [llvm-profdata] Add support for weighted merge of profile dataNathan Slingerland2015-12-0413-47/+266
| | | | | | | | | | | | | | | | | | This change adds support for an optional weight when merging profile data with the llvm-profdata tool. Weights are specified by adding an option ':<weight>' suffix to the input file names. Adding support for arbitrary weighting of input profile data allows for relative importance to be placed on the input data from multiple training runs. Both sampled and instrumented profiles are supported. Reviewers: dnovillo, bogner, davidxl Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D14547 llvm-svn: 254669
* [CodeGen] Minor correction to comment on PhysRegInfo.Kevin B. Smith2015-12-041-1/+1
| | | | | | Differential revision: http://reviews.llvm.org/D15216 llvm-svn: 254668
* Simplify since this function never fails.Rafael Espindola2015-12-032-11/+3
| | | | llvm-svn: 254667
* Add a newline at the end of this fileEnrico Granata2015-12-031-1/+1
| | | | llvm-svn: 254666
* CodeGen peephole: fold redundant phys reg copiesJF Bastien2015-12-032-12/+322
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Code generation often exposes redundant physical register copies through virtual registers such as: %vreg = COPY %PHYSREG ... %PHYSREG = COPY %vreg There are cases where no intervening clobber of %PHYSREG occurs, and the later copy could therefore be removed. In some cases this further allows us to remove the initial copy. This patch contains a motivating example which comes from the x86 build of Chrome, specifically cc::ResourceProvider::UnlockForRead uses libstdc++'s implementation of hash_map. That example has two tests live at the same time, and after machine sinking LLVM has confused itself enough and things spilling EFLAGS is a great idea even though it's never restored and the comparison results are both live. Before this patch we have: DEC32m %RIP, 1, %noreg, <ga:@L>, %noreg, %EFLAGS<imp-def> %vreg1<def> = COPY %EFLAGS; GR64:%vreg1 %EFLAGS<def> = COPY %vreg1; GR64:%vreg1 JNE_1 <BB#1>, %EFLAGS<imp-use> Both copies are useless. This patch tries to eliminate the later copy in a generic manner. dec is especially confusing to LLVM when compared with sub. I wrote this patch to treat all physical registers generically, but only remove redundant copies of non-allocatable physical registers because the allocatable ones caused issues (e.g. when calling conventions weren't properly modeled) and should be handled later by the register allocator anyways. The following tests used to failed when the patch also replaced allocatable registers: CodeGen/X86/StackColoring.ll CodeGen/X86/avx512-calling-conv.ll CodeGen/X86/copy-propagation.ll CodeGen/X86/inline-asm-fpstack.ll CodeGen/X86/musttail-varargs.ll CodeGen/X86/pop-stack-cleanup.ll CodeGen/X86/preserve_mostcc64.ll CodeGen/X86/tailcallstack64.ll CodeGen/X86/this-return-64.ll This happens because COPY has other special meaning for e.g. dependency breakage and x87 FP stack. Note that all other backends' tests pass. Reviewers: qcolombet Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D15157 llvm-svn: 254665
* AsmPrinter: Simplify emitting FP elements in sequential data. NFCJustin Bogner2015-12-031-26/+15
| | | | | | | Use APFloat APIs here Rather than manually type-punning through unions. llvm-svn: 254664
* PR25731: namespace alias declarations can appear at block scope; ensure that weRichard Smith2015-12-033-11/+34
| | | | | | | | | do scope-based lookup when looking for redeclarations of them. Add some related missing checks for the scope-based redeclaration lookup: properly filter the list of found declarations to match the scope, and diagnose shadowing of a template parameter name. llvm-svn: 254663
* [WebAssembly] Fix dominance check for PHIs in the StoreResult passDan Gohman2015-12-033-16/+69
| | | | | | | | | | | | | | When a block has no terminator instructions, getFirstTerminator() returns end(), which can't be used in dominance checks. Check dominance for phi operands separately. Also, remove some bits from WebAssemblyRegStackify.cpp that were causing trouble on the same testcase; they were left behind from an earlier experiment. Differential Revision: http://reviews.llvm.org/D15210 llvm-svn: 254662
* Revert "raw_ostream: << operator for callables with raw_stream argument"Matthias Braun2015-12-036-89/+140
| | | | | | | | This commit provoked "error C2593: 'operator <<' is ambiguous" on MSVC. This reverts commit r254655. llvm-svn: 254661
* [CMake] CMake calls to set_property with APPEND string need to have a ↵Chris Bieneman2015-12-031-1/+1
| | | | | | leading space. llvm-svn: 254660
* [CMake] Fixing botsChris Bieneman2015-12-031-1/+1
| | | | | | CMake calls to set_property with APPEND string need to have a leading space. llvm-svn: 254659
* [CMake] set_target_properties doesn't append link flagsChris Bieneman2015-12-031-1/+1
| | | | | | This fixes a bug I introduced in r254643. llvm-svn: 254658
* [CMake] set_target_properties doesn't append link flagsChris Bieneman2015-12-031-3/+3
| | | | | | This fixes a bug introduced in r254627, and another occurance of the same bug in this file. llvm-svn: 254657
* [Analysis] Become aware of MSVC's new/delete functionsDavid Majnemer2015-12-033-2/+114
| | | | | | | | The compiler can take advantage of the allocation/deallocation function's properties. We knew how to do this for Itanium but had no support for MSVC-style functions. llvm-svn: 254656
* raw_ostream: << operator for callables with raw_stream argumentMatthias Braun2015-12-036-140/+89
| | | | | | | | | | | | | | | | | This allows easier construction of print helpers. Example: Printable PrintLaneMask(unsigned LaneMask) { return Printable([LaneMask](raw_ostream &OS) { OS << format("%08X", LaneMask); }); } // Usage: OS << PrintLaneMask(Mask); Differential Revision: http://reviews.llvm.org/D14348 llvm-svn: 254655
* [llvm-objdump] Use report_fatal_error() if we can't find a target.Davide Italiano2015-12-031-8/+2
| | | | llvm-svn: 254654
* [X86] Part 1 to fix x86-64 fp128 calling convention.Chih-Hung Hsieh2015-12-0315-77/+298
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Almost all these changes are conditioned and only apply to the new x86-64 f128 type configuration, which will be enabled in a follow up patch. They are required together to make new f128 work. If there is any error, we should fix or revert them as a whole. These changes should have no impact to current configurations. * Relax type legalization checks to accept new f128 type configuration, whose TypeAction is TypeSoftenFloat, not TypeLegal, but also has TLI.isTypeLegal true. * Relax GetSoftenedFloat to return in some cases f128 type SDValue, which is TLI.isTypeLegal but not "softened" to i128 node. * Allow customized FABS, FNEG, FCOPYSIGN on new f128 type configuration, to generate optimized bitwise operators for libm functions. * Enhance related Lower* functions to handle f128 type. * Enhance DAGTypeLegalizer::run, SoftenFloatResult, and related functions to keep new f128 type in register, and convert f128 operators to library calls. * Fix Combiner, Emitter, Legalizer routines that did not handle f128 type. * Add ExpandConstant to handle i128 constants, ExpandNode to handle ISD::Constant node. * Add one more parameter to getCommonSubClass and firstCommonClass, to guarantee that returned common sub class will contain the specified simple value type. This extra parameter is used by EmitCopyFromReg in InstrEmitter.cpp. * Fix infinite loop in getTypeLegalizationCost when f128 is the value type. * Fix printOperand to handle null operand. * Enhance ISD::BITCAST node to handle f128 constant. * Expand new f128 type for BR_CC, SELECT_CC, SELECT, SETCC nodes. * Enhance X86AsmPrinter to emit f128 values in comments. Differential Revision: http://reviews.llvm.org/D15134 llvm-svn: 254653
* [Hexagon] Adding shuffling resources for HVX instructions and tests for ↵Colin LeMahieu2015-12-0311-7/+1320
| | | | | | instruction encodings. llvm-svn: 254652
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