| Commit message (Collapse) | Author | Age | Files | Lines |
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llvm-svn: 160317
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if no indexes are supplied. This can be handy to use as:
(lldb) script import lldb.macosx.crashlog
(lldb) crashlog -i /tmp/*.crash
% symbolicate --crashed-only
This will symbolicate all of the crash logs only for the crashed thread.
Also print out the crash log index number in the output of the interactive "image" command:
(lldb) script import lldb.macosx.crashlog
(lldb) crashlog -i /tmp/*.crash
% image LLDB.framework
...
This then allows you to symbolicate a crash log by index accurately when you looked for an image of a specific version
llvm-svn: 160316
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llvm-svn: 160315
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CmpRuns can be used for static analyzer bug report comparison. However,
we want to make sure external users do not rely on the way bugs are
represented (plist files). Make sure that we have a user
friendly/documented API for CmpRuns script.
llvm-svn: 160314
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llvm-svn: 160313
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uint32_t hi(uint64_t res)
{
uint_32t hi = res >> 32;
return !hi;
}
llvm IR looks like this:
define i32 @hi(i64 %res) nounwind uwtable ssp {
entry:
%lnot = icmp ult i64 %res, 4294967296
%lnot.ext = zext i1 %lnot to i32
ret i32 %lnot.ext
}
The optimizer has optimize away the right shift and truncate but the resulting
constant is too large to fit in the 32-bit immediate field. The resulting x86
code is worse as a result:
movabsq $4294967296, %rax ## imm = 0x100000000
cmpq %rax, %rdi
sbbl %eax, %eax
andl $1, %eax
This patch teaches the x86 lowering code to handle ult against a large immediate
with trailing zeros. It will issue a right shift and a truncate followed by
a comparison against a shifted immediate.
shrq $32, %rdi
testl %edi, %edi
sete %al
movzbl %al, %eax
It also handles a ugt comparison against a large immediate with trailing bits
set. i.e. X > 0x0ffffffff -> (X >> 32) >= 1
rdar://11866926
llvm-svn: 160312
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llvm-svn: 160311
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truncates the first chunk of the packet
between the two chars representing the checksum.
<rdar://problem/11882074>
llvm-svn: 160310
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unbreak the VS build.
llvm-svn: 160309
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This function has two versions. The first one is used for a register operand.
The second one is used for an immediate number.
llvm-svn: 160308
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The first variant accepts immediate number as the second argument.
The second variant accepts register operand as the second argument.
llvm-svn: 160307
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template.
Review by Richard Smith.
llvm-svn: 160306
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AssertZext value.
In the added testcase the constant 55 was behind an AssertZext of type i1, and ComputeDemandedBits
reported that some of the bits were both known to be one and known to be zero.
Together with Michael Kuperstein <michael.m.kuperstein@intel.com>
llvm-svn: 160305
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llvm-svn: 160304
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This reverts commit 4ea70107c5e51230e9e60f0bf58a0f74aa4885ea.
llvm-svn: 160303
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This reverts commit 600f7a90f3eef4c5108179b43e27cfd9e5de7cdc.
llvm-svn: 160302
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This reverts commit e3013202259ed1e006c21817c63cf25d75982721.
llvm-svn: 160301
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This reverts commit 11d3457afcda7848448dd7f11b2ede6552ffb9ea.
llvm-svn: 160300
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<llvm/IRBuilder.h> and <llvm/TypeBuilder.h>"
This reverts commit 0258a6bdd30802f5cc0e8e57c8e768fde2aef590.
llvm-svn: 160299
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AMDGPUCommonTableGen."
This reverts commit ebc934ba32ee71abbb8f0f2eb6a0fbaa613ba0d2.
llvm-svn: 160298
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conditional operator..."
This reverts commit 29f28bc14ad5a907f5dc849f004fafeec0aab33a.
llvm-svn: 160297
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nonreturn function, instead of assert(0)."
This reverts commit 4ba4acc1bc2561b944a571edbb6a2dc78e357dfe.
llvm-svn: 160296
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This reverts commit fef4aa1b16fcf7a472559abbbcf4c1adc9eb5ca6.
llvm-svn: 160295
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full sets.
Make it always return APInts with the same bitwidth for the same ConstantRange bitwidth to simply clients
llvm-svn: 160294
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llvm-svn: 160293
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chandlerc, partially implemented crash callback merging (under flag)
llvm-svn: 160290
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llvm-svn: 160289
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llvm-svn: 160288
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<string.h>. // rdar://11847319
llvm-svn: 160287
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to use an unsigned char to ensure the integer promotion happens properly. This fixes an assert in debug builds with CodeGen\X86\utf8.ll
llvm-svn: 160286
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Args...> to only check Fp, and not Args... . This should be sufficient to give the desired high quality diagnostics under both bind and function. And this allows a test reported by Rich E on cfe-dev to pass. Tracked by <rdar://problem/11880602>.
llvm-svn: 160285
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fully implemented yet, no functionality change except the BB order)
llvm-svn: 160284
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llvm-svn: 160283
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llvm-svn: 160282
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around a g++ bug (it would claim to possibly emit incorrect code).
llvm-svn: 160281
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llvm-svn: 160280
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function, instead of assert(0).
llvm-svn: 160279
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operator...
llvm-svn: 160278
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Mips shift instructions DSLL, DSRL and DSRA are transformed into
DSLL32, DSRL32 and DSRA32 respectively if the shift amount is between
32 and 63
Here is a description of DSLL:
Purpose: Doubleword Shift Left Logical Plus 32
To execute a left-shift of a doubleword by a fixed amount--32 to 63 bits
Description: GPR[rd] <- GPR[rt] << (sa+32)
The 64-bit doubleword contents of GPR rt are shifted left, inserting
zeros into the emptied bits; the result is placed in
GPR rd. The bit-shift amount in the range 0 to 31 is specified by sa.
This patch implements the direct object output of these instructions.
llvm-svn: 160277
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AMDGPUCommonTableGen.
llvm-svn: 160276
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and <llvm/TypeBuilder.h>
llvm-svn: 160275
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1. FileCheck-ize epilogue.ll and allow another asm instruction to restore %rsp.
2. Remove check in widen_arith-3.ll that was hitting instruction in epilogue instead of
vector add.
llvm-svn: 160274
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llvm-svn: 160273
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llvm-svn: 160272
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llvm-svn: 160271
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llvm-svn: 160270
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on-demand
llvm-svn: 160269
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llvm-svn: 160268
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llvm-svn: 160267
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llvm-svn: 160266
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