summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* [OpenCL] Allow addr space spelling without __ prefix in C++.Anastasia Stulova2019-03-255-21/+33
| | | | | | | | | | | | | | For backwards compatibility we allow alternative spelling of address spaces - 'private', 'local', 'global', 'constant', 'generic'. In order to accept 'private' correctly, parsing has been changed to understand different use cases - access specifier vs address space. Fixes PR40707 and PR41011! Differential Revision: https://reviews.llvm.org/D59603 llvm-svn: 356888
* [pp-trace] Try fixing MSVC C2248 after rCTE356849Fangrui Song2019-03-251-2/+2
| | | | llvm-svn: 356887
* [MIPS GlobalISel] Select copy for arguments from FPRBRegBankPetar Avramovic2019-03-253-5/+465
| | | | | | | | | Move selectCopy into MipsInstructionSelector class. Select copy for arguments from FPRBRegBank for MIPS32. Differential Revision: https://reviews.llvm.org/D59644 llvm-svn: 356886
* gn build: Clean up README.rst a bitNico Weber2019-03-251-37/+34
| | | | | | | | | | | - Make introduction a bit shorter - Add a `git clone` step to Quick start - Put command to run first in each of the Quick start steps - Use ``code`` instead of `label` throughout; this is .rst not .md Differential Revision: https://reviews.llvm.org/D59600 llvm-svn: 356885
* gn build: Let get.py keep zip file in memory instead of using a temp fileNico Weber2019-03-251-12/+5
| | | | | | | | | The zip is small, and it's a bit less code this way. No intended behavior change. Differential Revision: https://reviews.llvm.org/D59677 llvm-svn: 356884
* [MIPS GlobalISel] Add floating point register bankPetar Avramovic2019-03-253-0/+303
| | | | | | | | | Add floating point register bank for MIPS32. Implement getRegBankFromRegClass for float register classes. Differential Revision: https://reviews.llvm.org/D59643 llvm-svn: 356883
* [MIPS GlobalISel] Lower float and double arguments in registersPetar Avramovic2019-03-253-36/+309
| | | | | | | | | | Lower float and double arguments in registers for MIPS32. When float/double argument is passed through gpr registers select appropriate move instruction. Differential Revision: https://reviews.llvm.org/D59642 llvm-svn: 356882
* [llvm-readobj] Separate `Symbol Version` dumpers into `LLVM style` and `GNU ↵Xing GUO2019-03-255-239/+298
| | | | | | | | | | | | | | | | | | | | style` Summary: Currently, llvm-readobj can dump symbol version sections only in LLVM style. In this patch, I would like to separate these dumpers into GNU style and LLVM style for future implementation. Reviewers: grimar, jhenderson, mattd, rupprecht Reviewed By: jhenderson, rupprecht Subscribers: ormris, dyung, RKSimon, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D59186 llvm-svn: 356881
* [clangd] Send empty diagnostics when a file is closedIlya Biryukov2019-03-253-7/+36
| | | | | | | | | | | | | | | | | | | | | | Summary: The LSP clients cannot know clangd will not send diagnostic updates for closed files, so we send them an empty list of diagnostics to avoid showing stale diagnostics for closed files in the UI, e.g. in the "Problems" pane of VSCode. Fixes PR41217. Reviewers: hokein Reviewed By: hokein Subscribers: ioeric, MaskRay, jkorous, arphaman, kadircet, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D59757 llvm-svn: 356880
* Add llvm:: qualifer to make_unique, NFCHaojian Wu2019-03-251-3/+3
| | | | | | To avoid potential "make_unique is ambiguous" compiler errors. llvm-svn: 356878
* Fix a broken comment line. NFC.Hafiz Abid Qadeer2019-03-251-2/+1
| | | | | | Just checking that commit access is working after licensing changes. llvm-svn: 356876
* Fix the build with GCC 4.8 after r356783Hans Wennborg2019-03-251-1/+1
| | | | llvm-svn: 356875
* [ASTImporter] Changed use of Import to Import_New in ASTNodeImporter.Balazs Keri2019-03-251-50/+22
| | | | | | | | | | | | | | Reviewers: a.sidorin, shafik, martong, a_sidorin Reviewed By: a_sidorin Subscribers: a_sidorin, rnkovacs, gamesh411, dkrupp, martong, Szelethus, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D53757 llvm-svn: 356874
* [TTI] Move getIntrinsicCost to allow functions to be overridden. NFCSjoerd Meijer2019-03-251-45/+43
| | | | | | | | | | Moving this to base class TargetTransformInfoImplCRTPBase allows static_cast to a subtarget so that calls to e.g. getMemcpyCost actually go the overridden functions. Differential revision: https://reviews.llvm.org/D59706 llvm-svn: 356873
* [ARM GlobalISel] 64-bit memops should be alignedDiana Picus2019-03-253-40/+99
| | | | | | | | | | We currently use only VLDR/VSTR for all 64-bit loads/stores, so the memory operands must be word-aligned. Mark aligned operations as legal and narrow non-aligned ones to 32 bits. While we're here, also mark non-power-of-2 loads/stores as unsupported. llvm-svn: 356872
* [clang-tidy] Fix more false positives for bugprone-string-integer-assignmentClement Courbet2019-03-252-24/+125
| | | | | | | | | | | | | | | | | Summary: And add various tests gleaned for our codebase. See PR27723. Reviewers: JonasToth, alexfh, xazax.hun Subscribers: rnkovacs, jdoerfert, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D59360 llvm-svn: 356871
* [X86] Update some of the getMachineNode calls from X86ISelDAGToDAG to also ↵Craig Topper2019-03-251-8/+9
| | | | | | | | | include a VT for a EFLAGS result. This makes the nodes consistent with how they would be emitted from the isel table. llvm-svn: 356870
* [X86] When selecting (x << C1) op C2 as (x op (C2>>C1)) << C1, use the ↵Craig Topper2019-03-251-1/+2
| | | | | | | | | | | | | operation VT for the target constant. Normally when the nodes we use here(AND32ri8 for example) are selected their immediates are just converted from ConstantSDNode to TargetConstantSDNode without changing VT from the original operation VT. So we should still be emitting them with the operation VT. Theoretically this could expose more accurate opportunities for CSE. llvm-svn: 356869
* [X86] Remove GetLo8XForm and use GetLo32XForm instead. NFCICraig Topper2019-03-251-6/+1
| | | | | | | | We were using this to create an AND32ri8 node from a 64-bit and, but that node normally still uses a 32-bit immediate. So we should just truncate the existing immediate to i32. We already verified it has the same value in bits 31:7. llvm-svn: 356868
* [X86] Remove a couple unused SDNodeXForms. NFCCraig Topper2019-03-251-11/+0
| | | | llvm-svn: 356867
* Revert r356688 "[X86] Don't avoid folding multiple use sign extended 8-bit ↵Craig Topper2019-03-255-10/+25
| | | | | | | | immediate into instructions under optsize." Looking back over how the one use optimization works, I don't think this is the right way to fix this. llvm-svn: 356866
* Un-revert "[coroutines][PR40978] Emit error for co_yield within catch block"Brian Gesiak2019-03-257-23/+121
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: https://reviews.llvm.org/D59076 added a new coroutine error that prevented users from using 'co_await' or 'co_yield' within a exception handler. However, it was reverted in https://reviews.llvm.org/rC356774 because it caused a regression in nested scopes in C++ catch statements, as documented by https://bugs.llvm.org/show_bug.cgi?id=41171. The issue was due to an incorrect use of a `clang::ParseScope`. To fix: 1. Add a regression test for catch statement parsing that mimics the bug report from https://bugs.llvm.org/show_bug.cgi?id=41171. 2. Re-apply the coroutines error patch from https://reviews.llvm.org/D59076, but this time with the correct ParseScope behavior. Reviewers: GorNishanov, tks2103, rsmith, riccibruno, jbulow Reviewed By: riccibruno Subscribers: EricWF, jdoerfert, lewissbaker, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D59752 llvm-svn: 356865
* [X86][SSE41] Start shuffle combining from ZERO_EXTEND_VECTOR_INREG (PR40685)Simon Pilgrim2019-03-2414-522/+491
| | | | | | | | Enable SSE41 ZERO_EXTEND_VECTOR_INREG shuffle combines - for the PMOVZX(PSHUFD(V)) -> UNPCKH(V,0) pattern we reduce the shuffles (port5-bottleneck on Intel) at the expense of creating a zero (pxor v,v) and an extra register move - which is a good trade off as these are pretty cheap and in most cases it doesn't increase register pressure. This also exposed a missed opportunity to use combine to ZERO_EXTEND_VECTOR_INREG with folded loads - even if we're in the float domain. llvm-svn: 356864
* [X86] Make _bswap intrinsic a function instead of a macro to hopefully fix ↵Craig Topper2019-03-241-1/+5
| | | | | | | | the chromium build. This intrinsic was added in r356848 but was implemented as a macro to match gcc. llvm-svn: 356862
* [WebAssembly] Rename a variable in CFGSort (NFC)Heejin Ahn2019-03-241-4/+4
| | | | | | | | Class `RegionInfo` was `SortUnitInfo` before, so the variables were named `SUI`. Now the class name is `RegionInfo`, so this renames `SUI` to `RI`, matching the class name. llvm-svn: 356861
* [LegalizeDAG] Expand i16 bswap directly to a rotate by 8 instead of relying ↵Craig Topper2019-03-241-3/+2
| | | | | | | | | | | | | | | | on DAG combine. An i16 bswap can be implemented with an i16 rotate by 8. We previously emitted a shift and OR sequence that DAG combine should be able to turn back into rotate. But we might as well go there directly. If rotate isn't legal, LegalizeDAG should further legalize it to either the opposite rotate, or the shift and OR pattern. I don't know of any way to get the existing DAG combine reliance to fail. So I don't know any way to add new tests for this that wouldn't have worked previously. llvm-svn: 356860
* [X86] Remove icmp undef from reduced testsSimon Pilgrim2019-03-243-27/+27
| | | | | | | | Pre-commit for D59363 (Add icmp UNDEF handling to SelectionDAG::FoldSetCC) Approved by @spatel (Sanjay Patel) llvm-svn: 356859
* [X86][AVX] Start shuffle combining from ZERO_EXTEND_VECTOR_INREG (PR40685)Simon Pilgrim2019-03-2411-223/+248
| | | | | | | | Just enable this for AVX for now as SSE41 introduces extra register moves for the PMOVZX(PSHUFD(V)) -> UNPCKH(V,0) pattern (but otherwise helps reduce port5 usage on Intel targets). Only AVX support is required for PR40685 as the issue is due to 8i8->8i32 zext shuffle leftovers. llvm-svn: 356858
* [CGP] Make several static functions member functions (NFC)Teresa Johnson2019-03-241-19/+25
| | | | | | | This is extracted from D59696 as suggested in the review. It is preparation for making the DominatorTree a member variable. llvm-svn: 356857
* Recommit r356738 "[llvm-objcopy] - Implement replaceSectionReferences for ↵George Rimar2019-03-244-0/+82
| | | | | | | | | | | | | | | | | | | GroupSection class." Fix: r356853 + set AddressAlign to 4 in Inputs/compress-debug-sections.yaml for the new group section introduced. Original commit message: Currently, llvm-objcopy incorrectly handles compression and decompression of the sections from COMDAT groups, because we do not implement the replaceSectionReferences for this type of the sections. The patch does that. Differential revision: https://reviews.llvm.org/D59638 llvm-svn: 356856
* [x86] improve the default expansion of uaddsat/usubsatSanjay Patel2019-03-245-909/+653
| | | | | | | | | | | | | | | This is yet another step towards solving PR14613: https://bugs.llvm.org/show_bug.cgi?id=14613 uaddsat X, Y --> (X >u (X + Y)) ? -1 : X + Y usubsat X, Y --> (X >u Y) ? X - Y : 0 We can't count on a sane vector ISA, so override the default (umin/umax) expansion of unsigned add/sub saturate in cases where we do not have umin/umax. Differential Revision: https://reviews.llvm.org/D59006 llvm-svn: 356855
* [SLPVectorizer] shouldReorderOperands - just check for reordering. NFCI.Simon Pilgrim2019-03-241-28/+24
| | | | | | Remove the I.getOperand() calls from inside shouldReorderOperands - reorderInputsAccordingToOpcode should handle the creation of the operand lists and shouldReorderOperands should just check to see whether the i'th element should be commuted. llvm-svn: 356854
* [llvm-objcopy] - Report SHT_GROUP sections with invalid alignment.George Rimar2019-03-242-0/+41
| | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes the reason of ubsan failure (UB detected) happened after landing the D59638 (I had to revert it). http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-bootstrap-ubsan/builds/11760/steps/check-llvm%20ubsan/logs/stdio) Problem is the following. Our implementation of GroupSection assumes that its address is 4 bytes aligned when writes it: template <class ELFT> void ELFSectionWriter<ELFT>::visit(const GroupSection &Sec) { ELF::Elf32_Word *Buf = reinterpret_cast<ELF::Elf32_Word *>(Out.getBufferStart() + Sec.Offset); ... But the test case for D59638 did not set AddressAlign in YAML. So address was not 4 bytes aligned since Sec.Offset was odd. That triggered the issue. This patch teaches llvm-objcopy to report an error for such sections (which should not met in reality), what is better than having UB. Differential revision: https://reviews.llvm.org/D59695 llvm-svn: 356853
* [ConstantRange] Add getFull() + getEmpty() named constructors; NFCNikita Popov2019-03-248-85/+105
| | | | | | | | | | | | | | | | This adds ConstantRange::getFull(BitWidth) and ConstantRange::getEmpty(BitWidth) named constructors as more readable alternatives to the current ConstantRange(BitWidth, /* full */ false) and similar. Additionally private getFull() and getEmpty() member functions are added which return a full/empty range with the same bit width -- these are commonly needed inside ConstantRange.cpp. The IsFullSet argument in the ConstantRange(BitWidth, IsFullSet) constructor is now mandatory for the few usages that still make use of it. Differential Revision: https://reviews.llvm.org/D59716 llvm-svn: 356852
* [pp-trace] Delete redundant clang::Fangrui Song2019-03-243-104/+87
| | | | | | And clarify command line options llvm-svn: 356851
* [pp-trace] Wrap code in clang::pp_traceFangrui Song2019-03-243-103/+89
| | | | llvm-svn: 356850
* [pp-trace] Modernize the codeFangrui Song2019-03-2410-124/+64
| | | | | | | | | Use InitLLVM and WithColor Delete PPTraceConsumer, add the callback in PPTraceAction Migrae to tooling::createExecutorFromCommandLineArgs Don't specialize empty OutputFileName llvm-svn: 356849
* [X86] Add BSR/BSF/BSWAP intrinsics to ia32intrin.h to match gcc.Craig Topper2019-03-244-15/+167
| | | | | | | | | | | | | | | | | | | | Summary: These are all implemented by icc as well. I made bit_scan_forward/reverse forward to the __bsfd/__bsrq since we also have __bsfq/__bsrq. Note, when lzcnt is enabled the bsr intrinsics generates lzcnt+xor instead of bsr. Reviewers: RKSimon, spatel Subscribers: cfe-commits, llvm-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D59682 llvm-svn: 356848
* [WebAssembly] Fix test/Driver/wasm-toolchain.c in the presence of ↵Sam Clegg2019-03-241-1/+1
| | | | | | | | CLANG_DEFAULT_LINKER This was broken in rL356817 (See https://reviews.llvm.org/D59721) llvm-svn: 356847
* gn build: Merge r356820Nico Weber2019-03-232-0/+9
| | | | llvm-svn: 356846
* gn build: Add build files for modularize and pp-traceNico Weber2019-03-233-0/+39
| | | | | | Differential Revision: https://reviews.llvm.org/D59701 llvm-svn: 356845
* Fix typos in compiler-rt/lib/builtins/atomic.cHubert Tong2019-03-231-1/+10
| | | | | | | | | | | | | | | | | | | Summary: This patch fixes typos in file compiler-rt/lib/builtins/atomic.c. Reviewers: jasonliu, hubert.reinterpretcast, jfb Reviewed By: jfb Subscribers: t.p.northover, theraven, dberris, jfb, jdoerfert, #sanitizers, llvm-commits Tags: #llvm, #sanitizers Differential Revision: https://reviews.llvm.org/D59228 Patch by Xing Xue. llvm-svn: 356844
* libclang/CIndexer.cpp: Use loadquery() on AIX for path to libraryHubert Tong2019-03-231-0/+59
| | | | | | | | | | | | | | | | | | | Summary: `dladdr` is not available on AIX. Similar functionality is presented through `loadquery`. This patch replaces a use of `dladdr` with a version based on `loadquery`. Reviewers: sfertile, xingxue, jasonliu Reviewed By: xingxue Subscribers: jsji, lhames, majnemer, asb, arphaman, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D59233 llvm-svn: 356843
* Sync some doc changes ClangFormatStyleOptions.rst with doc comments in ↵Sylvestre Ledru2019-03-232-3/+3
| | | | | | | | | | | | | | | | | | | | | `Format.h` Summary: These changes were corrected directly in ClangFormatStyleOptions.rst (llvm-svn: 350192 and llvm-svn: 351976) but these sections can be produced automatically using `dump_format_style.py` so sync the corresponding doc comments in `Format.h` as well. Patch by Ronald Wampler Reviewers: eugene, sylvestre.ledru, djasper Reviewed By: sylvestre.ledru Subscribers: jdoerfert, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D58186 llvm-svn: 356842
* Fix unused variable warning on non-asserts builds. NFCI.Simon Pilgrim2019-03-231-4/+3
| | | | llvm-svn: 356841
* Remove unused function argument. NFCI.Simon Pilgrim2019-03-231-5/+7
| | | | llvm-svn: 356840
* Fix unused variable warning. NFCI.Simon Pilgrim2019-03-231-1/+1
| | | | llvm-svn: 356839
* [DWARF] Delete a stray break and a stray comment. NFCFangrui Song2019-03-231-2/+1
| | | | llvm-svn: 356838
* [X86][SLP] Show example of failure to uniformly commute splats for 'alt' ↵Simon Pilgrim2019-03-231-0/+38
| | | | | | | | shuffles. If either the main/alt opcodes isn't commutable we may end up with the splats not correctly commuted to the same side. llvm-svn: 356837
* [x86] reduce code duplication; NFCSanjay Patel2019-03-231-3/+5
| | | | llvm-svn: 356836
OpenPOWER on IntegriCloud