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* Add completely untested support for mtcrf/mfcrf encodingChris Lattner2005-04-191-0/+7
| | | | llvm-svn: 21353
* switch over the rest of the formats that use RC to use isDOTChris Lattner2005-04-192-71/+73
| | | | llvm-svn: 21352
* Convert the XForm instrs and XSForm instruction over to use isDOTChris Lattner2005-04-192-52/+60
| | | | llvm-svn: 21351
* Now that the ppc64 and vmx operands of I are always 0, forward substituteChris Lattner2005-04-191-36/+30
| | | | | | them away. llvm-svn: 21350
* convert over bform and iform instructionsChris Lattner2005-04-192-17/+17
| | | | llvm-svn: 21349
* Convert over DForm and DSForm instructionsChris Lattner2005-04-192-90/+80
| | | | llvm-svn: 21348
* Convert XLForm and XForm instructions over to use PPC64 when appropriate.Chris Lattner2005-04-192-129/+112
| | | | llvm-svn: 21347
* Convert XO XS and XFX forms to use isPPC64Chris Lattner2005-04-192-53/+52
| | | | llvm-svn: 21346
* Turn PPC64 and VMX into classes that can be added to instructions instead ofChris Lattner2005-04-192-39/+40
| | | | | | | bits that must be passed up the inheritance hierarchy. Convert MForm and AForm instructions over llvm-svn: 21345
* Major change to tblgen: instead of resolving values every time a class isChris Lattner2005-04-193-73/+119
| | | | | | | | | | | finished up, only resolve fully when the def is defined. This allows things to be changed and all uses to be propagated through. This implements TableGen/LazyChange.td and fixes TemplateArgRename.td in the process. None of the .td files used in LLVM backends are changed at all by this patch. llvm-svn: 21344
* New testcase for a changing values late and allowing them to propagateChris Lattner2005-04-191-0/+11
| | | | llvm-svn: 21343
* Make this significantly harderChris Lattner2005-04-191-0/+7
| | | | llvm-svn: 21342
* Add a real run lineChris Lattner2005-04-191-1/+1
| | | | llvm-svn: 21341
* fix this testcaseChris Lattner2005-04-191-0/+1
| | | | llvm-svn: 21340
* new testcaseChris Lattner2005-04-191-0/+9
| | | | llvm-svn: 21339
* add a run lineChris Lattner2005-04-191-1/+1
| | | | llvm-svn: 21338
* Tell dj to run the tests in this directoryChris Lattner2005-04-191-1/+1
| | | | llvm-svn: 21337
* implementing shifting of literal integersChris Lattner2005-04-192-0/+16
| | | | llvm-svn: 21336
* Add initial lexer and parser support for shifting values. Every use of thisChris Lattner2005-04-193-0/+29
| | | | | | will lead to it being rejected though. llvm-svn: 21335
* Next round of PPC CR optimizations. For the following code:Nate Begeman2005-04-181-62/+95
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | int %bar(float %a, float %b, float %c, float %d) { entry: %tmp.1 = setlt float %a, %d %tmp.2 = setlt float %b, %d %or = or bool %tmp.1, %tmp.2 %tmp.3 = setgt float %c, %d %tmp.4 = or bool %or, %tmp.3 %tmp.5 = and bool %tmp.4, true %retval = cast bool %tmp.5 to int ret int %retval } We now emit: _bar: .LBB_bar_0: ; entry fcmpu cr0, f1, f4 fcmpu cr1, f2, f4 cror 0, 0, 4 fcmpu cr1, f3, f4 cror 28, 0, 5 mfcr r2 rlwinm r3, r2, 29, 31, 31 blr Instead of: _bar: .LBB_bar_0: ; entry fcmpu cr7, f1, f4 mfcr r2 rlwinm r2, r2, 29, 31, 31 fcmpu cr7, f2, f4 mfcr r3 rlwinm r3, r3, 29, 31, 31 or r2, r2, r3 fcmpu cr7, f3, f4 mfcr r3 rlwinm r3, r3, 30, 31, 31 or r3, r2, r3 blr llvm-svn: 21321
* silence a bogus warningChris Lattner2005-04-181-1/+1
| | | | llvm-svn: 21320
* Fold setcc of MVT::i1 operands into logical operationsChris Lattner2005-04-181-0/+39
| | | | llvm-svn: 21319
* Another minor simplification: handle setcc (zero_extend x), c -> setcc(x, c')Chris Lattner2005-04-181-0/+45
| | | | llvm-svn: 21318
* Another simple xformChris Lattner2005-04-181-0/+8
| | | | llvm-svn: 21317
* Fold:Chris Lattner2005-04-181-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | // (X != 0) | (Y != 0) -> (X|Y != 0) // (X == 0) & (Y == 0) -> (X|Y == 0) Compiling this: int %bar(int %a, int %b) { entry: %tmp.1 = setne int %a, 0 %tmp.2 = setne int %b, 0 %tmp.3 = or bool %tmp.1, %tmp.2 %retval = cast bool %tmp.3 to int ret int %retval } to this: _bar: or r2, r3, r4 addic r3, r2, -1 subfe r3, r3, r2 blr instead of: _bar: addic r2, r3, -1 subfe r2, r2, r3 addic r3, r4, -1 subfe r3, r3, r4 or r3, r2, r3 blr llvm-svn: 21316
* Make the AND elimination operation recursive and significantly more powerful,Chris Lattner2005-04-181-26/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | eliminating an and for Nate's testcase: int %bar(int %a, int %b) { entry: %tmp.1 = setne int %a, 0 %tmp.2 = setne int %b, 0 %tmp.3 = or bool %tmp.1, %tmp.2 %retval = cast bool %tmp.3 to int ret int %retval } generating: _bar: addic r2, r3, -1 subfe r2, r2, r3 addic r3, r4, -1 subfe r3, r3, r4 or r3, r2, r3 blr instead of: _bar: addic r2, r3, -1 subfe r2, r2, r3 addic r3, r4, -1 subfe r3, r3, r4 or r2, r2, r3 rlwinm r3, r2, 0, 31, 31 blr llvm-svn: 21315
* Change codegen for setcc to read the bit directly out of the conditionNate Begeman2005-04-183-45/+36
| | | | | | | | register. Added support in the .td file for the g5-specific variant of cr -> gpr moves that executes faster, but we currently don't generate it. llvm-svn: 21314
* Add support for targets that require stubs for external functions.Chris Lattner2005-04-181-2/+27
| | | | llvm-svn: 21313
* Handle ExternalSymbol operands in the PPC JITChris Lattner2005-04-181-9/+13
| | | | llvm-svn: 21312
* Update dejagnu tests to use the new pattern isel flagNate Begeman2005-04-165-5/+5
| | | | llvm-svn: 21311
* Add CondPropagate.cpp to VC++ Transforms projectJeff Cohen2005-04-161-0/+3
| | | | llvm-svn: 21310
* Make pattern isel default for ppcNate Begeman2005-04-156-19/+43
| | | | | | | | | | Add new ppc beta option related to using condition registers Make pattern isel control flag (-enable-pattern-isel) global and tristate 0 == off 1 == on 2 == target default llvm-svn: 21309
* new passChris Lattner2005-04-151-0/+1
| | | | llvm-svn: 21307
* a new simple pass, which will be extended to be more useful in the future.Chris Lattner2005-04-151-0/+213
| | | | | | | | | This pass forward branches through conditions when it can show that the conditions is either always true or false for a predecessor. This currently only handles the most simple cases of this, but is successful at threading across 2489 branches and 65 switch instructions in 176.gcc, which isn't bad. llvm-svn: 21306
* add a new prototypeChris Lattner2005-04-151-0/+7
| | | | llvm-svn: 21305
* new testcaseChris Lattner2005-04-152-0/+21
| | | | llvm-svn: 21304
* fix callsAndrew Lenharth2005-04-142-1/+2
| | | | llvm-svn: 21303
* a 21264 fix, and fix the operator precidence on an and -> zap check (should ↵Andrew Lenharth2005-04-142-3/+11
| | | | | | fix hundreds of test cases llvm-svn: 21302
* added a random and mask testAndrew Lenharth2005-04-141-0/+10
| | | | llvm-svn: 21301
* print negative 64 bit immediates as negative numbers, makes things a littleDuraid Madina2005-04-142-2/+9
| | | | | | | easier on the eyes, not that numbers like 18446744073709541376 are bad or anything llvm-svn: 21300
* oops, this stopped us turning movl r4=0xFFFFFFFF;; and rX, r4 into zxt4Duraid Madina2005-04-141-1/+1
| | | | llvm-svn: 21299
* Implement multi-way branches through logical ops on condition registers.Nate Begeman2005-04-142-3/+69
| | | | | | | | This can generate considerably shorter code, reducing the size of crafty by almost 1%. Also fix the printing of mcrf. The code is currently disabled until it gets a bit more testing, but should work as-is. llvm-svn: 21298
* Add a couple missing transforms in getSetCC that were triggering assertionsNate Begeman2005-04-141-1/+8
| | | | | | in the PPC Pattern ISel llvm-svn: 21297
* we have zextloads, not sextloads!Duraid Madina2005-04-141-1/+1
| | | | llvm-svn: 21296
* Add the necessary support to codegen condition register logical ops withNate Begeman2005-04-144-17/+72
| | | | | | | register allocated condition registers. Make sure that the printed output is gas compatible. llvm-svn: 21295
* Start allocating condition registers. Almost all explicit uses of CR0 areNate Begeman2005-04-131-23/+26
| | | | | | | now gone. Next step is to get rid of the remaining ones and then start allocating bools to CRs where appropriate. llvm-svn: 21294
* Implement the fold shift X, zext(Y) -> shift X, Y at the target level,Nate Begeman2005-04-131-6/+22
| | | | | | where it is safe to do so. llvm-svn: 21293
* Add CodeGen tests for the recent SelectionDAG transformsNate Begeman2005-04-132-0/+53
| | | | llvm-svn: 21292
* Disbale the broken fold of shift + sz[ext] for nowNate Begeman2005-04-132-26/+30
| | | | | | | | Move the transform for select (a < 0) ? b : 0 into the dag from ppc isel Enable the dag to fold and (setcc, 1) -> setcc for targets where setcc always produces zero or one. llvm-svn: 21291
* fix an infinite loopChris Lattner2005-04-131-1/+1
| | | | llvm-svn: 21289
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