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* [ModuleUtils] Clean up header file. [NFC]Francesco Petrogalli2019-11-141-10/+0
| | | | | | | | | | | | Summary: 1. Remove unused forward declaration. 2. Remove unnecessary `\defgroup` in docygen documentation. Subscribers: llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D70218
* Warn on /align if used without /driverRui Ueyama2019-11-142-0/+15
| | | | | | | /align is not supposed to be used without /driver, so it makes sense to warn if only /align is passed. MSVC link.exe warns on this too. Differential Revision: https://reviews.llvm.org/D70163
* Implement /driver, /driver:wdm and /driver:uponlyRui Ueyama2019-11-145-3/+134
| | | | | | | | This patch implements /driver, /driver:wdm and /driver:uponly as described in https://docs.microsoft.com/en-us/cpp/build/reference/driver-windows-nt-kernel-mode-driver?view=vs-2019. Differential Revision: https://reviews.llvm.org/D70162
* [WebAssembly] -fwasm-exceptions enables reference-typesHeejin Ahn2019-11-133-3/+19
| | | | | | | | | | | | | | | Summary: This adds `-mreference-types` and `-mno-reference-types` flags to clang and make `-fwasm-exceptions` enables reference types feature in clang and the backend. Reviewers: tlively Subscribers: dschuff, sbc100, jgravelle-google, sunfish, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D69832
* [unittests] Add InitializePasses.h includesHeejin Ahn2019-11-137-2/+7
| | | | | | | | | | | | | | Summary: After D70211, Pass.h does not include InitializePasses.h anymore, so these files need to include InitializePasses.h directly. Reviewers: rnk Subscribers: MatzeB, mehdi_amini, zzheng, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D70217
* [LLDB] Don't install the pretty stack trace handler twice.Jonas Devlieghere2019-11-131-7/+3
| | | | | | | | | I noticed that currently we are printing LLVM's pretty stack trace twice. The reason is that we're calling PrintStackTraceOnErrorSignal in addition to InitLLVM, which besides some other useful things, also register LLVM's pretty stack trace handler. Differential revision: https://reviews.llvm.org/D70216
* Move CodeGenFileType enum to Support/CodeGen.hReid Kleckner2019-11-1318-47/+46
| | | | | | | Avoids the need to include TargetMachine.h from various places just for an enum. Various other enums live here, such as the optimization level, TLS model, etc. Data suggests that this change probably doesn't matter, but it seems nice to have anyway.
* [AMDGPU] Fixed dpp test. NFC.Stanislav Mekhanoshin2019-11-131-1/+1
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* [cmake] Remove confusing condition argument from else() NFCTom Stellard2019-11-131-1/+1
| | | | | | | | | | | | | | | | Summary: This makes it look like an elseif and also the variable referenced in the condition was removed from this function in r366622. Reviewers: dsanders, beanz, smeenai, compnerd, phosek Reviewed By: beanz Subscribers: mgorny, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D70159
* Revert "Forward declare Optional<T> in STLExtras.h"Reid Kleckner2019-11-1311-14/+4
| | | | | | This reverts commit a36f316390d4bc1bcb0e9de0f55831385ab24099. I did not intend to push this with the InitializePasses.h change.
* Sink all InitializePasses.h includesReid Kleckner2019-11-13393-198/+596
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This file lists every pass in LLVM, and is included by Pass.h, which is very popular. Every time we add, remove, or rename a pass in LLVM, it caused lots of recompilation. I found this fact by looking at this table, which is sorted by the number of times a file was changed over the last 100,000 git commits multiplied by the number of object files that depend on it in the current checkout: recompiles touches affected_files header 342380 95 3604 llvm/include/llvm/ADT/STLExtras.h 314730 234 1345 llvm/include/llvm/InitializePasses.h 307036 118 2602 llvm/include/llvm/ADT/APInt.h 213049 59 3611 llvm/include/llvm/Support/MathExtras.h 170422 47 3626 llvm/include/llvm/Support/Compiler.h 162225 45 3605 llvm/include/llvm/ADT/Optional.h 158319 63 2513 llvm/include/llvm/ADT/Triple.h 140322 39 3598 llvm/include/llvm/ADT/StringRef.h 137647 59 2333 llvm/include/llvm/Support/Error.h 131619 73 1803 llvm/include/llvm/Support/FileSystem.h Before this change, touching InitializePasses.h would cause 1345 files to recompile. After this change, touching it only causes 550 compiles in an incremental rebuild. Reviewers: bkramer, asbirlea, bollu, jdoerfert Differential Revision: https://reviews.llvm.org/D70211
* Forward declare Optional<T> in STLExtras.hReid Kleckner2019-11-1311-4/+14
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* [AMDGPU] Fixed mfma-loop test. NFC.Stanislav Mekhanoshin2019-11-131-26/+111
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* [LLDB] Cleanup the DataEncoder utility. (NFC)Jonas Devlieghere2019-11-134-180/+47
| | | | | This commit removes unused methods from the DataEncoder class and cleans up the API by making all the internal methods private.
* Revert a hunk from 9634064cfa1b9bf7b7Reid Kleckner2019-11-131-1/+1
| | | | | | | | | | | | This causes errors when building LLDB because the Windows implementation doesn't implement this method: C:\src\llvm-project\lldb\source\Plugins\ScriptInterpreter\Python\ScriptInterpreterPython.cpp(915,19): error: allocating an object of abstract class type 'lldb_private::ConnectionGenericFile' new ConnectionGenericFile(read_file, true)); ^ C:\src\llvm-project\lldb\include\lldb/Utility/Connection.h(174,28): note: unimplemented pure virtual method 'GetReadObject' in 'ConnectionGenericFile' virtual lldb::IOObjectSP GetReadObject() = 0; ^
* [LLDB] Implement pure virtual method in MockConnectionJonas Devlieghere2019-11-131-0/+2
| | | | | I made GetReadObject pure virtual in the base class and forgot to add the method to the mock class.
* Sink MachineFunction private method out of lineReid Kleckner2019-11-132-9/+10
| | | | | | | This method is private and only called from this file and doesn't need to be inline. Saves a TargetMachine.h include in MachineFunction.h, a popular header. The include was introduced in 98603a8153086 despite the forward decl of LLVMTargetMachine.
* [X86] Don't treat mxcsr as a register name when parsing MS inline assembly.Craig Topper2019-11-132-3/+12
| | | | | No instruction takes mxcsr as a an operand so we should always treat it as an identifier name.
* [LLDB] Fix another set of -Wdocumentation warningsJonas Devlieghere2019-11-133-6/+3
| | | | | At this point I'm just fixing issues as I see them pop up locally in incremental builds.
* [LLDB] Remove dead code from StreamFileJonas Devlieghere2019-11-132-23/+0
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* [RegisterContext] Remove now unneded vestiges.Davide Italiano2019-11-134-24/+0
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* [LLDB] Fix a bunch of -Wdocumentation warnings in ExpressionParserJonas Devlieghere2019-11-136-111/+35
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* Remove redundant check. (NFC)Adrian Prantl2019-11-131-3/+0
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* Use cheaper, equivalent predicate. (NFC)Adrian Prantl2019-11-131-1/+1
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* [X86] Don't set the operation action for i16 SINT_TO_FP to Promote just ↵Craig Topper2019-11-133-45/+44
| | | | | | | because SSE1 is enabled. Instead do custom promotion in the handler so that we can still allow i16 to be used with fp80. And f64 without sse2.
* [X86] Fix typo in comment. NFCCraig Topper2019-11-131-1/+1
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* [X86] Move all the FP_TO_XINT/XINT_TO_FP setOperationActions into the same ↵Craig Topper2019-11-131-41/+28
| | | | | | | | | !useSoftFloat block. Qualify all of the Promote actions for these with !useSoftFloat too. NFCI The Promote action doesn't apply until LegalizeDAG. By the time we get there, we would have already softened all the FP operations if useSoftFloat was true. So there wouldn't be any operation left to Promote.
* Rename clang-module-related *DWO* functions to *ClangModule* (NFC)Adrian Prantl2019-11-135-46/+41
| | | | | | | This avoids confusing them with fission-related functionality. I also moved two accessor functions from DWARFDIE into static functions in DWARFASTParserClang were their only use is located.
* [PGO][PGSO] Temporarily disable the large working set size behavior.Hiroshi Yamauchi2019-11-132-2/+10
| | | | | | | | | | | | | | Summary: This temporarily disables the large working set size behavior in profile guided size optimization due to internal benchmark regressions. Reviewers: davidxl Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D70207
* libc++ status page: Fix HTML.Marek Kurdej2019-11-131-1/+1
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* [SimplifyCFG] add test for select with FMF; NFCSanjay Patel2019-11-131-6/+33
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* Rename ParseTypeFromDWO to ParseTypeFromClangModule (NFC)Adrian Prantl2019-11-132-26/+27
| | | | | Because that is what this function really does. The old name is misleading.
* Revert "[RISCV] Use compiler-rt if no GCC installation detected"Richard Smith2019-11-138-45/+19
| | | | | | | This change causes test failures for builds configured with -DCLANG_DEFAULT_RTLIB=compiler-rt. This reverts commit 3289352e6bb9d2949c678c625478024bf2a5fbfb.
* [SLP] fix miscompile on min/max reductions with extra uses (PR43948)Sanjay Patel2019-11-133-3/+16
| | | | | | | | | | | | | | | | | The bug manifests as replacing a reduction operand with an undef value. The problem appears to be limited to cases where a min/max reduction has extra uses of the compare operand to the select. In the general case, we are tracking "ExternallyUsedValues" and an "IgnoreList" of the reduction operations, but those may not apply to the final compare+select in a min/max reduction. For that, we use replaceAllUsesWith (RAUW) to ensure that the new vectorized reduction values are transferred to all subsequent users. Differential Revision: https://reviews.llvm.org/D70148
* [clang-format] refactor the use of the SMDiagnostics in replacement warningsmydeveloperday2019-11-131-40/+9
| | | | | | | | | | | | | | | | | Summary: Review comments in {D69854} recommended a simpler approach of creating the SMDiagnostics to remove much of the complexity. (thanks @thakis) @vlad.tsyrklevich I've rebuilt on both Windows and Linux (running Linux with Address and Undefined sanitizers) over the clang code base Reviewers: thakis, klimek, mitchell-stellar, vlad.tsyrklevich Reviewed By: thakis Subscribers: cfe-commits, thakis, vlad.tsyrklevich Tags: #clang-format, #clang Differential Revision: https://reviews.llvm.org/D69921
* [LLD] [COFF] Fix automatically importing data symbols from DLLs with LTOMartin Storsjö2019-11-132-2/+28
| | | | | | | | | | | | | | | | This broke in 51dcb292cc002, "[lld-link] diagnose undefined symbols before LTO when possible" (very soon after the 9.0 branch, so luckily the 9.0 release is unaffected). The code for loading objects we believe might be needed for autoimport (loadMinGWAutomaticImports()) does run before the new reportUnresolvable() function, but it had a condition to only operate on symbols from regular object files. This condition came from resolveRemainingUndefines(), but as loadMinGWAutomaticImports() now has to operate before the LTO, it has to operate on undefineds from LTO objects as well. Differential Revision: https://reviews.llvm.org/D70166
* Add -disable-builtin option to optDimitry Andric2019-11-132-0/+40
| | | | | | | | | | | | | | | | | | Summary: The option allows to disable specific target library builtin functions, instead of -disable-simplify-libcalls, which disables all of them. This is a prerequisite for D70143, which fixes PR43081. Reviewers: xbolva00, spatel, jdoerfert, efriedma Reviewed By: efriedma Subscribers: llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D70193
* [LLDB] Fix a bunch of -Wdocumentation warningsJonas Devlieghere2019-11-1353-404/+212
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* [dsymutil] Add -dump to llvm-bcanalyzer invocationsFrancis Visoiu Mistrih2019-11-132-4/+4
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* [TargetLowering] Increase the storage size of NumRegistersForVT to allow the ↵Craig Topper2019-11-132-2/+5
| | | | | | | | | | type break down for v256i1 and other types to be stored correctly v256i1 on X86 without avx512 breaks down to 256 i8 values when passed between basic blocks. But the NumRegistersForVT was sized at a byte for each VT. This results in 256 being stored as 0. This patch enlarges the type to 16 bits and adds an assert to ensure that no information is lost when the entry is stored. Differential Revision: https://reviews.llvm.org/D70138
* [mips] Reduce number of nested `if` statements. NFCSimon Atanasyan2019-11-131-8/+5
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* [mips] Add test to check ELF output for JAL XGOT expansion. NFCSimon Atanasyan2019-11-131-0/+216
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* [mips] Add tests to check `jal sym+offset`. NFCSimon Atanasyan2019-11-132-61/+401
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* [LiveInterval] Allow updating subranges with slightly out-dated IRQuentin Colombet2019-11-136-11/+136
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During register coalescing, we update the live-intervals on-the-fly. To do that we are in this strange mode where the live-intervals can be slightly out-of-sync (more precisely they are forward looking) compared to what the IR actually represents. This happens because the register coalescer only updates the IR when it is done with updating the live-intervals and it has to do it this way because updating the IR on-the-fly would actually clobber some information on how the live-ranges that are being updated look like. This is problematic for updates that rely on the IR to accurately represents the state of the live-ranges. Right now, we have only one of those: stripValuesNotDefiningMask. To reconcile this need of out-of-sync IR, this patch introduces a new argument to LiveInterval::refineSubRanges that allows the code doing the live range updates to reason about how the code should look like after the coalescer will have rewritten the registers. Essentially this captures how a subregister index with be offseted to match its position in a new register class. E.g., let say we want to merge: V1.sub1:<2 x s32> = COPY V2.sub3:<4 x s32> We do that by choosing a class where sub1:<2 x s32> and sub3:<4 x s32> overlap, i.e., by choosing a class where we can find "offset + 1 == 3". Put differently we align V2's sub3 with V1's sub1: V2: sub0 sub1 sub2 sub3 V1: <offset> sub0 sub1 This offset will look like a composed subregidx in the the class: V1.(composed sub2 with sub1):<4 x s32> = COPY V2.sub3:<4 x s32> => V1.(composed sub2 with sub1):<4 x s32> = COPY V2.sub3:<4 x s32> Now if we didn't rewrite the uses and def of V1, all the checks for V1 need to account for this offset to match what the live intervals intend to capture. Prior to this patch, we would fail to recognize the uses and def of V1 and would end up with machine verifier errors: No live segment at def. This could lead to miscompile as we would drop some live-ranges and thus, miss some interferences. For this problem to trigger, we need to reach stripValuesNotDefiningMask while having a mismatch between the IR and the live-ranges (i.e., we have to apply a subreg offset to the IR.) This requires the following three conditions: 1. An update of overlapping subreg lanes: e.g., dsub0 == <ssub0, ssub1> 2. An update with Tuple registers with a possibility to coalesce the subreg index: e.g., v1.dsub_1 == v2.dsub_3 3. Subreg liveness enabled. looking at the IR to decide what is alive and what is not, i.e., calling stripValuesNotDefiningMask. coalescer maintains for the live-ranges information. None of the targets that currently use subreg liveness (i.e., the targets that fulfill #3, Hexagon, AMDGPU, PowerPC, and SystemZ IIRC) expose #1 and and #2, so this patch also artificial enables subreg liveness for ARM, so that a nice test case can be attached.
* [TTI] Fix cast cost on vector types.Michael Liao2019-11-133-3/+27
| | | | - Only split vector types when both src and dst types are splittable.
* [llvm-bcanalyzer] Don't dump the contents if -dump is not passedFrancis Visoiu Mistrih2019-11-132-2/+14
| | | | | | With all the previous refactorings this slipped through and now we always dump the contents of the bitcode files, even if -dump is not passed.
* [AArch64][v8.3a] Add missing imp-defs on RETA*.Ahmed Bougacha2019-11-132-2/+3
| | | | | | | | | | | | | RETA always implicitly uses LR, unlike RET which merely has an alias that defaults it to LR. Additionally, RETA implicitly uses SP as well, which it uses as a discriminator to authenticate LR. This isn't usually noticeable, because RET_ReallyLR is used in most of the backend. However, the post-RA scheduler, if enabled, will cause miscompiles if the imp-uses are missing. While there, fix a typo in the lone affected testcase.
* [AArch64][v8.3a] Add LDRA '[xN]!' alias.Ahmed Bougacha2019-11-133-8/+25
| | | | | | The instruction definition has been retroactively expanded to allow for an alias for '[xN, 0]!' as '[xN]!'. That wouldn't make sense on LDR, but does for LDRA.
* [SLP] improve test readability; NFCSanjay Patel2019-11-131-6/+6
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* [BPF] fix clang test failure for bpf-attr-preserve-access-index-4.cYonghong Song2019-11-131-3/+3
| | | | | | | Depending on different cmake configures, clang may generate different IR name for slot variables. Let us use the regex instead of hard coding the name. I did the same for other bpf-attr-preserve-access-index tests with such an approach, but somehow did not do for this one.
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