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* [RISCV] Add tests missed in r329871Alex Bradbury2018-04-126-0/+464
| | | | llvm-svn: 329872
* [RISCV] Codegen support for RV32D floating point load/store, fadd.d, calling ↵Alex Bradbury2018-04-126-22/+327
| | | | | | | | | | | | | | | | conv fadd.d is required in order to force floating point registers to be used in test code, as parameters are passed in integer registers in the soft float ABI. Much of this patch is concerned with support for passing f64 on RV32D with a soft-float ABI. Similar to Mips, introduce pseudoinstructions to build an f64 out of a pair of i32 and to split an f64 to a pair of i32. BUILD_PAIR and EXTRACT_ELEMENT can't be used, as a BITCAST to i64 would be necessary, but i64 is not a legal type. llvm-svn: 329871
* Test commit accessYan Luo2018-04-121-1/+1
| | | | llvm-svn: 329870
* [ODRHash] Skip more types hashing TypedefTypeRichard Trieu2018-04-122-3/+45
| | | | | | To get the underlying type for TypedefType's, also skip ElaboratedType's. llvm-svn: 329869
* [DeadArgElim] Remove allocsize attributes on callsitesGeorge Burgess IV2018-04-122-1/+12
| | | | | | | | | | | | | | | We're already removing allocsize attributes from Functions that we remove args from, since removing arguments from a function may make the allocsize attribute incorrect. It appears we forgot to also remove them from callsites. Without this, I get verifier errors on `@Test2`. It probably wouldn't be too hard to make DAE properly update allocsize attributes instead of dropping them, but I can't think of a scenario where that'd be useful in practice. llvm-svn: 329868
* Revert "[llvm-objcopy] Switch over to using TableGen for parsing arguments"Jake Ehrlich2018-04-1212-249/+117
| | | | | | | | TableGen seems to work differently on windows. I'll need to revert this This reverts commit 7a153ddea067b24da59f6a66c733d79205969501. llvm-svn: 329867
* Lex: make `clang::Preprocessor::macros` work on MSVCSaleem Abdulrasool2018-04-111-3/+5
| | | | | | | | | | | | | | The order of argument construction is reversed on MS ABI on Windows. When `macros` was invoked, the `end` call is made prior to `begin`. In such a case, the DenseMap (`ModuleMap`) is populated after the `end` iterator is constructed. This reversal results in the invalidation of the end iterator, resulting in a failure at runtime (assertion failure in `DenseMap<T>::operator!=` that "handles are not in sync!"). Ensure that the end iterator is constructed after the begin iterator. This fixes the use of `macros(bool)`, which symptomized as an assertion failure in the swift compiler in the clang importer. llvm-svn: 329866
* Reapply "[PR16756] Use SSAUpdaterBulk in JumpThreading." one more time.Michael Zolotukhin2018-04-111-13/+18
| | | | | | This reapplies commit r329644. llvm-svn: 329865
* [SSAUpdaterBulk] Fix linux bootstrap/sanitizer failures: explicitly specify ↵Michael Zolotukhin2018-04-111-1/+2
| | | | | | | | | | | | | | order of evaluation. The standard says that the order of evaluation of an expression s[x] = foo() is unspecified. In our case, we first create an empty entry in the map, then call foo(), then store its return value to the created entry. The problem is that foo uses the map as a cache, so if it finds that there is an entry in the map, it stops computation. This change explicitly sets the order, thus fixing this heisenbug. llvm-svn: 329864
* [llvm-objcopy] Switch over to using TableGen for parsing argumentsJake Ehrlich2018-04-1112-117/+249
| | | | | | | | | Swithces from using the command line library to using TableGen. This will allow llvm-strip to exist and allow refinements of the command line syntax. Differential Revision: https://reviews.llvm.org/D44236 llvm-svn: 329863
* [X86] Remove unused itinerary argument from FMA3/FMA4/XOP instructions. NFCI.Simon Pilgrim2018-04-111-20/+20
| | | | llvm-svn: 329862
* Add missing vtable anchorsWeiming Zhao2018-04-1112-0/+35
| | | | | | | | | | | | | | Summary: This patch adds anchor() for MemoryBuffer, raw_fd_ostream, RTDyldMemoryManager, SectionMemoryManager, etc. Reviewers: jlebar, eli.friedman, dblaikie Reviewed By: dblaikie Subscribers: mehdi_amini, mgorny, dblaikie, weimingz, llvm-commits Differential Revision: https://reviews.llvm.org/D45244 llvm-svn: 329861
* X86FoldTableEntry - avoid unnecessary std::string creation. NFCI.Simon Pilgrim2018-04-111-3/+3
| | | | llvm-svn: 329860
* [LLVM-C] Add LLVMGetHostCPU{Name,Features}.whitequark2018-04-112-0/+24
| | | | | | | | | | | | | | Without these functions it's hard to create a TargetMachine for Orc JIT that creates efficient native code. It's not sufficient to just expose LLVMGetHostCPUName(), because for some CPUs there's fewer features actually available than the CPU name indicates (e.g. AVX might be missing on some CPUs identified as Skylake). Differential Revision: https://reviews.llvm.org/D44861 llvm-svn: 329856
* Driver: Add gcc search path for RHEL devtoolset-7Tom Stellard2018-04-111-0/+1
| | | | | | | | | | | | Reviewers: bruno Reviewed By: bruno Subscribers: bruno, cfe-commits Differential Revision: https://reviews.llvm.org/D44130 llvm-svn: 329854
* Don't repeatedly evaluate size() in the for loop. NFCI.Simon Pilgrim2018-04-111-1/+1
| | | | llvm-svn: 329853
* [PowerPC] Fix condition for 64-bit rotate when replacing r+r instr with r+iNemanja Ivanovic2018-04-112-1/+66
| | | | | | | | | | This patch fixes https://bugs.llvm.org/show_bug.cgi?id=37039 The condition only covers one of the two 64-bit rotate instructions. This just adds the second (RLDICLo). Patch by Josh Stone. llvm-svn: 329852
* [Serialization] Fix some Clang-tidy modernize and Include What You Use ↵Eugene Zelenko2018-04-114-251/+388
| | | | | | warnings; other minor fixes (NFC). llvm-svn: 329851
* Attempting to work around a non-determinism issue.Puyan Lotfi2018-04-111-2/+0
| | | | | | | The main thing that matters with this test is that the COPYs are moved together not where the REG_SEQUENCES are. llvm-svn: 329850
* bpf: signal error instead of silent drop for certain invalid asm insnYonghong Song2018-04-111-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, an invalid asm insn, either in an asm file or in an inline asm format, might be silently dropped. This patch fixed two places where this may happen by signaling the error so user knows what goes wrong. The following is an example to demonstrate error messages: -bash-4.2$ cat t.c int test(void *ctx) { #if defined(NO_ERROR) asm volatile("r0 = *(u16 *)skb[%0]" : : "i"(2)); #elif defined(ERROR_1) asm volatile("r20 = *(u16 *)skb[%0]" : : "i"(2)); #elif defined(ERROR_2) asm volatile("r0 = *(u16 *)(r1 + ?)" : :); #endif return 0; } -bash-4.2$ cat run.sh for macro in NO_ERROR ERROR_1 ERROR_2; do echo "===== compile for macro" $macro clang -D${macro} -O2 -target bpf -emit-llvm -S t.c echo "==llc==" llc -march=bpf -filetype=obj t.ll done -bash-4.2$ ./run.sh ===== compile for macro NO_ERROR ==llc== ===== compile for macro ERROR_1 ==llc== <inline asm>:1:2: error: invalid register/token name r20 = *(u16 *)skb[2] ^ note: !srcloc = 135 ===== compile for macro ERROR_2 ==llc== <inline asm>:1:21: error: unexpected token r0 = *(u16 *)(r1 + ?) ^ note: !srcloc = 210 -bash-4.2$ Acked-by: Alexei Starovoitov <ast@kernel.org> Signed-off-by: Yonghong Song <yhs@fb.com> llvm-svn: 329849
* [x86] wbnoinvd intrinsicGabor Buella2018-04-1113-3/+82
| | | | | | | | | | | | | | The WBNOINVD instruction writes back all modified cache lines in the processor’s internal cache to main memory but does not invalidate (flush) the internal caches. Reviewers: craig.topper, zvi, ashlykov Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D43817 llvm-svn: 329848
* [X86] Describe wbnoinvd instructionGabor Buella2018-04-1114-1/+67
| | | | | | | | | | | | | | | Similar to the wbinvd instruction, except this one does not invalidate caches. Ring 0 only. The encoding matches a wbinvd instruction with an F3 prefix. Reviewers: craig.topper, zvi, ashlykov Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D43816 llvm-svn: 329847
* Remove references to old SymbolBody classSam Clegg2018-04-113-5/+4
| | | | | | Differential Revision: https://reviews.llvm.org/D45400 llvm-svn: 329846
* [DSE] Add tests for atomic memory intrinsics (NFC)Daniel Neilson2018-04-114-0/+705
| | | | | | | | Summary: These tests show that DSE currently does nothing with the atomic memory intrinsics. Future work will teach DSE how to simplify these. llvm-svn: 329845
* Fix a thinko in CommandObjectMemoryRegion.Jim Ingham2018-04-111-1/+1
| | | | | | | Don't try to read the first argument till you've checked that there is one. llvm-svn: 329844
* [OPENMP] Code cleanup, NFC.Alexey Bataev2018-04-111-29/+31
| | | | llvm-svn: 329843
* [sanitizer] Correct name length computation for some Fuchsia vmosKostya Kortchinsky2018-04-111-1/+1
| | | | | | | | | | | | | | | | | Summary: This was missed during the review of D38595, but the vmo name size computation should use internal_strlen, not sizeof, otherwise we end up with 7 character names. Reviewers: mcgrathr, flowerhack Reviewed By: mcgrathr Subscribers: kubamracek, delcypher, #sanitizers, llvm-commits Differential Revision: https://reviews.llvm.org/D45525 llvm-svn: 329842
* Rename to match an LLVM changeDavid Blaikie2018-04-111-1/+1
| | | | llvm-svn: 329841
* Rename *CommandFlags.def to *CommandFlags.incDavid Blaikie2018-04-1117-18/+17
| | | | | | | | These aren't the .def style files used in LLVM that require a macro defined before their inclusion - they're just basic non-modular includes to stamp out command line flag variables. llvm-svn: 329840
* [DSE] Regenerate tests with update_test_checks.py (NFC)Daniel Neilson2018-04-112-24/+135
| | | | | | | | | Summary: In preparation for a future commit, this regenerates the test checks for test/Transforms/DeadStoreElimination/OverwriteStoreBegin.ll test/Transforms/DeadStoreElimination/OverwriteStoreEnd.ll llvm-svn: 329839
* CodeGen: Don't try to canonicalize Unix-style paths in CodeView debug info.Peter Collingbourne2018-04-114-8/+18
| | | | | | | | | Most importantly, we should not replace slashes with backslashes because that would invalidate the path. Differential Revision: https://reviews.llvm.org/D45473 llvm-svn: 329838
* [X86][Atom] Convert Atom scheduler model to SchedRW (PR32431)Simon Pilgrim2018-04-1112-692/+957
| | | | | | | | | | | | | | | | Atom is the only x86 target that still uses schedule itineraries, if we can remove this then we can begin the work on removing x86 itineraries. I've also found that it will help with PR36550. I've focussed on matching the existing model as closely as possible (relying on the schedule tests), PR36895 indicated a lot of these were incorrect but we can just as easily fix these after this patch as before. Hopefully we can get llvm-exegesis to help here, There are a few instructions that rely on itinerary scheduling (mainly push/pop/return) of multiple resource stages, but I don't think any of these are show stoppers. There are also a few codegen changes that seem related to the post-ra scheduler acting a little differently, I haven't tracked these down but they don't seem critical. NOTE: I don't have access to any Atom hardware, so this hasn't been tested in the wild. Differential Revision: https://reviews.llvm.org/D45486 llvm-svn: 329837
* [CodeGen] Handle __func__ inside __finallyShoaib Meenai2018-04-112-1/+13
| | | | | | | | | | | When we enter a __finally block, the CGF's CurCodeDecl will be null (because CodeGenFunction::StartFunction is given an empty GlobalDecl for a __finally block), and so the dyn_cast here will result in an assertion failure. Change it to dyn_cast_or_null to handle this case. Differential Revision: https://reviews.llvm.org/D45523 llvm-svn: 329836
* [llvm-mca] Let the Scheduler notify dispatch stall events caused by the lack ↵Andrea Di Biagio2018-04-114-70/+25
| | | | | | | | | | | | | | | | | | | of scheduling resources. This patch moves part of the logic that notifies dispatch stall events from the DispatchUnit to the Scheduler. The main goal of this patch is to remove (yet another) dependency between the DispatchUnit and the Scheduler. Before this patch, the DispatchUnit had to know about `Scheduler::Event` and how to classify stalls due to the lack of scheduling resources. This patch removes that knowledge and simplifies the logic in DispatchUnit::checkScheduler. This is another change done in preparation for the work to fix PR36663. No functional change intended. llvm-svn: 329835
* [X86] Generalize X86PadShortFunction to work with TargetSchedModelSimon Pilgrim2018-04-111-14/+10
| | | | | | | | | | Pre-commit for D45486, don't rely on itinerary scheduler model to determine latencies for padding, use the generic TargetSchedModel::computeInstrLatency call. Also, replace hard coded (atom specific) 2*uop creation per padding cycle with a version based on the scheduler model's issue width. Differential Revision: https://reviews.llvm.org/D45486 llvm-svn: 329834
* [Documentation] Fix formatting and order in Release Notes for recent changes ↵Eugene Zelenko2018-04-112-8/+10
| | | | | | in modernize-use-auto. llvm-svn: 329833
* [xray] Fix OS X bots.George Karpenkov2018-04-111-15/+15
| | | | | | OS X has "fat" executables which contain the code for all architectures. llvm-svn: 329832
* [Target] Remove dead/commented out code. NFC.Davide Italiano2018-04-111-16/+0
| | | | | | Some spring cleaning before I touch this file more extensively. llvm-svn: 329831
* [NVPTX] Removed 'satom' feature which is no longer used.Artem Belevich2018-04-115-14/+5
| | | | | | Differential Revision: https://reviews.llvm.org/D45061 llvm-svn: 329830
* [NVPTX, CUDA] Improved feature constraints on NVPTX target builtins.Artem Belevich2018-04-116-170/+200
| | | | | | | | | | When NVPTX TARGET_BUILTIN specifies sm_XX or ptxYY as required feature, consider those features available if we're compiling for GPU >= sm_XX or have enabled PTX version >= ptxYY. Differential Revision: https://reviews.llvm.org/D45061 llvm-svn: 329829
* Revert "[cmake] Remove duplicate command line options from build"Aaron Smith2018-04-111-2/+2
| | | | | | | | The Android sanitizer buildbot is failing with this change and it looks like an additional change to cmake is necessary to fix the build. Reverting this change for now. llvm-svn: 329828
* Document -std= values for different languagesDimitry Andric2018-04-111-1/+120
| | | | | | | | | | | | | | | | | | | | Summary: After a remark on a FreeBSD mailing list that the clang man page did not have any list of possible values for the `-std=` flag, I have now attempted to exhaustively list those, for each available language. I also documented the default standard for each language, if there was more than one choice. Reviewers: rsmith, dexonsmith, sylvestre.ledru, mgorny Reviewed By: rsmith Subscribers: fhahn, emaste, cfe-commits, krytarowski Differential Revision: https://reviews.llvm.org/D45406 llvm-svn: 329827
* [AMDGPU] Ensure there are enough registers for wave dispatchTim Renouf2018-04-112-0/+31
| | | | | | | | | | | | | | | | | Summary: This fixes the number of SGPRs and VGPRs in the *_RSRC1 register to allow for registers set up in wave dispatch, even if those registers are not used in the shader. Re-landed after noticing that the buildbot failure from 329808 seemed to be unrelated. Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, t-tye, llvm-commits Differential Revision: https://reviews.llvm.org/D45503 Change-Id: I6575f0e0d2a528d1319d0b289f0ebe4510fa5771 llvm-svn: 329826
* Revert r327216 'Add isl operator overloads for isl::pw_aff'Tobias Grosser2018-04-113-187/+0
| | | | | | This commit requires further discussions. llvm-svn: 329825
* [DSE] Regenerate tests with update_test_checks.py (NFC)Daniel Neilson2018-04-112-175/+308
| | | | | | | | | Summary: In preparation for a future commit, this regenerates the test checks for test/Transforms/DeadStoreElimination/simple.ll test/Transforms/DeadStoreElimination/memintrinsics.ll llvm-svn: 329824
* bpf: accept all asm register namesYonghong Song2018-04-112-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Sometimes when people compile bpf programs with "clang ... -target bpf ...", the kernel header files may contain host arch inline assembly codes as in the patch https://patchwork.kernel.org/patch/10119683/ by Arnaldo Carvaldo de Melo. The current workaround in the above patch is to guard the inline assembly with "#ifndef __BPF__" marco. So when __BPF__ is defined, these macros will have no use. Such a method is not extensible. As a matter of fact, most of these inline assembly codes will be thrown away at the end of clang compilation. So for bpf target, this patch accepts all asm register names in clang AST stage. The name will be checked again during llc code generation if the inline assembly code is indeed for bpf programs. With this patch, the above "#ifndef __BPF__" is not needed any more in https://patchwork.kernel.org/patch/10119683/. Signed-off-by: Yonghong Song <yhs@fb.com> llvm-svn: 329823
* [FastISel] Disable local value sinking by defaultReid Kleckner2018-04-1130-69/+76
| | | | | | | | | | | | | | | | | | This is causing compilation timeouts on code with long sequences of local values and calls (i.e. foo(1); foo(2); foo(3); ...). It turns out that code coverage instrumentation is a great way to create sequences like this, which how our users ran into the issue in practice. Intel has a tool that detects these kinds of non-linear compile time issues, and Andy Kaylor reported it as PR37010. The current sinking code scans the whole basic block once per local value sink, which happens before emitting each call. In theory, local values should only be introduced to be used by instructions between the current flush point and the last flush point, so we should only need to scan those instructions. llvm-svn: 329822
* [InstCombine] limit X - (cast(-Y) --> X + cast(Y) with hasOneUse()Sanjay Patel2018-04-112-18/+15
| | | | llvm-svn: 329821
* [DWARFv5] Fuss with asm syntax for conveying MD5 checksum.Paul Robinson2018-04-116-42/+46
| | | | | | | | | | Previously the MD5 option of the .file directive provided the checksum as a quoted hex string; now it's a normal hex number with 0x prefix, same as the .octa directive accepts. Differential Revision: https://reviews.llvm.org/D45459 llvm-svn: 329820
* [MIPS GlobalISel] Select add i32, i32Petar Jovanovic2018-04-1116-13/+537
| | | | | | | | | | | | | Add the minimal support necessary to lower a function that returns the sum of two i32 values. Support argument/return lowering of i32 values through registers only. Add tablegen for regbankselect and instructionselect. Patch by Petar Avramovic. Differential Revision: https://reviews.llvm.org/D44304 llvm-svn: 329819
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