| Commit message (Collapse) | Author | Age | Files | Lines |
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llvm-svn: 124488
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benchmarks, and that it can be simplified to X/Y. (In general you can only
simplify (Z*Y)/Y to Z if the multiplication did not overflow; if Z has the
form "X/Y" then this is the case). This patch implements that transform and
moves some Div logic out of instcombine and into InstructionSimplify.
Unfortunately instcombine gets in the way somewhat, since it likes to change
(X/Y)*Y into X-(X rem Y), so I had to teach instcombine about this too.
Finally, thanks to the NSW/NUW flags, sometimes we know directly that "Z*Y"
does not overflow, because the flag says so, so I added that logic too. This
eliminates a bunch of divisions and subtractions in 447.dealII, and has good
effects on some other benchmarks too. It seems to have quite an effect on
tramp3d-v4 but it's hard to say if it's good or bad because inlining decisions
changed, resulting in massive changes all over.
llvm-svn: 124487
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llvm-svn: 124486
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llvm-svn: 124485
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Pure motion.
llvm-svn: 124484
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for CodeGen's RValue type.
llvm-svn: 124483
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functionality change.
llvm-svn: 124482
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fixing a crash which probably nobody was ever going to see. In doing so,
fix a horrendous number of problems with the conditional-cleanups code.
Also, make conditional cleanups re-use the cleanup's activation variable,
which avoids some unfortunate repetitiveness.
llvm-svn: 124481
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llvm-svn: 124480
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llvm-svn: 124479
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llvm-svn: 124478
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llvm-svn: 124477
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ret duplication.
llvm-svn: 124476
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the function equality set.
llvm-svn: 124475
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llvm-svn: 124474
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test.
llvm-svn: 124473
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llvm-svn: 124472
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llvm-svn: 124471
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llvm-svn: 124470
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llvm-svn: 124469
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llvm-svn: 124468
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llvm-svn: 124467
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emulate_sub_ip_sp_imm() (
set ip to some stack offset) entries to the g_arm_opcodes table.
llvm-svn: 124466
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might be queried in places where we absolutely require a valid
location (e.g., for template instantiation). Fixes some major
brokenness in the use of __is_convertible_to.
llvm-svn: 124465
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llvm-svn: 124464
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once and cache it, you have to fetch it every time you want to use it.
llvm-svn: 124463
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branches. PR8575, rdar://5134905, rdar://8911460.
- Allow codegen tail duplication to dup small return blocks after register
allocation is done.
llvm-svn: 124462
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The context being that it's a PC relative load.
llvm-svn: 124460
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automatically set the non-specified ones to /dev/null.
llvm-svn: 124459
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llvm-svn: 124458
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llvm-svn: 124456
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llvm-svn: 124455
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only .syntax unified is supported.
llvm-svn: 124454
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non-class prvalues actually require the realization of a
temporary. For everything else, we already have an lvalue (or class
prvalue) in the subexpression.
Note: we're missing some move elision in this case. I'll tackle that next.
llvm-svn: 124453
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llvm-svn: 124452
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variable declaration of a struct declared type.
// rdar://8918702
llvm-svn: 124451
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llvm-svn: 124450
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location was stated with FFI_INCLUDE_DIR/FFI_LIBRARY_DIR.
llvm-svn: 124449
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PC relative immediate load into register, possibly followed by an add operation
to adjust the SP.
llvm-svn: 124448
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how to lower more/new operations. This is a prerequisite for adding
additional AVX lowering.
llvm-svn: 124447
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access control errors into SFINAE errors, so that the trait provides
enough support to implement the C++0x std::is_convertible type trait.
To get there, the SFINAETrap now knows how to set up a SFINAE context
independent of any template instantiations or template argument
deduction steps, and (separately) can set a Sema flag to translate
access control errors into SFINAE errors. The latter can also be
useful if we decide that access control errors during template argument
deduction should cause substitution failure (rather than a hard error)
as has been proposed for C++0x.
llvm-svn: 124446
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llvm-svn: 124445
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r124442.
llvm-svn: 124443
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rdar://problem/8893967: JM/lencod miscompile at -arch armv7 -mthumb -O3
Added ResurrectKill to remove kill flags after we decide to reused a
physical register. And (hopefully) ensure that we call it in all the
right places.
Sorry, I'm not checking in a unit test given that it's a miscompile I
can't reproduce easily with a toy example. Failures in the rewriter
depend on a series of heuristic decisions maked during one of the many
upstream phases in codegen. This case would require coercing regalloc
to generate a couple of rematerialzations in a way that causes the
scavenger to reuse the same register at just the wrong point.
The general way to test this is to implement kill flags
verification. Then we could have a simple, robust compile-only unit
test. That would be worth doing if the whole pass was not about to
disappear. At this point we focus verification work on the next
generation of regalloc.
llvm-svn: 124442
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have SFINAE behavior.
llvm-svn: 124441
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do not have SFINAE behavior.
llvm-svn: 124440
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llvm-svn: 124432
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llvm-svn: 124431
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llvm-svn: 124430
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fixed. But this reverted fix will only matter for non-clang compilers. Installed __is_convertible_to for clang.
llvm-svn: 124429
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