| Commit message (Collapse) | Author | Age | Files | Lines |
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They cannot be written to, so marking them const makes sense and may improve
optimisation.
As a side-effect, SectionInfos has to be moved from Sema to ASTContext.
It also fixes this problem, that occurs when compiling ATL:
warning LNK4254: section 'ATL' (C0000040) merged into '.rdata' (40000040) with different attributes
The ATL headers are putting variables in a special section that's marked
read-only. However, Clang currently can't model that read-onlyness in the IR.
But, by making the variables const, the section does become read-only, and
the linker warning is avoided.
Differential Revision: http://reviews.llvm.org/D5812
llvm-svn: 219960
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First, add a comment to support more variation in FDE formats. Second, refactor
fde -> function handling into a separate function living in the ArchHandler.
llvm-svn: 219959
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ArrayRef accessors.
I think this even came up in review that this was over-engineered, and
indeed it was. Time to un-build it.
llvm-svn: 219958
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Summary:
Backends can use setInsertFencesForAtomic to signal to the middle-end that
montonic is the only memory ordering they can accept for
stores/loads/rmws/cmpxchg. The code lowering those accesses with a stronger
ordering to fences + monotonic accesses is currently living in
SelectionDAGBuilder.cpp. In this patch I propose moving this logic out of it
for several reasons:
- There is lots of redundancy to avoid: extremely similar logic already
exists in AtomicExpand.
- The current code in SelectionDAGBuilder does not use any target-hooks, it
does the same transformation for every backend that requires it
- As a result it is plain *unsound*, as it was apparently designed for ARM.
It happens to mostly work for the other targets because they are extremely
conservative, but Power for example had to switch to AtomicExpand to be
able to use lwsync safely (see r218331).
- Because it produces IR-level fences, it cannot be made sound ! This is noted
in the C++11 standard (section 29.3, page 1140):
```
Fences cannot, in general, be used to restore sequential consistency for atomic
operations with weaker ordering semantics.
```
It can also be seen by the following example (called IRIW in the litterature):
```
atomic<int> x = y = 0;
int r1, r2, r3, r4;
Thread 0:
x.store(1);
Thread 1:
y.store(1);
Thread 2:
r1 = x.load();
r2 = y.load();
Thread 3:
r3 = y.load();
r4 = x.load();
```
r1 = r3 = 1 and r2 = r4 = 0 is impossible as long as the accesses are all seq_cst.
But if they are lowered to monotonic accesses, no amount of fences can prevent it..
This patch does three things (I could cut it into parts, but then some of them
would not be tested/testable, please tell me if you would prefer that):
- it provides a default implementation for emitLeadingFence/emitTrailingFence in
terms of IR-level fences, that mimic the original logic of SelectionDAGBuilder.
As we saw above, this is unsound, but the best that can be done without knowing
the targets well (and there is a comment warning about this risk).
- it then switches Mips/Sparc/XCore to use AtomicExpand, relying on this default
implementation (that exactly replicates the logic of SelectionDAGBuilder, so no
functional change)
- it finally erase this logic from SelectionDAGBuilder as it is dead-code.
Ideally, each target would define its own override for emitLeading/TrailingFence
using target-specific fences, but I do not know the Sparc/Mips/XCore memory model
well enough to do this, and they appear to be dealing fine with the ARM-inspired
default expansion for now (probably because they are overly conservative, as
Power was). If anyone wants to compile fences more agressively on these
platforms, the long comment should make it clear why he should first override
emitLeading/TrailingFence.
Test Plan: make check-all, no functional change
Reviewers: jfb, t.p.northover
Subscribers: aemerson, llvm-commits
Differential Revision: http://reviews.llvm.org/D5474
llvm-svn: 219957
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These haven't been necessary since allowing
selecting SALU instructions in non-entry blocks
was enabled.
llvm-svn: 219956
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iterators.
There are a ton of places where it essentially wants ranges
rather than just iterators. This is just the first step that adds the
core slice range typedefs and uses them in a couple of places. I still
have to explicitly construct them because they've not been punched
throughout the entire set of code. More range-based cleanups incoming.
llvm-svn: 219955
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unevaluated contexts. Fixes PR18571.
llvm-svn: 219954
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This was resulting in invalid simplifications of sdiv
llvm-svn: 219953
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llvm-svn: 219952
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These days -std-compile-opts was just a silly alias for -O3.
llvm-svn: 219951
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Summary:
Currently, call slot optimization requires that if the destination is an
argument, the argument has the sret attribute. This is to ensure that
the memory access won't trap. In addition to sret, we can also allow the
optimization to happen for arguments that have the new dereferenceable
attribute, which gives the same guarantee.
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D5832
llvm-svn: 219950
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To deal with cycles in shared library dependencies, the darwin linker supports
marking specific link dependencies as "upward". An upward link is when a
lower level library links against a higher level library.
llvm-svn: 219949
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This patch creates the import address table and sets its
address to the delay-load import table. This also creates
wrapper functions for __delayLoadHelper2.
x86 only for now.
llvm-svn: 219948
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llvm-svn: 219947
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llvm-svn: 219946
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llvm-svn: 219945
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If a square root call has an FP multiplication argument that can be reassociated,
then we can hoist a repeated factor out of the square root call and into a fabs().
In the simplest case, this:
y = sqrt(x * x);
becomes this:
y = fabs(x);
This patch relies on an earlier optimization in instcombine or reassociate to put the
multiplication tree into a canonical form, so we don't have to search over
every permutation of the multiplication tree.
Because there are no IR-level FastMathFlags for intrinsics (PR21290), we have to
use function-level attributes to do this optimization. This needs to be fixed
for both the intrinsics and in the backend.
Differential Revision: http://reviews.llvm.org/D5787
llvm-svn: 219944
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constant value in this case as well.
llvm-svn: 219943
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llvm-svn: 219942
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llvm-svn: 219941
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llvm-svn: 219940
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Summary:
Fix code to follow the "Don’t use else after a return" rule.
This is a followup from rL219792.
Reviewers: alexfh
Subscribers: klimek, cfe-commits
Differential Revision: http://reviews.llvm.org/D5826
llvm-svn: 219939
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(also, the code executed once the element was found was split half
inside the loop and half after it - now put it all together after the
find operation)
I'm a bit concerned that this code is rather untested (commenting out
this whole function and running check-clang doesn't fail any tests)...
And I wish I had polymorphic lambdas.
llvm-svn: 219938
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The final goal is to get rid of all the rest overloads that
accept LLVM objects (llvm::Function and llvm::GlobalVariable),
and pass in source-level entities instead.
llvm-svn: 219937
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was able to create itself before returning the shared
pointer to it.
clang warning.
llvm-svn: 219936
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llvm-svn: 219935
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When the constant divisor was larger than 32bits, then the optimized code
generated for the AArch64 backend would emit the wrong code, because the shift
was defined as a shift of a 32bit constant '(1<<Lg2(divisor))' and we would
loose the upper 32bits.
This fixes rdar://problem/18678801.
llvm-svn: 219934
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llvm-svn: 219933
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The test is a C++ semantic analysis test, move it to SemaCXX from Sema. NFC.
llvm-svn: 219932
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nodes.
Summary:
In order to support big endian targets for the BuildPairF64 nodes we
just need to swap the low/high pair registers. Additionally, for the
ExtractElementF64 nodes we have to calculate the correct stack offset
with respect to the node's register/operand that we want to extract.
Reviewers: dsanders
Reviewed By: dsanders
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D5753
llvm-svn: 219931
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llvm-svn: 219929
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The ensures there is an explicit address space id in the output.
llvm-svn: 219928
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Reviewers: dsanders
Reviewed By: dsanders
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D5751
llvm-svn: 219927
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* Make SmallVector size enough for all groups.
* Allow trailing period in the comment.
* Fix "// anonymous namespace qqq".
llvm-svn: 219926
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llvm-svn: 219925
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llvm-svn: 219924
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Summary:
This patch allows modules to specify default options for the checks
defined in them. This way a sufficiently configurable check can be registered in
multiple modules with different default options. E.g. the SpacesBeforeComments
option may be set to 1 for the "llvm-namespace-comments" check and to 2 for the
"google-readability-namespace-comment" check without modifying or extending the
check code.
This patch also registers the google-readability-braces-around-statements check
with suitable defaults.
Reviewers: djasper
Reviewed By: djasper
Subscribers: curdeius, cfe-commits
Differential Revision: http://reviews.llvm.org/D5798
llvm-svn: 219923
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llvm-svn: 219922
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Before:
SomeFunction(aaaaaaaaaaaaaaaaa,
// comment.
ccccccccccccccccc ? aaaaaaaaaaaaaaaaaaaa
: bbbbbbbbbbbbbbbbbbbb);
After:
SomeFunction(aaaaaaaaaaaaaaaaa,
// comment.
ccccccccccccccccc ? aaaaaaaaaaaaaaaaaaaa : bbbbbbbbbbbbbbbbbbbb);
llvm-svn: 219921
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dereferencing it, except for this one section of code. Add a null
check around it.
clang static analyzer fix.
llvm-svn: 219920
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Before:
return (a)[foo bar : baz];
After:
return (a)[foo bar:baz];
llvm-svn: 219919
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clang unreachable code warning.
llvm-svn: 219918
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llvm-svn: 219917
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clang unreachable code warning.
llvm-svn: 219916
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llvm-svn: 219915
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llvm-svn: 219914
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llvm-svn: 219913
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llvm-svn: 219912
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llvm-svn: 219911
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a number of warnings to be enabled. The one making the most noise
across the code base right now is CLANG_WARN_UNREACHABLE_CODE = YES.
llvm-svn: 219910
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