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* Remove unnecessary type casts.Rui Ueyama2016-01-071-3/+2
| | | | llvm-svn: 257080
* clang-format: Fix corner case in one-per-line formatting.Daniel Jasper2016-01-073-1/+14
| | | | | | | | | | | | | | | | | | | Before (example is JS, but also applies to C++): return [ aaaa() .bbbbbbbb('A'), aaaa().bbbbbbbb('B'), aaaa().bbbbbbbb('C'), ]; After: return [ aaaa().bbbbbbbb('A'), aaaa().bbbbbbbb('B'), aaaa().bbbbbbbb('C'), ]; llvm-svn: 257079
* ELF: Make private functions private.Rui Ueyama2016-01-071-6/+3
| | | | llvm-svn: 257078
* ELF: Split LinkerDriver::createFiles. NFC.Rui Ueyama2016-01-072-1/+6
| | | | | | | createFiles was doing more than creating files despite its name. Now these things are moved to a new function. llvm-svn: 257077
* ELF: Move error checking code of the driver into one place. NFC.Rui Ueyama2016-01-071-12/+19
| | | | llvm-svn: 257076
* ELF: Implement --wrap.Rui Ueyama2016-01-077-0/+46
| | | | | | | | | | | | | In this patch, all symbols are resolved normally and then wrap options are applied. Renaming is implemented by mutating `Body` pointers of Symbols. (As a result, Symtab.find(SymbolName)->getName() may return a string that's different from SymbolName, but that is by design. I designed the symbol and the symbol table to allow this kind of operations.) http://reviews.llvm.org/D15896 llvm-svn: 257075
* AMDGPU/SI: Fold operands with sub-registersNicolai Haehnle2016-01-077-21/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Multi-dword constant loads generated unnecessary moves from SGPRs into VGPRs, increasing the code size and VGPR pressure. These moves are now folded away. Note that this lack of operand folding was not a problem for VMEM loads, because COPY nodes from VReg_Nnn to VGPR32 are eliminated by the register coalescer. Some tests are updated, note that the fsub.ll test explicitly checks that the move is elided. With the IR generated by current Mesa, the changes are obviously relatively minor: 7063 shaders in 3531 tests Totals: SGPRS: 351872 -> 352560 (0.20 %) VGPRS: 199984 -> 200732 (0.37 %) Code Size: 9876968 -> 9881112 (0.04 %) bytes LDS: 91 -> 91 (0.00 %) blocks Scratch: 1779712 -> 1767424 (-0.69 %) bytes per wave Wait states: 295164 -> 295337 (0.06 %) Totals from affected shaders: SGPRS: 65784 -> 66472 (1.05 %) VGPRS: 38064 -> 38812 (1.97 %) Code Size: 1993828 -> 1997972 (0.21 %) bytes LDS: 42 -> 42 (0.00 %) blocks Scratch: 795648 -> 783360 (-1.54 %) bytes per wave Wait states: 54026 -> 54199 (0.32 %) Reviewers: tstellarAMD, arsenm, mareko Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D15875 llvm-svn: 257074
* AMDGPU/SI: xnack_mask is always reserved on VINicolai Haehnle2016-01-073-41/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Somehow, I first interpreted the docs as saying space for xnack_mask is only reserved when XNACK is enabled via SH_MEM_CONFIG. I felt uneasy about this and went back to actually test what is happening, and it turns out that xnack_mask is always reserved at least on Tonga and Carrizo, in the sense that flat_scr is always fixed below the SGPRs that are used to implement xnack_mask, whether or not they are actually used. I confirmed this by writing a shader using inline assembly to tease out the aliasing between flat_scratch and regular SGPRs. For example, on Tonga, where we fix the number of SGPRs to 80, s[74:75] aliases flat_scratch (so xnack_mask is s[76:77] and vcc is s[78:79]). This patch changes both the calculation of the total number of SGPRs and the various register reservations to account for this. It ought to be possible to use the gap left by xnack_mask when the feature isn't used, but this patch doesn't try to do that. (Note that the same applies to vcc.) Note that previously, even before my earlier change in r256794, the SGPRs that alias to xnack_mask could end up being used as well when flat_scr was unused and the total number of SGPRs happened to fall on the right alignment (e.g. highest regular SGPR being used s29 and VCC used would lead to number of SGPRs being 32, where s28 and s29 alias with xnack_mask). So if there were some conflict due to such aliasing, we should have noticed that already. Reviewers: arsenm, tstellarAMD Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D15898 llvm-svn: 257073
* Fix typo.Rui Ueyama2016-01-071-1/+1
| | | | | | They happened to be anagrams. llvm-svn: 257072
* [avx512] Fix test avx512bw-intrinsics.llMichael Zuckerman2016-01-071-58/+58
| | | | | | | Change the CHECK lablel into AVX512BW And fix declare lable of llvm.x86.avx512.mask.psrav32_hi llvm-svn: 257071
* [AVX512] add PSLLW and PSLLV IntrinsicMichael Zuckerman2016-01-075-0/+320
| | | | | | Differential Revision: http://reviews.llvm.org/D15889 llvm-svn: 257070
* Revert r257064. It caused failures in some sanitizer tests.Silviu Baranga2016-01-072-422/+3
| | | | llvm-svn: 257069
* XFAIL TestMultithreaded on linuxPavel Labath2016-01-071-1/+1
| | | | | | Test sometimes fails even during the reruns, upgrading to xflaky to xfail. llvm-svn: 257068
* Fix build after r257064: we should be returning false, not nullptrSilviu Baranga2016-01-071-2/+2
| | | | llvm-svn: 257067
* Revert r257055, it caused PR26064.Nico Weber2016-01-073-10/+13
| | | | llvm-svn: 257066
* [OpenMP] Fix issue in the offloading metadata testing.Samuel Antao2016-01-072-28/+28
| | | | | | | | | - Allow device ID to be signed. - Add missing semicolon to some of the CHECK directives. Thanks to Amjad Aboud for detecting the issue. llvm-svn: 257065
* [InstCombine] Look through PHIs, GEPs, IntToPtrs and PtrToInts to expose ↵Silviu Baranga2016-01-072-3/+422
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | more constants when comparing GEPs Summary: When comparing two GEP instructions which have the same base pointer and one of them has a constant index, it is possible to only compare indices, transforming it to a compare with a constant. This removes one use for the GEP instruction with the constant index, can reduce register pressure and can sometimes lead to removing the comparisson entirely. InstCombine was already doing this when comparing two GEPs if the base pointers were the same. However, in the case where we have complex pointer arithmetic (GEPs applied to GEPs, PHIs of GEPs, conversions to or from integers, etc) the value of the original base pointer will be hidden to the optimizer and this transformation will be disabled. This change detects when the two sides of the comparison can be expressed as GEPs with the same base pointer, even if they don't appear as such in the IR. The transformation will convert all the pointer arithmetic to arithmetic done on indices and all the relevant uses of GEPs to GEPs with a common base pointer. The GEP comparison will be converted to a comparison done on indices. Reviewers: majnemer, jmolloy Subscribers: hfinkel, jevinskie, jmolloy, aadg, llvm-commits Differential Revision: http://reviews.llvm.org/D15146 llvm-svn: 257064
* [AVX512] add PSRAV IntrinsicMichael Zuckerman2016-01-075-0/+175
| | | | | | Differential Revision: http://reviews.llvm.org/D15856 llvm-svn: 257063
* clang-format: Support weird lambda macros.Daniel Jasper2016-01-072-0/+13
| | | | | | | | | | Before: MACRO((AA & a) { return 1; }); After: MACRO((AA &a) { return 1; }); llvm-svn: 257062
* Remove duplicate header added in r256927Ewan Crawford2016-01-071-1/+0
| | | | | | | | | r256927 included a duplicate StreamString header file. This patch simply removes the duplicate. Author: Luke Drummond <luke.drummond@codeplay.com> Differential Revision: http://reviews.llvm.org/D15948 llvm-svn: 257061
* Added support for macro emission in dwarf (supporting DWARF version 4).Amjad Aboud2016-01-0710-4/+251
| | | | | | Differential Revision: http://reviews.llvm.org/D15495 llvm-svn: 257060
* [GlobalsAA] Partially back out r248576James Molloy2016-01-072-72/+0
| | | | | | | | | | | | | | | | | | | See PR25822 for a more full summary, but we were conflating the concepts of "capture" and "escape". We were proving nocapture and using that proof to infer noescape, which is not true. Escaped-ness is a function-local property - as soon as a value is used in a call argument it escapes. Capturedness is a related but distinct property. It implies a *temporally limited* escape. Consider: static int a; int b; int g(int * nocapture arg); int f() { a = 2; // Even though a escapes to g, it is not captured so can be treated as non-escaping here. g(&a); // But here it must be treated as escaping. g(&b); // Now that g(&a) has returned we know it was not captured so we can treat it as non-escaping again. } The original commit did not sufficiently understand this nuance and so caused PR25822 and PR26046. r248576 included both a performance improvement (which has been backed out) and a related conformance fix (which has been kept along with its testcase). llvm-svn: 257058
* Add missing -no-canonical-prefixes.Daniel Jasper2016-01-071-1/+1
| | | | llvm-svn: 257057
* [AVX512] add PSHUFHW and PSHUFLW Intrinsic Michael Zuckerman2016-01-074-0/+174
| | | | | | Differential Revision: http://reviews.llvm.org/D15925 llvm-svn: 257056
* [X86][AVX] Match broadcast loads through a bitcastSimon Pilgrim2016-01-073-13/+10
| | | | | | | | AVX1 v8i32/v4i64 shuffles are bitcasted to v8f32/v4f64, this patch peeks through bitcasts to check for a load node to allow broadcasts to occur. Follow up to D15310 llvm-svn: 257055
* Remove some Windows->Android XTIMEOUTsPavel Labath2016-01-071-5/+0
| | | | llvm-svn: 257052
* XFAIL TestEvents.test_add_listener_to_broadcasterPavel Labath2016-01-071-1/+1
| | | | | | Upgrade flaky to xfail, as the test sometimes fails even during the rerun. llvm-svn: 257050
* Added AVRTargetObjectFile class and AVR.hDylan McKay2016-01-074-0/+130
| | | | llvm-svn: 257049
* Mark arm as the 32bit variant of aarch64 in TripleTamas Berghammer2016-01-071-28/+28
| | | | | | | | | | Change Triple::get32BitArchVariant to return arm/armeb as the 32bit variant of aarch64/aarch64_be and do the same change for the oppoiste direction in Triple::get64BitArchVariant. Differential revision: http://reviews.llvm.org/D15529 llvm-svn: 257048
* Remove extra whitespace. NFC.Junmo Park2016-01-071-1/+1
| | | | llvm-svn: 257047
* [X86][SSE} Add INSERTPS as a target shuffleSimon Pilgrim2016-01-072-3/+50
| | | | | | Follow up to D15378, added INSERTPS to the list of decodable target shuffles and enabled XFormVExtractWithShuffleIntoLoad to handle target shuffles with SentinelZero and tested this with INSERTPS. llvm-svn: 257046
* [RenderScript] Improve file format for saving RS allocationsEwan Crawford2016-01-072-29/+154
| | | | | | | | | | | Updates the file format for storing RS allocations to a file, so that the format now supports struct element types. The file header will now contain a subheader for every RS element and it's descendants. Where an element subheader contains element type details and offsets to the subheaders of that elements fields. Patch also improves robustness when loading incorrect files. llvm-svn: 257045
* [AVX512] add PSHUFD IntrinsicMichael Zuckerman2016-01-074-0/+87
| | | | | | Differential Revision: http://reviews.llvm.org/D15934 llvm-svn: 257044
* [libclang] Handle AutoType in clang_getTypeDeclarationSergey Kalinichev2016-01-073-0/+38
| | | | | | Differential Revision: http://reviews.llvm.org/D13001 llvm-svn: 257043
* Follow-up fix for r256988 to unbreak the Linux buildbot.Kuba Brecka2016-01-071-0/+1
| | | | llvm-svn: 257042
* ARM: allow __thread on OS versions that have the required runtime support.Tim Northover2016-01-072-1/+35
| | | | llvm-svn: 257041
* Make sure we claim arguments that are going to be passed to a gcc tool,Eric Christopher2016-01-072-5/+12
| | | | | | even if they're not going to be used to avoid unused option warnings. llvm-svn: 257040
* ARM: support TLS accesses on Darwin platformsTim Northover2016-01-0711-8/+297
| | | | | | | | Darwin TLS accesses most closely resemble ELF's general-dynamic situation, since they have to be able to handle all possible situations. The descriptors and so on are obviously slightly different though. llvm-svn: 257039
* clang-format: [JS] Support more ES6 imports.Daniel Jasper2016-01-072-8/+8
| | | | | | | | | | | Before: import a, {X, Y} from 'some/module.js'; After: import a, {X, Y} from 'some/module.js'; llvm-svn: 257038
* Modernize to range-based loopMichael Liao2016-01-071-4/+2
| | | | llvm-svn: 257037
* [SystemZ] Add hasSideEffects flag on Serialize instruction.Jonas Paulsson2016-01-071-0/+3
| | | | | | | | | | Serialize will perform a hardware serialization operation, and is acting as a memory barrier. Therefore it must have the hasSideEffects flag set so it will be treated as a global memory object. Reviewed by Ulrich Weigand llvm-svn: 257036
* [X86] Remove superfluous mayLoad flag. The pattern already implies it.Craig Topper2016-01-071-3/+1
| | | | llvm-svn: 257035
* [X86] Had hasSideEffects=0 to VBROADCASTI128.Craig Topper2016-01-071-1/+1
| | | | llvm-svn: 257034
* [X86] Add OpSize32 to MOVSX32_NOREX instructions to match their other versions.Craig Topper2016-01-071-4/+4
| | | | llvm-svn: 257033
* [X86] Add hasSideEffects=0 and mayLoad=1 to MOVZX64* instructions. While ↵Craig Topper2016-01-072-14/+18
| | | | | | there remove a superfluous _Q from the instruction names. llvm-svn: 257032
* llvm/test/CodeGen/X86/statepoint-vector.ll REQUIRES asserts due to a debug ↵NAKAMURA Takumi2016-01-071-0/+1
| | | | | | option. llvm-svn: 257031
* [X86] STOSQ without a rep prefix doesn't read or write RCX.Craig Topper2016-01-071-1/+1
| | | | llvm-svn: 257030
* [ELF] Fix REQUIRES line in amdgpu testsTom Stellard2016-01-074-2/+6
| | | | | | | | | 'REQUIRES' needs to be in all caps. Also update lit.cfg so these tests get run when the AMDGPU target is enabled. llvm-svn: 257029
* Undo spurious change made in r256965David Majnemer2016-01-071-2/+1
| | | | llvm-svn: 257028
* [ELF] Fix amdgpu testsTom Stellard2016-01-073-3/+5
| | | | | | | The triples in these tests were completely wrong, but the tests were still passing for me locally. llvm-svn: 257027
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