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* [ThinLTO] Enable importing of aliases as copy of aliaseeTeresa Johnson2017-12-1614-81/+236
| | | | | | | | | | | | | | | | | | | | | | | Summary: This implements a missing feature to allow importing of aliases, which was previously disabled because alias cannot be available_externally. We instead import an alias as a copy of its aliasee. Some additional work was required in the IndexBitcodeWriter for the distributed build case, to ensure that the aliasee has a value id in the distributed index file (i.e. even when it is not being imported directly). This is a performance win in codes that have many aliases, e.g. C++ applications that have many constructor and destructor aliases. Reviewers: pcc Subscribers: mehdi_amini, inglorion, eraman, llvm-commits Differential Revision: https://reviews.llvm.org/D40747 llvm-svn: 320895
* [COFF] Update an outdated comment. NFCShoaib Meenai2017-12-151-1/+1
| | | | | | | This comment dates from when LLD didn't produce actual PDBs, and is very outdated now. llvm-svn: 320894
* Fix WebAssembly backend for some LLVM API changesDavid Blaikie2017-12-156-11/+10
| | | | llvm-svn: 320893
* [COFF] Simplify hasArgs calls. NFCShoaib Meenai2017-12-151-4/+3
| | | | | | | We can just pass multiple options to hasArgs (which will check for any of those options being present) instead of calling it multiple times. llvm-svn: 320892
* [CMake] darwin-debug is an hard dependency for tests on macOS.Davide Italiano2017-12-151-0/+5
| | | | | | Fixes a few failured on the testsuite with CMake. llvm-svn: 320891
* [TableGen][GlobalISel] Make the different Matcher comparableQuentin Colombet2017-12-151-0/+52
| | | | | | | | | This opens refactoring opportunities in the match table now that we can check that two predicates are the same. NFC. llvm-svn: 320890
* [TableGen][GlobalISel] Fix unused variable warning in release modeQuentin Colombet2017-12-151-0/+1
| | | | | | | | Introduced in r320887. NFC. llvm-svn: 320889
* Revert "Recommit "[DWARFv5] Dump an MD5 checksum in the line-table header.""Paul Robinson2017-12-157-86/+27
| | | | | | | This reverts commit 0afef672f63f0e4e91938656bc73424a8c058bfc. Still failing at runtime on bots. llvm-svn: 320888
* [TableGen][GlobalISel] Have the predicate directly know which data they are ↵Quentin Colombet2017-12-151-101/+169
| | | | | | | | | | | | | dealing with Prior to this patch, a predicate wouldn't make sense outside of its rule. Indeed, it was only during emitting a rule that a predicate would be made aware of the IDs of the data it is checking. Because of that, predicates could not be moved around or compared between each other. NFC. llvm-svn: 320887
* Recommit "[DWARFv5] Dump an MD5 checksum in the line-table header."Paul Robinson2017-12-157-27/+86
| | | | | | | | | | | Adds missing support for DW_FORM_data16. Update of r320852, fixing the unittest to use a hand-coded struct instead of std::array to guarantee data layout. Differential Revision: https://reviews.llvm.org/D41090 llvm-svn: 320886
* Fix unused variable in non-assert buildsMatthias Braun2017-12-151-2/+1
| | | | llvm-svn: 320885
* MachineFunction: Return reference from getFunction(); NFCMatthias Braun2017-12-15242-843/+829
| | | | | | The Function can never be nullptr so we can return a reference. llvm-svn: 320884
* [MacOSX/Queues] Relax an overly aggressive assertion in a test.Davide Italiano2017-12-151-1/+2
| | | | | | | | | | "Default" is a valid QoS for a thread on older versions of macOS, like the one installed in the bot. Thanks to Jason Molenda for helping me figuring out the problem. <rdar://problem/28346273> llvm-svn: 320883
* MachineFunction: Slight refactoring; NFCMatthias Braun2017-12-154-21/+24
| | | | | | Slight cleanup/refactor in preparation for upcoming commit. llvm-svn: 320882
* MachineModuleInfo: Remove unused function; NFCMatthias Braun2017-12-151-1/+0
| | | | | | | | Remove the unused setModule() function; it would be dangerous if someone actually used it as it wouldn't reset/recompute various other module related data. llvm-svn: 320881
* [WebAssembly] Don't include lazy symbols in import tableSam Clegg2017-12-152-13/+20
| | | | | | | | | This bug was introduced in: https://reviews.llvm.org/D41304. Add a test for this case. Differential Revision: https://reviews.llvm.org/D41309 llvm-svn: 320872
* Fixed the gcc 'enumeral and non-enumeral type in conditional expression ↵Galina Kistanova2017-12-151-3/+3
| | | | | | [-Werror=extra]' warning introduced by r320750 llvm-svn: 320868
* [Hexagon] Remove recursion in visitUsesOf, replace with use queueKrzysztof Parzyszek2017-12-152-43/+121
| | | | | | | | | | | | | | | | This is primarily to reduce stack usage, but ordering the use queue according to the position in the code (earlier instructions visited before later ones) reduces the number of unnecessary bottoms due to visiting instructions out of order, e.g. %reg1 = copy %reg0 %reg2 = copy %reg0 %reg3 = and %reg1, %reg2 Here, reg3 should be known to be same as reg0-2, but if reg3 is evaluated after reg1 is updated, but before reg2 is updated, the two inputs to the and will appear different, causing reg3 to become bottom. llvm-svn: 320866
* [Hexagon] Handle concat_vectors of all allowed HVX typesKrzysztof Parzyszek2017-12-154-10/+99
| | | | llvm-svn: 320865
* [X86] Use AND32ri8 instead of AND64ri8 in Asan code in EmitCallAsanReport ↵Craig Topper2017-12-151-1/+1
| | | | | | | | for 32-bit mode. This seemed to work due to a quirk in the X86 MC encoder that didn't emit a REX byte that the AND64ri8 implies when in 32-bit mode. This made the encoding the same as AND32ri8. I tried to add an assert to catch the dropped REX prefix that caught this. llvm-svn: 320864
* [X86] In LowerVectorCTPOP use ISD::ZERO_EXTEND/ISD::TRUNCATE instead of the ↵Craig Topper2017-12-151-4/+4
| | | | | | | | target specific nodes. The target independent nodes will get legalized to the target specific nodes by their own legalization process. Someday I'd like to stop using a target specific for zero extends and truncates of legal types so the less places we reference the target specific opcode the better. llvm-svn: 320863
* [X86] Remove unnecessary TODO.Craig Topper2017-12-151-1/+0
| | | | | | When I wrote it I thought we were missing a potential optimization for KNL. But investigating further shows that for KNL we still do the optimal thing by widening to v4f32 and then using special isel patterns to widen again to zmm a register. llvm-svn: 320862
* [MinGW] Ignore the --no-seh flagMartin Storsjo2017-12-151-0/+1
| | | | | | | | | The COFF linker automatically sets the IMAGE_DLL_CHARACTERISTICS_NO_SEH when suitable, similarly to link.exe. Differential Revision: https://reviews.llvm.org/D41275 llvm-svn: 320861
* [COFF] Set the IMAGE_DLL_CHARACTERISTICS_NO_SEH flag automaticallyMartin Storsjo2017-12-153-3/+9
| | | | | | | | This seems to match how link.exe sets it. Differential Revision: https://reviews.llvm.org/D41252 llvm-svn: 320860
* [LTO] Remove unused RegularLTOState::HasModuleVitaly Buka2017-12-151-1/+0
| | | | llvm-svn: 320859
* Re-commit : [LICM] Allow sinking when foldable in loopJun Bum Lim2017-12-153-31/+232
| | | | | | | | | | | | | | | | | | | | | | This recommits r320823 reverted due to the test failure in sink-foldable.ll and an unused variable. Added "REQUIRES: aarch64-registered-target" in the test and removed unused variable. Original commit message: Continue trying to sink an instruction if its users in the loop is foldable. This will allow the instruction to be folded in the loop by decoupling it from the user outside of the loop. Reviewers: hfinkel, majnemer, davidxl, efriedma, danielcdh, bmakam, mcrosier Reviewed By: hfinkel Subscribers: javed.absar, bmakam, mcrosier, llvm-commits Differential Revision: https://reviews.llvm.org/D37076 llvm-svn: 320858
* Revert "[DWARFv5] Dump an MD5 checksum in the line-table header."Paul Robinson2017-12-157-84/+27
| | | | | | Unit test fails on some bots. llvm-svn: 320857
* [llvm-objcopy] Reformat everything using clang-format -iJake Ehrlich2017-12-152-26/+22
| | | | | | | | | Overtime some non-clang formatted code has creeped into llvm-objcopy. This patch fixes all of that. Differential Revision: https://reviews.llvm.org/D41262 llvm-svn: 320856
* [Hexagon] Fix operand-swapping PatFrag for atomic storesKrzysztof Parzyszek2017-12-152-18/+90
| | | | | | | PatFrag now has the atomicity information stored as bit fields. They need to be copied to the new PatFrag. llvm-svn: 320855
* __is_target_environment: Check the environment after parsing itAlex Lorenz2017-12-152-4/+9
| | | | | | | This ensures that target triples with environment versions can still work with __is_target_environment. llvm-svn: 320854
* __is_target_arch: Check the arch and subarch instead of the arch nameAlex Lorenz2017-12-152-3/+13
| | | | | | | | | This ensures that when compiling for "arm64" __is_target_arch will succeed for both "arm64" and "aarch64". Thanks to Bob Wilson who pointed this out! llvm-svn: 320853
* [DWARFv5] Dump an MD5 checksum in the line-table header.Paul Robinson2017-12-157-27/+84
| | | | | | | | Adds missing support for DW_FORM_data16. Differential Revision: https://reviews.llvm.org/D41090 llvm-svn: 320852
* Do not add .dynamic entries that don't have to be added early in the ctor. NFC.Rui Ueyama2017-12-152-30/+22
| | | | | | | | | | | We add dynamic section entries both in the ctor of the class and DynamicSection::finalizeContents(). Some entries need to be added early in the ctor because they add strings to .dynstr. Other entries were intended to be added in finalizeContents(). However, some entries are added in the ctor even though they don't add strings. This patch fix the issue. llvm-svn: 320851
* [X86] Remove assert in X86MCCodeEmitter.cpp that was added in r320830.Craig Topper2017-12-151-2/+0
| | | | | | It seems to be failing real code which is concerning, but we were silently getting away with it. I'll investigate further. llvm-svn: 320850
* [SelectionDAG][X86] Fix insert_vector_elt lowering for v32i1/v64i1 with ↵Craig Topper2017-12-153-7/+619
| | | | | | | | | | | | | | | | | | | | | | | non-constant index Summary: Currently we don't handle v32i1/v64i1 insert_vector_elt correctly as we fail to look at the number of elements closely and assume it can only be v16i1 or v8i1. We also can't type legalize v64i1 insert_vector_elt correctly on KNL due to the type not being byte addressable as required by the legalizing through memory accesses path requires. For the first issue, the patch now tries to pick a 512-bit register with the correct number of elements and promotes to that. For the second issue, we now extend the vector to a byte addressable type, do the stores to memory, load the two halves, and then truncate the halves back to the original type. Technically since we changed the type, we may not need two loads, but actually checking that is more work and for the v64i1 case we do need them. Reviewers: RKSimon, delena, spatel, zvi Reviewed By: RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D40942 llvm-svn: 320849
* [Memcpy Loop Lowering] Insert loop BB inbetween the split BB.Sean Fertile2017-12-152-2/+9
| | | | | | | | | | | The original memcpy expansion inserted the loop basic block inbetween the 2 new basic blocks created by splitting the original block the memcpy call was in. This commit makes the new memcpy expansion do the same to keep the layout of the IR matching between the old and new implementations. Differential Review: https://reviews.llvm.org/D41197 llvm-svn: 320848
* [WebAssembly] Base imports on Symtab. NFC.Sam Clegg2017-12-152-14/+9
| | | | | | | | | | | | | Since imports are undefined symbols we know we can find all of them my looking at the symbol table alone. (i.e. imports cannot be have local binding). This will be strictly faster and also allows us to to remove a method from Symbol class Differential Revision: https://reviews.llvm.org/D41304 llvm-svn: 320847
* [X86] Add 'Requires<[In64BitMode]>' to a bunch of instructions that only ↵Craig Topper2017-12-154-67/+94
| | | | | | | | have memory and immediate operands. The asm parser wasn't preventing these from being accepted in 32-bit mode. Instructions that use a GR64 register are protected by the parser rejecting the register in 32-bit mode. llvm-svn: 320846
* [X86] Change BNDLDX to use anymem instead of i64mem for itsmemory operand.Craig Topper2017-12-151-1/+1
| | | | | | This instruction doesn't access memory. It juse use a similar looking memory encoding. Don't require Intel syntax to put "qword ptr" in front of it. llvm-svn: 320845
* [X86] Remove the 'Requires' In64BitMode/Not64BitMode from the LWP instructions.Craig Topper2017-12-151-4/+4
| | | | | | These aren't doing anything due to a top level "let Predicates =". I think the GR32/GR64 register class protects these anyway. llvm-svn: 320844
* [X86] Remove the 'Requires<[In64BitMode]>' from SHSTK instructions.Craig Topper2017-12-151-9/+5
| | | | | | This has no effect due to a top level "let Predicates =" around the instructions. But its also not required because the GR64 usage in the instruction guarantees it can never match. llvm-svn: 320843
* [TargetLibraryInfo] fix documentation comment; NFCSanjay Patel2017-12-151-3/+3
| | | | llvm-svn: 320842
* [clang-tidy] Adding Fuchsia checker for virtual inheritanceJulie Hockett2017-12-158-0/+142
| | | | | | | | | | | | Adds a check to the Fuchsia module to warn if classes are defined with virtual inheritance. See https://fuchsia.googlesource.com/zircon/+/master/docs/cxx.md for reference. Differential Revision: https://reviews.llvm.org/D40813 llvm-svn: 320841
* [CodeGen] fix documentation comments; NFCSanjay Patel2017-12-151-10/+7
| | | | llvm-svn: 320840
* [AArch64] Fix typo in the ASIMD instruction optimization passEvandro Menezes2017-12-151-66/+72
| | | | | | | | Fix typo in the representative instruction replacement. Also, fix formatting and reword some comments. llvm-svn: 320839
* fix typo in comment and remove inaccurate comment; NFCSanjay Patel2017-12-152-3/+1
| | | | llvm-svn: 320838
* Fix for bug PR35549 - Repeated schedule comments.Andrew V. Tischenko2017-12-154-18/+24
| | | | | | Differential Revision: https://reviews.llvm.org/D40960 llvm-svn: 320837
* Revert "Re-commit : [LICM] Allow sinking when foldable in loop"Jun Bum Lim2017-12-153-231/+31
| | | | | | This reverts commit r320833. llvm-svn: 320836
* [CodeGen] fix documentation comments; NFCSanjay Patel2017-12-151-10/+6
| | | | llvm-svn: 320835
* Re-commit : [LICM] Allow sinking when foldable in loopJun Bum Lim2017-12-153-31/+231
| | | | | | | | | | | | | | | | | | | | This recommit r320823 after fixing a test failure. Original commit message: Continue trying to sink an instruction if its users in the loop is foldable. This will allow the instruction to be folded in the loop by decoupling it from the user outside of the loop. Reviewers: hfinkel, majnemer, davidxl, efriedma, danielcdh, bmakam, mcrosier Reviewed By: hfinkel Subscribers: javed.absar, bmakam, mcrosier, llvm-commits Differential Revision: https://reviews.llvm.org/D37076 llvm-svn: 320833
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