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* [X86] Generalize X86PadShortFunction to work with TargetSchedModelSimon Pilgrim2018-04-111-14/+10
| | | | | | | | | | Pre-commit for D45486, don't rely on itinerary scheduler model to determine latencies for padding, use the generic TargetSchedModel::computeInstrLatency call. Also, replace hard coded (atom specific) 2*uop creation per padding cycle with a version based on the scheduler model's issue width. Differential Revision: https://reviews.llvm.org/D45486 llvm-svn: 329834
* [Documentation] Fix formatting and order in Release Notes for recent changes ↵Eugene Zelenko2018-04-112-8/+10
| | | | | | in modernize-use-auto. llvm-svn: 329833
* [xray] Fix OS X bots.George Karpenkov2018-04-111-15/+15
| | | | | | OS X has "fat" executables which contain the code for all architectures. llvm-svn: 329832
* [Target] Remove dead/commented out code. NFC.Davide Italiano2018-04-111-16/+0
| | | | | | Some spring cleaning before I touch this file more extensively. llvm-svn: 329831
* [NVPTX] Removed 'satom' feature which is no longer used.Artem Belevich2018-04-115-14/+5
| | | | | | Differential Revision: https://reviews.llvm.org/D45061 llvm-svn: 329830
* [NVPTX, CUDA] Improved feature constraints on NVPTX target builtins.Artem Belevich2018-04-116-170/+200
| | | | | | | | | | When NVPTX TARGET_BUILTIN specifies sm_XX or ptxYY as required feature, consider those features available if we're compiling for GPU >= sm_XX or have enabled PTX version >= ptxYY. Differential Revision: https://reviews.llvm.org/D45061 llvm-svn: 329829
* Revert "[cmake] Remove duplicate command line options from build"Aaron Smith2018-04-111-2/+2
| | | | | | | | The Android sanitizer buildbot is failing with this change and it looks like an additional change to cmake is necessary to fix the build. Reverting this change for now. llvm-svn: 329828
* Document -std= values for different languagesDimitry Andric2018-04-111-1/+120
| | | | | | | | | | | | | | | | | | | | Summary: After a remark on a FreeBSD mailing list that the clang man page did not have any list of possible values for the `-std=` flag, I have now attempted to exhaustively list those, for each available language. I also documented the default standard for each language, if there was more than one choice. Reviewers: rsmith, dexonsmith, sylvestre.ledru, mgorny Reviewed By: rsmith Subscribers: fhahn, emaste, cfe-commits, krytarowski Differential Revision: https://reviews.llvm.org/D45406 llvm-svn: 329827
* [AMDGPU] Ensure there are enough registers for wave dispatchTim Renouf2018-04-112-0/+31
| | | | | | | | | | | | | | | | | Summary: This fixes the number of SGPRs and VGPRs in the *_RSRC1 register to allow for registers set up in wave dispatch, even if those registers are not used in the shader. Re-landed after noticing that the buildbot failure from 329808 seemed to be unrelated. Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, t-tye, llvm-commits Differential Revision: https://reviews.llvm.org/D45503 Change-Id: I6575f0e0d2a528d1319d0b289f0ebe4510fa5771 llvm-svn: 329826
* Revert r327216 'Add isl operator overloads for isl::pw_aff'Tobias Grosser2018-04-113-187/+0
| | | | | | This commit requires further discussions. llvm-svn: 329825
* [DSE] Regenerate tests with update_test_checks.py (NFC)Daniel Neilson2018-04-112-175/+308
| | | | | | | | | Summary: In preparation for a future commit, this regenerates the test checks for test/Transforms/DeadStoreElimination/simple.ll test/Transforms/DeadStoreElimination/memintrinsics.ll llvm-svn: 329824
* bpf: accept all asm register namesYonghong Song2018-04-112-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Sometimes when people compile bpf programs with "clang ... -target bpf ...", the kernel header files may contain host arch inline assembly codes as in the patch https://patchwork.kernel.org/patch/10119683/ by Arnaldo Carvaldo de Melo. The current workaround in the above patch is to guard the inline assembly with "#ifndef __BPF__" marco. So when __BPF__ is defined, these macros will have no use. Such a method is not extensible. As a matter of fact, most of these inline assembly codes will be thrown away at the end of clang compilation. So for bpf target, this patch accepts all asm register names in clang AST stage. The name will be checked again during llc code generation if the inline assembly code is indeed for bpf programs. With this patch, the above "#ifndef __BPF__" is not needed any more in https://patchwork.kernel.org/patch/10119683/. Signed-off-by: Yonghong Song <yhs@fb.com> llvm-svn: 329823
* [FastISel] Disable local value sinking by defaultReid Kleckner2018-04-1130-69/+76
| | | | | | | | | | | | | | | | | | This is causing compilation timeouts on code with long sequences of local values and calls (i.e. foo(1); foo(2); foo(3); ...). It turns out that code coverage instrumentation is a great way to create sequences like this, which how our users ran into the issue in practice. Intel has a tool that detects these kinds of non-linear compile time issues, and Andy Kaylor reported it as PR37010. The current sinking code scans the whole basic block once per local value sink, which happens before emitting each call. In theory, local values should only be introduced to be used by instructions between the current flush point and the last flush point, so we should only need to scan those instructions. llvm-svn: 329822
* [InstCombine] limit X - (cast(-Y) --> X + cast(Y) with hasOneUse()Sanjay Patel2018-04-112-18/+15
| | | | llvm-svn: 329821
* [DWARFv5] Fuss with asm syntax for conveying MD5 checksum.Paul Robinson2018-04-116-42/+46
| | | | | | | | | | Previously the MD5 option of the .file directive provided the checksum as a quoted hex string; now it's a normal hex number with 0x prefix, same as the .octa directive accepts. Differential Revision: https://reviews.llvm.org/D45459 llvm-svn: 329820
* [MIPS GlobalISel] Select add i32, i32Petar Jovanovic2018-04-1116-13/+537
| | | | | | | | | | | | | Add the minimal support necessary to lower a function that returns the sum of two i32 values. Support argument/return lowering of i32 values through registers only. Add tablegen for regbankselect and instructionselect. Patch by Petar Avramovic. Differential Revision: https://reviews.llvm.org/D44304 llvm-svn: 329819
* [SLP] update a test case. NFC.Haicheng Wu2018-04-111-15/+17
| | | | llvm-svn: 329818
* [cmake] Remove duplicate command line options from buildAaron Smith2018-04-111-2/+2
| | | | | | | | | | | | | CMAKE_CXX_FLAGS was added twice to the command line. This causes the command line options to be doubled which works until it doesn't as not all options can be specified twice. For example, clang-cl foo.c /GS- /GS- -mllvm -small-loop-cost=1 -mllvm -small-loop-cost=1 clang (LLVM option parsing): for the -small-loop-cost option: may only occur zero or one times! llvm-svn: 329817
* Fix bugs around handling C++11 attributes.Manuel Klimek2018-04-112-2/+27
| | | | | | | | | | | | | | | | Previously, we would format: int a() { ... } [[unused]] int b() { ... } as... int a() {} [[unused] int b() {} Now we correctly format each on its own line. Similarly, we would detect: [[unused]] int b() { return 42; } As a lambda and leave it on a single line, even if that was disallowed by the format style. llvm-svn: 329816
* [AMDGPU] Fix lowering enqueue_kernelYaxun Liu2018-04-112-24/+47
| | | | | | | | | | | | | | | | | | Two issues were fixed: runtime has difficulty to allocate memory for an external symbol of a kernel and set the address of the external symbol, therefore make the runtime handle of an enqueued kernel an ordinary global variable. Runtime only needs to store the address of the loaded kernel to the handle and has verified that this approach works. handle the situation where __enqueue_kernel* gets inlined therefore the enqueued kernel may be used through a constant expr instead of an instruction. Differential Revision: https://reviews.llvm.org/D45187 llvm-svn: 329815
* [NEON] Support vfma_n and vfms_n intrinsicsIvan A. Kosarev2018-04-112-2/+25
| | | | | | Differential Revision: https://reviews.llvm.org/D45483 llvm-svn: 329814
* [clang-apply-replacements] Convert tooling::Replacements to ↵Malcolm Parsons2018-04-1117-521/+215
| | | | | | | | | | | | | | | | | | | | tooling::AtomicChange for conflict resolving of changes, code cleanup, and code formatting. Summary: By converting Replacements by AtomicChange, clang-apply-replacements is able like clang-tidy to automatically cleanup and format changes. This should permits to close this ticket: https://bugs.llvm.org/show_bug.cgi?id=35051 and attempt to follow hints from https://reviews.llvm.org/D43500 comments. Reviewers: klimek, ioeric Reviewed By: ioeric Subscribers: malcolm.parsons, mgorny, cfe-commits Differential Revision: https://reviews.llvm.org/D43764 Patch by Jeremy Demeule. llvm-svn: 329813
* Revert "[llvm-mca][CMake] Remove unused libraries from set LLVM_LINK_COMPONENTS"Andrea Di Biagio2018-04-111-0/+6
| | | | | | It caused a buildbot failure (clang-ppc64le-linux-multistage - build #6424) llvm-svn: 329812
* Revert "[AMDGPU] Ensure there are enough registers for wave dispatch"Tim Renouf2018-04-112-31/+0
| | | | | | | | | This reverts 329808. That change caused a report of a failure in test/CodeGen/MIR/AMDGPU/mir-canon-multi.mir that I didn't see. I suspect it is an expensive-check-only error. Change-Id: I8133f26f15e7d5ec2b09c687c12cd70e918461b0 llvm-svn: 329811
* [Driver] Don't forward -m[no-]unaligned-access options to GCC when ↵Chad Rosier2018-04-112-0/+13
| | | | | | | | assembling/linking Differential Revision: https://reviews.llvm.org/D45092 llvm-svn: 329810
* [AArch64][AsmParser] Split index parsing from vector list.Sander de Smalen2018-04-111-27/+23
| | | | | | | | | | | | | | | | | | | | Summary: Place parsing of a vector index into a separate function to reduce duplication, since the code is duplicated in both the parsing of a Neon vector register operand and a Neon vector list. This is patch [2/6] in a series to add assembler/disassembler support for SVE's contiguous ST1 (scalar+imm) instructions. Reviewers: fhahn, rengolin, javed.absar, huntergr, SjoerdMeijer, t.p.northover, echristo, evandro Reviewed By: rengolin Subscribers: kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D45428 llvm-svn: 329809
* [AMDGPU] Ensure there are enough registers for wave dispatchTim Renouf2018-04-112-0/+31
| | | | | | | | | | | | | | Summary: This fixes the number of SGPRs and VGPRs in the *_RSRC1 register to allow for registers set up in wave dispatch, even if those registers are not used in the shader. Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, t-tye, llvm-commits Differential Revision: https://reviews.llvm.org/D45503 Change-Id: I6575f0e0d2a528d1319d0b289f0ebe4510fa5771 llvm-svn: 329808
* [llvm-mca][CMake] Remove unused libraries from set LLVM_LINK_COMPONENTS.Andrea Di Biagio2018-04-111-6/+0
| | | | llvm-svn: 329807
* [X86] Add variable shuffle schedule classesSimon Pilgrim2018-04-1117-181/+117
| | | | | | | | | | | | | | Split variable index shuffles from immediate index shuffles WriteFVarShuffle - variable 'in-lane' shuffles (VPERMILPS/VPERMIL2PS etc.) WriteVarShuffle - variable 'in-lane' shuffles (PSHUFB/VPPERM etc.) WriteFVarShuffle256 - variable 'cross-lane' shuffles (VPERMPS etc.) WriteVarShuffle256 - variable 'cross-lane' shuffles (VPERMD etc.) Differential Revision: https://reviews.llvm.org/D45404 llvm-svn: 329806
* [AArch64] Add test case for r329797Francis Visoiu Mistrih2018-04-111-0/+17
| | | | | | Forgot to add a test case in the previous commit. llvm-svn: 329805
* [Sema] Fix built-in decrement operator overload resolutionJan Korous2018-04-112-5/+21
| | | | | | | | | | | | | | | | | C++ [over.built] p4: "For every pair (T, VQ), where T is an arithmetic type other than bool, and VQ is either volatile or empty, there exist candidate operator functions of the form VQ T& operator--(VQ T&); T operator--(VQ T&, int); " The bool type is in position LastPromotedIntegralType in BuiltinOperatorOverloadBuilder::getArithmeticType::ArithmeticTypes, but addPlusPlusMinusMinusArithmeticOverloads() was expecting it at position 0. Differential Revision: https://reviews.llvm.org/D44988 rdar://problem/34255516 llvm-svn: 329804
* llgs: Send "rich" errors in response to vAttach packetsPavel Labath2018-04-114-11/+29
| | | | | | | | | | | | | | | | | There are plenty of ways attaching can go wrong. Having the server report the exact error means we can give better feedback to the user. (This patch does not do the second part, it only makes sure the information is sent from the server.) Triggering all possible error conditions in a test would prove challenging, but there is one error that is very easy to reproduce (attempting to attach while debugging), so I write a test based on that. The test immediately exposed a bug where the m_send_error_strings field was being used uninitialized (so it was sometimes true from the get-go), so I fix that as well. llvm-svn: 329803
* [X86][SSE] Tweak cmpps schedule test so that it works properly with just sse1Simon Pilgrim2018-04-111-4/+5
| | | | | | movhps/movlps test are still broken so we can't disable sse2 yet llvm-svn: 329802
* [AMDGPU][MC][GFX9] Added v_screen_partition_4se_b32Dmitry Preobrazhensky2018-04-119-5/+85
| | | | | | | | | See bug 36845: https://bugs.llvm.org/show_bug.cgi?id=36845 Differential Revision: https://reviews.llvm.org/D45443 Reviewers: artem.tamazov, arsenm, timcorringham llvm-svn: 329801
* [AArch64] Fix regression after r329691Francis Visoiu Mistrih2018-04-111-1/+1
| | | | | | | | | | | | In r329691, we would choose FP even if the offset wouldn't fit, just because the offset is smaller than the one from BP. This made many accesses through FP need to scavenge a register, which resulted in slower and bigger code for no good reason. This patch now always picks the offset that fits first, even if FP is preferred. llvm-svn: 329797
* [llvm-mca] Minor code cleanup. NFCAndrea Di Biagio2018-04-115-26/+19
| | | | llvm-svn: 329796
* [PowerPC] Option for secure plt modeStrahinja Petrovic2018-04-114-0/+22
| | | | | | | | | This patch enables option for secure plt mode in clang (-msecure-plt). Differential Revision: https://reviews.llvm.org/D44921 llvm-svn: 329795
* [llvm-mca] Renamed BackendStatistics to RetireControlUnitStatistics.Andrea Di Biagio2018-04-116-32/+87
| | | | | | Also, removed flag -verbose in favor of flag -retire-stats. llvm-svn: 329794
* [llvm-mca] Move the logic that prints scheduler statistics from ↵Andrea Di Biagio2018-04-119-131/+244
| | | | | | | | BackendStatistics to its own view. Added flag -scheduler-stats to print scheduler related statistics. llvm-svn: 329792
* Eliminate a bitwise 'not' op of 'not' min/max by inverting the min/max.Artur Gainullin2018-04-113-4/+177
| | | | | | | | | | | | | | | | | | | | | Bitwise 'not' of the min/max could be eliminated in the pattern: %notx = xor i32 %x, -1 %cmp1 = icmp sgt[slt/ugt/ult] i32 %notx, %y %smax = select i1 %cmp1, i32 %notx, i32 %y %res = xor i32 %smax, -1 https://rise4fun.com/Alive/lCN Reviewers: spatel Reviewed by: spatel Subscribers: a.elovikov, llvm-commits Differential Revision: https://reviews.llvm.org/D45317 llvm-svn: 329791
* [clang-tidy] fix buildbots from hicpp-signed-bitwiseJonas Toth2018-04-111-5/+10
| | | | | | | The applied patch to diagnose assignment operators introduced breakage on some architectures. This patch tries to rectify that. llvm-svn: 329790
* [clang-tidy] add missing assignment operations in hicpp-signed-bitwiseJonas Toth2018-04-114-38/+66
| | | | | | | | | | | | | This patch resolves the bug https://bugs.llvm.org/show_bug.cgi?id=36963. - implement missing assignment operators for hicpp-signed-bitwise - mention fix in release notes Reviewers: aaron.ballman, hokein, alexfh Differential: https://reviews.llvm.org/D45414 llvm-svn: 329789
* [ARM] FP16 VSEL codegenSjoerd Meijer2018-04-112-16/+152
| | | | | | | | | | | | | This is a follow up of rL327695 to instruction select more variants of VSELGT and VSELGE, for which it is necessary to custom lower SELECT. More work is required in this area, which will be addressed soon: - more variants need to be regression tested, but this depends on the next point. - first LowerConstantFP need to be adjusted for fp16 values. Differential Revision: https://reviews.llvm.org/D45205 llvm-svn: 329788
* [ELF] - Reorder local symbols.George Rimar2018-04-114-16/+45
| | | | | | | | | | | This fixes PR36716 (https://bugs.llvm.org/show_bug.cgi?id=36716), Patch sorts local symbols to match the following order: file1, local1, hidden1, file2, local2, hidden2 ... Differential revision: https://reviews.llvm.org/D45325 llvm-svn: 329787
* [Tooling] Correct the "-std" compile command option.Haojian Wu2018-04-112-4/+4
| | | | | | | | | | | | | | | Summary: "-std c++11" is not valid in compiler, we have to use "-std=c++11". Test in vscode with this patch, code completion for header works as expected. Reviewers: sammccall Subscribers: cfe-commits, klimek Differential Revision: https://reviews.llvm.org/D45512 llvm-svn: 329786
* [ELF] - Simplify. NFC.George Rimar2018-04-111-7/+4
| | | | llvm-svn: 329785
* [Tooling] Optimize memory usage in InMemoryToolResults.Haojian Wu2018-04-113-6/+27
| | | | | | | | | | | | | | Avoid storing duplicated "std::string"s. clangd's global-symbol-builder takes 20+GB memory running across LLVM repository. With this patch, the used memory is ~10GB (running on 48 threads, most of meory are AST-related). Subscribers: klimek, cfe-commits Differential Revision: https://reviews.llvm.org/D45479 llvm-svn: 329784
* [Build][NFC] Split off libpfm detection to a separate module.Clement Courbet2018-04-112-11/+24
| | | | llvm-svn: 329783
* [AArch64][AsmParser] Unify code for parsing Neon/SVE vectors.Sander de Smalen2018-04-116-151/+165
| | | | | | | | | | | | | | | | | | | | | | Summary: Merged 'tryMatchVectorRegister' (specific to Neon) and 'tryParseSVERegister' into a single 'tryParseVectorRegister' function, and created a generic 'parseVectorKind()' function that returns the #Elements and ElementWidth of a vector suffix. This reduces the duplication of this functionality between two the vector implementations. This is patch [1/6] in a series to add assembler/disassembler support for SVE's contiguous ST1 (scalar+imm) instructions. Reviewers: fhahn, rengolin, javed.absar, huntergr, SjoerdMeijer, t.p.northover, echristo, evandro Reviewed By: fhahn Subscribers: tschuett, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D45427 llvm-svn: 329782
* [llvm-exegesis] Add a flag to disable libpfm even if present.Clement Courbet2018-04-115-11/+18
| | | | | | | | | | | | Summary: Fixes PR37053. Reviewers: uabelho, gchatelet Subscribers: mgorny, tschuett, llvm-commits Differential Revision: https://reviews.llvm.org/D45436 llvm-svn: 329781
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