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* [WebAssembly] Move CFG-changing passes before RegStackifyHeejin Ahn2019-01-081-8/+6
| | | | | | | | | | | | | | | | | | | Summary: FixIrreducibleControlFlow and LateEHPrepare both possibly modify CFG and create new registers. There seems to be no reason these passes go after register-related optimization passes (PrepareForLiveIntervals, OptimizeLiveIntervals, StoreResults, RegStackify, and RegColoring), and this also possibly create new optimization opportunities. I think we should put all current and future optimization passes before RegStackify (and related passes) unless there's a reason not to. Reviewers: kripken Subscribers: dschuff, sbc100, sunfish, jgravelle-google, llvm-commits Differential Revision: https://reviews.llvm.org/D56356 llvm-svn: 350596
* RegBankSelect: Fix copy insertion point for terminatorsMatt Arsenault2019-01-085-9/+246
| | | | | | | | | | | | | | | If a copy was needed to handle the condition of brcond, it was being inserted before the defining instruction. Add tests for iterator edge cases. I find the existing code here suspect for the case where it's looking for terminators that modify the register. It's going to insert a copy in the middle of the terminators, which isn't allowed (it might be necessary to have a COPY_terminator if anybody actually needs this). Also legalize brcond for AMDGPU. llvm-svn: 350595
* [WebAssembly] Use 'I' multiclass template for br_table (NFC)Heejin Ahn2019-01-081-22/+12
| | | | | | | | | | | | | | Summary: We don't need to explicitly use `NI` anymore because we now don't use `let` statements within the definitions. Reviewers: aardappel Subscribers: dschuff, sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D56376 llvm-svn: 350594
* AMDGPU/GlobalISel: Disallow VGPR->SCC copiesMatt Arsenault2019-01-085-10/+24
| | | | | | | This fixes using scalar adds when only the carry in is a VGPR using greedy regbankselect. llvm-svn: 350593
* AMDGPU/GlobalISel: RegBankSelect for carry-inMatt Arsenault2019-01-086-2/+628
| | | | | | | | I'm not sure we should be allowing the truncate to s1 for the inputs. It may be necessary to create a new VCC reg bank. llvm-svn: 350592
* [dsymutil] Fix assertion triggered by empty address range.Jonas Devlieghere2019-01-081-1/+5
| | | | | | | | | An assertion was hit when running dsymutil on a gcc generated binary that contained an empty address range. Address ranges are stored in an interval map of half open intervals. Since the interval is empty and therefore meaningless, we simply don't add it to the map. llvm-svn: 350591
* [asan] Support running without /procEvgeniy Stepanov2019-01-0814-27/+65
| | | | | | | | | | | | | | | | | | Summary: This patch lets ASan run when /proc is not accessible (ex. not mounted yet). It includes a special test-only flag that emulates this condition in an unpriviledged process. This only matters on Linux, where /proc is necessary to enumerate virtual memory mappings. Reviewers: vitalybuka, pcc, krytarowski Subscribers: kubamracek, llvm-commits Differential Revision: https://reviews.llvm.org/D56141 llvm-svn: 350590
* AMDGPU/GlobalISel: RegBankSelect for add/sub with carry outMatt Arsenault2019-01-086-5/+296
| | | | llvm-svn: 350589
* AMDGPU/GlobalISel: InstrMapping for G_UNMERGE_VALUESMatt Arsenault2019-01-082-0/+50
| | | | llvm-svn: 350588
* fix comment typo - NFCChen Zheng2019-01-081-1/+1
| | | | llvm-svn: 350587
* [RegisterCoalescer] dst register's live interval needs to be updated whenWei Mi2019-01-082-0/+70
| | | | | | | | | | | | | | | | | | | | | | | | merging a src register in ToBeUpdated set. This is to fix PR40061 related with https://reviews.llvm.org/rL339035. In https://reviews.llvm.org/rL339035, live interval of source pseudo register in rematerialized copy may be saved in ToBeUpdated set and its update may be postponed. In PR40061, %t2 = %t1 is rematerialized and %t1 is added into toBeUpdated set to postpone its live interval update. After the rematerialization, the live interval of %t1 is larger than necessary. Then %t1 is merged into %t3 and %t1 gets removed. After the merge, %t3 contains live interval larger than necessary. Because %t3 is not in toBeUpdated set, its live interval is not updated after register coalescing and it will break some assumption in regalloc. The patch requires the live interval of destination register in a merge to be updated if the source register is in ToBeUpdated. Differential revision: https://reviews.llvm.org/D55867 llvm-svn: 350586
* Split -Wdelete-non-virtual-dtor into -Wdelete-abstract-non-virtual-dtorErik Pilkington2019-01-083-1/+35
| | | | | | | | | | | | | | | -Wdelete-non-virtual-dtor previously controlled two diagnostics: 1) calling a non-virtual dtor from an abstract class, and 2) calling a non-virtual dtor from a polymorphic class. 1) is a lot more severe than 2), since 1) is a guaranteed crash, but 2) is just "code smell". Previously, projects compiled with -Wall -Wno-delete-non-virtual-dtor, which is somewhat reasonable, silently crashed on 1). rdar://40380564 Differential revision: https://reviews.llvm.org/D56405 llvm-svn: 350585
* ReleaseNotes: Update with my clang-query contributions this cycleStephen Kelly2019-01-081-1/+41
| | | | llvm-svn: 350584
* [libcxx] Optimize vectors construction of trivial types from an iterator ↵Volodymyr Sapsai2019-01-082-9/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | range with const-ness mismatch. We already have a specialization that will use memcpy for construction of trivial types from an iterator range like std::vector<int>(int *, int *); But if we have const-ness mismatch like std::vector<int>(const int *, const int *); we would use a slow path that copies each element individually. This change enables the optimal specialization for const-ness mismatch. Fixes PR37574. Contributions to the patch are made by Arthur O'Dwyer, Louis Dionne. rdar://problem/40485845 Reviewers: mclow.lists, EricWF, ldionne, scanon Reviewed By: ldionne Subscribers: christof, ldionne, howard.hinnant, cfe-commits Differential Revision: https://reviews.llvm.org/D48342 llvm-svn: 350583
* [dsymutil] Upstream unobfuscation logic.Jonas Devlieghere2019-01-0721-28/+601
| | | | | | | | | | The unobufscation support for BCSymbolMaps was the last piece of code that hasn't been upstreamed yet. This patch contains a reworked version of the existing code and relevant tests. Differential revision: https://reviews.llvm.org/D56346 llvm-svn: 350580
* [PGO] Use SourceFileName rather module name in PGOFuncNameRong Xu2019-01-075-17/+111
| | | | | | | | | | In LTO or Thin-lto mode (though linker plugin), the module names are of temp file names which are different for different compilations. Using SourceFileName avoids the issue. This should not change any functionality for current PGO as all the current callers of getPGOFuncName() is before LTO. llvm-svn: 350579
* [Verifier] Reject invalid type for DILocalVariable.Davide Italiano2019-01-073-1/+45
| | | | | | | | | | Reviewers: aprantl Subscribers: hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D56414 llvm-svn: 350578
* Simplify code.Adrian Prantl2019-01-071-2/+1
| | | | llvm-svn: 350577
* Clarify comment and variable names. (NFC)Adrian Prantl2019-01-071-5/+7
| | | | llvm-svn: 350576
* Rename DWARFDIE::GetDWOContext() -> GetDeclContext() (NFC)Adrian Prantl2019-01-074-5/+8
| | | | | | Despite the name, this function has nothing to do with the DWO format. llvm-svn: 350575
* NFC: Replace asserts with if() in SourceLocation accessorsStephen Kelly2019-01-073-13/+19
| | | | | | | | | | | | | | | | | | | Summary: Nowhere else in the AST classes assert on these kinds of accessors. This way, we can call the accessors and check the validity of the result instead of externally duplicating the conditions. This generality will make it possible to introspect instances for source locations: http://ec2-18-191-7-3.us-east-2.compute.amazonaws.com:10240/z/iiaWhw Reviewers: aaron.ballman Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D56354 llvm-svn: 350573
* Add a __has_feature check for namespaces on #pragma clang attribute.Erik Pilkington2019-01-073-1/+8
| | | | | | Support for this was added in r349845. llvm-svn: 350572
* [OPENMP]Add call to __kmpc_push_target_tripcount() function.Alexey Bataev2019-01-0712-4/+247
| | | | | | | | | | Each we create the target regions with the teams distribute inner region, we can better estimate number of the teams required to execute the target region. Function __kmpc_push_target_tripcount() is used for purpose, which accepts device_id and the number of the iterations, performed by the associated loop. llvm-svn: 350571
* [lldb] Fix -Wstring-plus-int warning in POSIX-DYLD/AuxVector.cppJorge Gorbe Moya2019-01-071-1/+1
| | | | llvm-svn: 350570
* [ValueTracking] Adjust comment in testMichael Ferguson2019-01-071-1/+2
| | | | | | Adjusts a comment in this test to verify commit access. llvm-svn: 350569
* Recommit r350555 "[X86] Use funnel shift intrinsics for the VBMI2 ↵Craig Topper2019-01-076-417/+407
| | | | | | | | vshld/vshrd builtins." The MSVC limit hit in AutoUpgrade.cpp has been worked around for now. llvm-svn: 350568
* Recommit r350554 "[X86] Remove AVX512VBMI2 concat and shift intrinsics. ↵Craig Topper2019-01-079-878/+1841
| | | | | | | | Replace with target independent funnel shift intrinsics." The MSVC limit we hit on AutoUpgrade.cpp has been worked around for now. llvm-svn: 350567
* [ObjectYAML] [COFF] Support multiple symbols with the same nameMartin Storsjo2019-01-075-3/+109
| | | | | | Differential Revision: https://reviews.llvm.org/D56294 llvm-svn: 350566
* cmake: Install libraries to DATADIR from GNUInstallDirsJan Vesely2019-01-072-7/+8
| | | | | | | | This moves default installation location to /usr/share to match libclc.pc. Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu> Reviewer: Tom Stellard llvm-svn: 350565
* [X86][AutoUpgrade] Make some tweaks to reduce the number of nested if/else ↵Craig Topper2019-01-071-96/+79
| | | | | | | | | | | | in the intrinsic upgrade code to avoid an MSVC compiler limit. MSVC has a nesting limit of around 110-130. An if/else if/else if counts against this next level. The autoupgrade code consists a long chain of these checking matches against strings. This commit moves some code to a helper function to move out a large if/else chain that was inside of one of the blocks into a separate function. There are more of these we could move or we could change some to lookup tables. I've also merged together a few similar blocks in the outer chain. This should buy us some margin for a little bit. llvm-svn: 350564
* Revert r350555 "[X86] Use funnel shift intrinsics for the VBMI2 vshld/vshrd ↵Craig Topper2019-01-076-407/+417
| | | | | | | | builtins." Had to revert the LLVM patch this depends on to fix a MSVC compiler limit in AutoUpgrade.cpp llvm-svn: 350563
* Revert r350554 "[X86] Remove AVX512VBMI2 concat and shift intrinsics. ↵Craig Topper2019-01-079-1841/+878
| | | | | | | | Replace with target independent funnel shift intrinsics." The AutoUpgrade.cpp if/else cascade hit an MSVC limit again. llvm-svn: 350562
* [MemorySSA] Add SkipSelfWalker.Alina Sbirlea2019-01-072-1/+52
| | | | | | | | | | | | Summary: Add implementation of SkipSelfWalker. Reviewers: george.burgess.iv Subscribers: sanjoy, jlebar, Prazek, llvm-commits Differential Revision: https://reviews.llvm.org/D56285 llvm-svn: 350561
* [TargetLowering][AMDGPU] Remove the SimplifyDemandedBits function that takes ↵Craig Topper2019-01-074-91/+53
| | | | | | | | | | | | | | a User and OpIdx. Stop using it in AMDGPU target for simplifyI24. As we saw in D56057 when we tried to use this function on X86, it's unsafe. It allows the operand node to have multiple users, but doesn't prevent recursing past the first node when it does have multiple users. This can cause other simplifications earlier in the graph without regard to what bits are needed by the other users of the first node. Ideally all we should do to the first node if it has multiple uses is bypass it when its not needed by the user we started from. Doing any other transformation that SimplifyDemandedBits can do like turning ZEXT/SEXT into AEXT would result in an increase in instructions. Fortunately, we already have a function that can do just that, GetDemandedBits. It will only make transformations that involve bypassing a node. This patch changes AMDGPU's simplifyI24, to use a combination of GetDemandedBits to handle the multiple use simplifications. And then uses the regular SimplifyDemandedBits on each operand to handle simplifications allowed when the operand only has a single use. Unfortunately, GetDemandedBits simplifies constants more aggressively than SimplifyDemandedBits. This caused the -7 constant in the changed test to be simplified to remove the upper bits. I had to modify computeKnownBits to account for this by ignoring the upper 8 bits of the input. Differential Revision: https://reviews.llvm.org/D56087 llvm-svn: 350560
* Split two sub-tests into separate top-level methods.Adrian Prantl2019-01-071-1/+7
| | | | llvm-svn: 350559
* [MemorySSA] Refactor CachingWalker.Alina Sbirlea2019-01-072-49/+97
| | | | | | | | | | | | | | Summary: Refactor caching walker to make creating a walker that skips the starting access strightforward. Reviewers: george.burgess.iv Subscribers: sanjoy, jlebar, Prazek, llvm-commits, jfb Differential Revision: https://reviews.llvm.org/D55957 llvm-svn: 350558
* Refactor test, no changes expected.Adrian Prantl2019-01-071-7/+4
| | | | llvm-svn: 350557
* [TSan] Support Objective-C @synchronized with tagged pointersJulian Lettner2019-01-072-19/+32
| | | | | | | | | | | | | | | | | | | Summary: Objective-C employs tagged pointers, that is, small objects/values may be encoded directly in the pointer bits. The resulting pointer is not backed by an allocation/does not point to a valid memory. TSan infrastructure requires a valid address for `Acquire/Release` and `Mutex{Lock/Unlock}`. This patch establishes such a mapping via a "dummy allocation" for each encountered tagged pointer value. Reviewers: dcoughlin, kubamracek, dvyukov, delcypher Reviewed By: dvyukov Subscribers: llvm-commits, #sanitizers Tags: #sanitizers Differential Revision: https://reviews.llvm.org/D56238 llvm-svn: 350556
* [X86] Use funnel shift intrinsics for the VBMI2 vshld/vshrd builtins.Craig Topper2019-01-076-417/+407
| | | | | | Differential Revision: https://reviews.llvm.org/D56365 llvm-svn: 350555
* [X86] Remove AVX512VBMI2 concat and shift intrinsics. Replace with target ↵Craig Topper2019-01-079-878/+1841
| | | | | | | | independent funnel shift intrinsics. Differential Revision: https://reviews.llvm.org/D56377 llvm-svn: 350554
* [ARM] ComputeKnownBits to handle extract vectorsDiogo N. Sampaio2019-01-072-23/+128
| | | | | | | | | This patch adds the sign/zero extension done by vgetlane to ARM computeKnownBitsForTargetNode. Differential revision: https://reviews.llvm.org/D56098 llvm-svn: 350553
* [MemorySSA] Extend the clobber walker with the option to skip the starting ↵Alina Sbirlea2019-01-071-8/+19
| | | | | | | | | | | | | | | | | | | access. Summary: The option enables loop transformations to hoist accesses that do not have clobbers in the loop. If the clobber queries skips the starting access, the result may be outside the loop instead of the header Phi. Adding the walker that uses this option in a separate patch. Reviewers: george.burgess.iv Subscribers: sanjoy, jlebar, Prazek, llvm-commits Differential Revision: https://reviews.llvm.org/D55944 llvm-svn: 350551
* Mark more tests as flakyEric Fiselier2019-01-075-0/+10
| | | | llvm-svn: 350550
* Revert "[DemandedBits] Use SetVector for Worklist"Nikita Popov2019-01-071-6/+7
| | | | | | | | This reverts commit r350547. Seeing assertion failures on clang tests. llvm-svn: 350549
* [X86] Add OR(AND(X,C),AND(Y,~C)) bit select testsSimon Pilgrim2019-01-071-0/+592
| | | | | | Based off work for D55935 llvm-svn: 350548
* [DemandedBits] Use SetVector for WorklistNikita Popov2019-01-071-7/+6
| | | | | | | | | | | | DemandedBits currently uses a simple vector for the worklist, which means that instructions may be inserted multiple times into it. Especially in combination with the deep lattice, this may cause instructions too be recomputed very often. To avoid this, switch to a SetVector. Differential Revision: https://reviews.llvm.org/D56362 llvm-svn: 350547
* Use the minidump exception record if presentLeonard Mosescu2019-01-078-16/+82
| | | | | | | | If the minidump contains a saved exception record use it automatically. Differential Revision: https://reviews.llvm.org/D56293 llvm-svn: 350546
* [elfabi] Add option to manually specify file read formatArmando Montanez2019-01-073-10/+62
| | | | | | Although llvm-elfabi will attempt to read input files without needing the format to be manually specified, doing so has the potential to introduce extraneous errors that can hinder debugging (since multiple readers may fail in attempts to read the file). This change allows the input file format to be manually specified to force elfabi to use a single reader. This makes it easier to test and debug errors specific to a given reader. llvm-svn: 350545
* [pstl] Avoid shadowing explicit lambda capture with lambda parameterLouis Dionne2019-01-071-24/+24
| | | | | | | | | | | | | | | Summary: Recent Clangs give an error for this. Note that the size of this diff is caused by running clang-format on the result of removing the captures. I guess we'll see how well that works for us. Reviewers: jfb, rodgert Subscribers: jkorous, dexonsmith, libcxx-commits, mclow.lists Differential Revision: https://reviews.llvm.org/D55945 llvm-svn: 350544
* Fine-tune and document the barrier in TestQueues.Adrian Prantl2019-01-071-10/+16
| | | | llvm-svn: 350543
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