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* [GlobalISel] Add G_XOR.Ahmed Bougacha2016-07-294-0/+36
| | | | llvm-svn: 277172
* [AArch64][GlobalISel] Select G_LOAD/G_STORE.Ahmed Bougacha2016-07-293-2/+168
| | | | | | | | | | Mostly straightforward as we ignore addressing modes and just use the base + unsigned immediate offset (always 0) variants. This currently fails to select extloads because we have yet to agree on a representation. llvm-svn: 277171
* [GlobalISel] Add LLT raw_ostream operator<< overload.Ahmed Bougacha2016-07-291-0/+5
| | | | | | Helpful when debugging; will be used in the following commit. llvm-svn: 277170
* MachinePipeliner pass that implements Swing Modulo SchedulingBrendon Cahoon2016-07-2921-7/+4583
| | | | | | | | | | | | | | | | | | | | | | | | Software pipelining is an optimization for improving ILP by overlapping loop iterations. Swing Modulo Scheduling (SMS) is an implementation of software pipelining that attempts to reduce register pressure and generate efficient pipelines with a low compile-time cost. This implementaion of SMS is a target-independent back-end pass. When enabled, the pass should run just prior to the register allocation pass, while the machine IR is in SSA form. If the pass is successful, then the original loop is replaced by the optimized loop. The optimized loop contains one or more prolog blocks, the pipelined kernel, and one or more epilog blocks. This pass is enabled for Hexagon only. To enable for other targets, a couple of target specific hooks must be implemented, and the pass needs to be called from the target's TargetMachine implementation. Differential Review: http://reviews.llvm.org/D16829 llvm-svn: 277169
* [Hexagon] Custom lower VECTOR_SHUFFLE and EXTRACT_SUBVECTOR for HVXKrzysztof Parzyszek2016-07-297-22/+631
| | | | | | | | | | | | | | | | If the mask of a vector shuffle has alternating odd or even numbers starting with 1 or 0 respectively up to the largest possible index for the given type in the given HVX mode (single of double) we can generate vpacko or vpacke instruction respectively. E.g. %42 = shufflevector <32 x i16> %37, <32 x i16> %41, <32 x i32> <i32 1, i32 3, ..., i32 63> is %42.h = vpacko(%41.w, %37.w) Patch by Pranav Bhandarkar. llvm-svn: 277168
* Initial vectorization support for svml calls (short vector math library).Matt Masten2016-07-294-3/+9
| | | | | | Differential Revision: https://reviews.llvm.org/D19544 llvm-svn: 277167
* Initial support for vectorization using svml (short vector math library).Matt Masten2016-07-293-3/+259
| | | | | | Differential Revision: https://reviews.llvm.org/D19544 llvm-svn: 277166
* [ELF] - Linkerscript: implemented SIZEOF(section)George Rimar2016-07-294-27/+108
| | | | | | | | | | | | | | | SIZEOF(section) Return the size in bytes of the named section, if that section has been allocated. SIZEOF(section) often used in scripts. Few examples from the wild: https://github.com/chipKIT32/pic32-Arduino-USB-Bootloader-original/blob/master/boot-linkerscript.ld https://github.com/devkitPro/buildscripts/blob/master/dkarm-eabi/crtls/gba_cart.ld Patch implements it. Differential revision: https://reviews.llvm.org/D22915 llvm-svn: 277165
* [GlobalISel] Auto-brief LowLevelType. NFC.Ahmed Bougacha2016-07-291-29/+25
| | | | llvm-svn: 277163
* [GlobalISel] Add LLT::operator!=().Ahmed Bougacha2016-07-292-1/+16
| | | | llvm-svn: 277162
* [GlobalISel] Fix LLT::unsized to match LLT(LabelTy).Ahmed Bougacha2016-07-292-1/+6
| | | | | | | | | When coming from an IR label type, we set a 0 NumElements, but not when constructing an LLT using unsized(), causing comparisons to fail. Pick one variant and fix the other. llvm-svn: 277161
* [GlobalISel] Add unittests for LowLevelType.Ahmed Bougacha2016-07-293-0/+200
| | | | llvm-svn: 277160
* Remove dead declaration.Rui Ueyama2016-07-291-1/+0
| | | | llvm-svn: 277159
* Reinstate optnone test for GVN Hoisting, removed in r276479.Paul Robinson2016-07-291-1/+2
| | | | llvm-svn: 277158
* Revert "updated Xcode project r277139"Todd Fiala2016-07-291-12/+0
| | | | | | | | | | This undoes my last commit. It collided with Pavel undoing his change that my previous commit was adjusting for in the Xcode file. This reverts commit f6f29cb7d7c56f96f21d9c115ecc66d652639df3. llvm-svn: 277157
* updated Xcode project r277139Todd Fiala2016-07-291-0/+12
| | | | llvm-svn: 277156
* [ASTMatcher] Add templateName matcher.Haojian Wu2016-07-296-0/+71
| | | | | | | | | | Reviewers: klimek Subscribers: klimek, cfe-commits Differential Revision: https://reviews.llvm.org/D22963 llvm-svn: 277155
* Revert "Rewrite gdb-remote's SendContinuePacketAndWaitForResponse"Pavel Labath2016-07-2915-1168/+895
| | | | | | | | This reverts commit r277139, because: - broken unittest on windows (likely typo on my part) - seems to break TestCallThatRestart (needs investigation) llvm-svn: 277154
* [ELF] - Linkerscript: Implemented SORT command.George Rimar2016-07-294-6/+108
| | | | | | | | | | | | When the SORT keyword is used, the linker will sort the files or sections into ascending order by name before placing them in the output file. It is used in FreeBSD script: https://svnweb.freebsd.org/base/head/sys/conf/ldscript.amd64?revision=284870&view=markup#l139 This is PR28689. Differential revision: https://reviews.llvm.org/D22749 llvm-svn: 277153
* Remove inline-comment-2.ll until I can debug why it fails on some buildsNirav Dave2016-07-291-23/+0
| | | | llvm-svn: 277152
* [Hexagon] Improve balancing of address calculationKrzysztof Parzyszek2016-07-292-3/+792
| | | | | | | | | Rebalances address calculation trees and applies Hexagon-specific optimizations to the trees to improve instruction selection. Patch by Tobias Edler von Koch. llvm-svn: 277151
* [ELF] - Linkerscript: make addSection() global function instead lambda. NFC.George Rimar2016-07-291-13/+16
| | | | llvm-svn: 277150
* Fix inline-comment-2.ll tripleNirav Dave2016-07-291-2/+3
| | | | llvm-svn: 277149
* Avoid unnecessary 32-bit to 64-bit zero extensions followingDavid L Kreitzer2016-07-292-8/+7
| | | | | | | | | 32-bit CMOV instructions on x86_64. The 32-bit CMOV implicitly zero extends. Differential Revision: https://reviews.llvm.org/D22941 llvm-svn: 277148
* [ELF] - Update comment. NFC.George Rimar2016-07-291-4/+1
| | | | llvm-svn: 277147
* [MC] When emitting output hash comments always use standard line comment ↵Nirav Dave2016-07-293-4/+27
| | | | | | seperator llvm-svn: 277146
* Fix license information in the file headerKrzysztof Parzyszek2016-07-291-2/+5
| | | | llvm-svn: 277145
* Add missing files to r277143Krzysztof Parzyszek2016-07-292-0/+213
| | | | llvm-svn: 277144
* [Hexagon] Implement DFA based hazard recognizerKrzysztof Parzyszek2016-07-292-3/+11
| | | | | | | | | | | The post register allocator scheduler can generate poor schedules because the scoreboard hazard recognizer is unable to identify hazards for Hexagon precisely. Instead, Hexagon should use a DFA based hazard recognizer. Patch by Brendon Cahoon. llvm-svn: 277143
* [ASTMatcher] Add hasTemplateArgument/hasAnyTemplateArgument support in ↵Haojian Wu2016-07-294-14/+121
| | | | | | | | | | | | functionDecl. Reviewers: klimek Subscribers: klimek, cfe-commits Differential Revision: https://reviews.llvm.org/D22957 llvm-svn: 277142
* Add missing '-no-canonical-prefixes' in test.Daniel Jasper2016-07-291-1/+1
| | | | llvm-svn: 277141
* Add/fix support for i386 elf core filesDimitar Vlahovski2016-07-296-28/+158
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: There were places in the code, assuming(hardcoding) offsets and types that were only valid for the x86_64 elf core file format. The NT_PRSTATUS and NT_PRPSINFO structures are with the 64 bit layout. I have reused them and parse i386 files manually, and fill them in the same struct. Also added some error handling during parsing that checks if the available bytes in the buffer are enough to fill the structures. The i386 core file test case now passes. For reference on the structures layout, I generally used the source of binutils (bfd, readelf) Bug: https://llvm.org/bugs/show_bug.cgi?id=26947 Reviewers: labath Subscribers: lldb-commits Differential Revision: https://reviews.llvm.org/D22917 llvm-svn: 277140
* Rewrite gdb-remote's SendContinuePacketAndWaitForResponsePavel Labath2016-07-2915-895/+1168
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SendContinuePacketAndWaitForResponse was huge function with very complex interactions with several other functions (SendAsyncSignal, SendInterrupt, SendPacket). This meant that making any changes to how packet sending functions and threads interact was very difficult and error-prone. This change does not add any functionality yet, it merely paves the way for future changes. In a follow-up, I plan to add the ability to have multiple query packets in flight (i.e., request,request,response,response instead of the usual request,response sequences) and use that to speed up qModuleInfo packet processing. Here, I introduce two special kinds of locks: ContinueLock, which is used by the continue thread, and Lock, which is used by everyone else. ContinueLock (atomically) sends a continue packet, and blocks any other async threads from accessing the connection. Other threads create an instance of the Lock object when they want to access the connection. This object, while in scope prevents the continue from being send. Optionally, it can also interrupt the process to gain access to the connection for async processing. Most of the syncrhonization logic is encapsulated within these two classes. Some of it still had to bleed over into the SendContinuePacketAndWaitForResponse, but the function is still much more manageable than before -- partly because of most of the work is done in the ContinueLock class, and partly because I have factored out a lot of the packet processing code separate functions (this also makes the functionality more easily testable). Most importantly, there is none of syncrhonization code in the async thread users -- as far as they are concerned, they just need to declare a Lock object, and they are good to go (SendPacketAndWaitForResponse is now a very thin wrapper around the NoLock version of the function, whereas previously it had over 100 lines of synchronization code). This will make my follow up changes there easy. I have written a number of unit tests for the new code and I have ran the test suite on linux and osx with no regressions. Subscribers: tberghammer Differential Revision: https://reviews.llvm.org/D22629 llvm-svn: 277139
* Make test not fail on hosts where the default omp library is gomp.Benjamin Kramer2016-07-291-1/+1
| | | | | | | This is the case on some linuxes, just force libomp so we get the desired results. llvm-svn: 277138
* tsan: Enable 48-bit VMA support on aarch64Adhemerval Zanella2016-07-294-42/+85
| | | | | | | | | | | | | | | | | | This patch adds 48-bits VMA support for tsan on aarch64. As current mappings for aarch64, 48-bit VMA also supports PIE executable. This limits the mapping mechanism because the PIE address bits (usually 0aaaaXXXXXXXX) makes it harder to create a mask/xor value to include all memory regions. I think it is possible to create a large application VAM range by either dropping PIE support or tune current range. It also changes slight the way addresses are packed in SyncVar structure: previously it assumes x86_64 as the maximum VMA range. Since ID is 14 bits wide, shifting 48 bits should be ok. Tested on x86_64, ppc64le and aarch64 (39 and 48 bits VMA). llvm-svn: 277137
* Re-commit: [mips][fastisel] Handle 0-4 arguments without SelectionDAG.Daniel Sanders2016-07-2925-52/+208
| | | | | | | | | | | | | | | | | | | | | | Summary: Implements fastLowerArguments() to avoid the need to fall back on SelectionDAG for 0-4 argument functions that don't do tricky things like passing double in a pair of i32's. This allows us to move all except one test to -fast-isel-abort=3. The remaining one has function prototypes of the form 'i32 (i32, double, double)' which requires floats to be passed in GPR's. The previous commit had an uninitialized variable that caused the incoming argument region to have undefined size. This has been fixed. Reviewers: sdardis Subscribers: dsanders, llvm-commits, sdardis Differential Revision: https://reviews.llvm.org/D22680 llvm-svn: 277136
* Cleanup TransferDbgValuesNirav Dave2016-07-291-2/+9
| | | | | | | | | | | | | | | [DAG] Check debug values for invalidation before transferring and mark old debug values invalid when transferring to another SDValue. This fixes PR28613. Reviewers: jyknight, hans, dblaikie, echristo Subscribers: yaron.keren, ismail, llvm-commits Differential Revision: https://reviews.llvm.org/D22858 llvm-svn: 277135
* [GCC] Support for __final specifierAndrey Bokhanko2016-07-296-2/+32
| | | | | | | | | | | | | | As reported in bug 28473, GCC supports "final" functionality in pre-C++11 code using the __final keyword. Clang currently supports the "final" keyword in accordance with the C++11 specification, however it ALSO supports it in pre-C++11 mode, with a warning. This patch adds the "__final" keyword for compatibility with GCC in GCC Keywords mode (so it is enabled with existing flags), and issues a warning on its usage (suggesting switching to the C++11 keyword). This patch also adds a regression test for the functionality described. I believe this patch has minimal impact, as it simply adds a new keyword for existing behavior. This has been validated with check-clang to avoid regressions. Patch is created in reference to revisions 276665. Patch by Erich Keane. Differential Revision: https://reviews.llvm.org/D22919 llvm-svn: 277134
* Fixup r277011 - wrong use of infinite timeoutPavel Labath2016-07-291-1/+1
| | | | | | | The commit accidentally switched a timed wait on a condition variable into an infinite timeout. Change that back. Android tests were timeing out without this. llvm-svn: 277133
* [X86][SSE] Optimize the truncation of vector comparison results with PACKSSSimon Pilgrim2016-07-293-729/+475
| | | | | | | | | | | | We currently default to using either generic shuffles or MASK+PACKUS/PACKSS to truncate all integer vectors. For vector comparisons, we know that the result will be either all or zero bits in every element, which can be efficiently truncated by directly using PACKSS to repeatedly halve the size of each element. Due to the limited input values (-1 or 0) we don't need to account for vector element size, so for simplicity we just use the PACKSS(vXi16,vXi16) implementation in all cases. Additionally for AVX2 PACKSS of 256bit data we must perform a PERMQ shuffle to reorder the data into the correct order. I did investigate performing a single shuffle after all the PACKSS calls but the need to cross 128bit lanes makes this difficult to achieve efficiently. We avoid performing this on AVX512 as it should have better alternative truncation instructions. Differential Revision: https://reviews.llvm.org/D22814 llvm-svn: 277132
* [clang-rename] speedup RenamingActionKirill Bobyrev2016-07-293-32/+28
| | | | | | | | | | | | The complexity of renaming a USR is O(N) [N stands for number of nodes in Translation Unit]. In some cases there are more than one USR for a single symbol (see overridden functions and ctor/dtor handling), which means that the complexity of finding all of the corresponding USRs is O(N * M) [M stands for number of USRs corresponding to the symbols, which may be not quite small]. With a simple tweak we can make it O(N * log(M)) by passing whole list of USRs corresponding to the symbol to USRLocFinder. llvm-svn: 277131
* Fixed MSVC out of range shift warningSimon Pilgrim2016-07-291-1/+1
| | | | llvm-svn: 277130
* Fix for commit rL277126 that broke a build.Sjoerd Meijer2016-07-291-1/+1
| | | | llvm-svn: 277129
* [Thumb] Emit Thumb move in both Thumb modes for struct_byval predicatesPrakhar Bahuguna2016-07-292-4/+34
| | | | | | | | | | | | | | | | | Summary: The MOV/MOVT instructions being chosen for struct_byval predicates was conditional only on Thumb2, resulting in an ARM MOV/MOVT instruction being incorrectly emitted in Thumb1 mode. This is especially apparent with v8-m.base targets. This patch ensures that Thumb instructions are emitted in both Thumb modes. Reviewers: rengolin, t.p.northover Subscribers: llvm-commits, aemerson, rengolin Differential Revision: https://reviews.llvm.org/D22865 llvm-svn: 277128
* [lanai] Update for Target API (TargetRegistry::RegisterMCAsmBackend) changeJacques Pienaar2016-07-292-5/+7
| | | | llvm-svn: 277127
* TargetInstrInfo: add virtual function getInstSizeInBytesSjoerd Meijer2016-07-299-8/+14
| | | | | | | | | This adds a target hook getInstSizeInBytes to TargetInstrInfo that a lot of subclasses already implement. Differential Revision: https://reviews.llvm.org/D22885 llvm-svn: 277126
* Improve code of loading plugins that provide cmndsAbhishek Aggarwal2016-07-292-1/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: - Modified code that enables writing new user-defined commands and use them through LLDB CLI. Modifications are: -- Define the 'syntax' for each user-defined command --- Added an argument in SBCommandInterpreter::AddCommand() and SBCommand::AddCommand() API --- Allow passing syntax for each user-defined command --- Earlier, only 'help' could be defined and passed for commands -- Passed 'number of arguments' entered on CLI for user-defined commands --- Added an argument (number of options) in SBCommandPluginInterface::DoExecute() API to know the number of arguments passed for commands -- In CommandPluginInterfaceImplementation class: --- Make the data member m_backend a shared_ptr --- Avoids memory leaks of dynamically allocated SBCommandPluginInterface instances created in lldb::PluginInitialize() API Signed-off-by: Abhishek Aggarwal <abhishek.a.aggarwal@intel.com> Reviewers: jingham, granata.enrico, clayborg Subscribers: labath, lldb-commits Differential Revision: https://reviews.llvm.org/D22863 llvm-svn: 277125
* [compiler-rt][XRay] Address follow-up comments to initial interface and ↵Dean Michael Berris2016-07-293-24/+54
| | | | | | | | | | | | | | | | | | initialisation code This addresses some comments from D21612, which contains the following changes: - Update __xray_patch() and __xray_unpatch() API documentation to not imply asynchrony. - Introduce a scope cleanup mechanism to make sure we can roll-back changes to the XRayPatching global atomic. - Introduce a few more comments for potential extension points for other platforms (for the implementation details of patching and un-patching). Reviewers: eugenis, rnk, kcc, echristo, majnemer Subscribers: llvm-commits, mehdi_amini Differential Revision: https://reviews.llvm.org/D22911 llvm-svn: 277124
* PlatformDarwinKernel maintains a list of kexts and kernelsJason Molenda2016-07-292-12/+148
| | | | | | | | | | | | | | | | | | | | | | | that it finds on the local computer in "well known" locations when we start up the darwin-kernel platform. It did not distinguish between kexts/kernels with dSYMs from others - when it needed a kernel/kext with a given UUID, it would grab the first one it finds. This change separates these into two vectors -- a collection of kexts and kernels with dSYMs next t othem, and a collection of kexts and kernels without dSYMs. When we have a bundle ID and uuid to search for, we first try the collections with dSYMs, and if that fails, then we try the collections that did not have dSYMs next to them. Often times we'll have a situation where a kext will be installed in multiple locations on a system, but only one of them will have a dSYM next to it, where the dev just copied it to a local directory. This fixes that problem, giving precedence to those binaries with debug information. llvm-svn: 277123
* Remove `continue` at end of a for-loop.Rui Ueyama2016-07-291-3/+1
| | | | llvm-svn: 277122
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