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* Implement support for vector operands to inline asm, implementingChris Lattner2007-03-251-4/+16
| | | | | | CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll llvm-svn: 35332
* new testcaseChris Lattner2007-03-251-0/+11
| | | | llvm-svn: 35331
* add a noteChris Lattner2007-03-251-0/+13
| | | | llvm-svn: 35330
* Fix CodeGen/PowerPC/2007-03-24-cntlzd.llChris Lattner2007-03-251-1/+4
| | | | llvm-svn: 35329
* test that the ppc backend can do 64-bit cntlzChris Lattner2007-03-251-0/+13
| | | | llvm-svn: 35328
* implement initial support for the silly X constraint. Testcase here: ↵Chris Lattner2007-03-251-0/+2
| | | | | | CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll llvm-svn: 35327
* new testcaseChris Lattner2007-03-251-0/+9
| | | | llvm-svn: 35326
* Make more uses of getHighBitsSet and get rid of some pointless & of anReid Spencer2007-03-251-12/+12
| | | | | | APInt with its type mask. llvm-svn: 35325
* Implement CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.llChris Lattner2007-03-251-1/+4
| | | | llvm-svn: 35324
* new testcaseChris Lattner2007-03-251-0/+11
| | | | llvm-svn: 35323
* switch TargetLowering::getConstraintType to take the entire constraint,Chris Lattner2007-03-2511-68/+82
| | | | | | not just the first letter. No functionality change. llvm-svn: 35322
* More APIntification:Reid Spencer2007-03-251-24/+24
| | | | | | | | | | | | | | | * Convert the last use of a uint64_t that should have been an APInt. * Change ComputeMaskedBits to have a const reference argument for the Mask so that recursions don't cause unneeded temporaries. This causes temps to be needed in other places (where the mask has to change) but this change optimizes for the recursion which is more frequent. * Remove two instances of &ing a Mask with getAllOnesValue. Its not needed any more because APInt is accurate in its bit computations. * Start using the getLowBitsSet and getHighBits set methods on APInt instead of shifting. This makes it more clear in the code what is going on. llvm-svn: 35321
* Allow the b/h/w/k constraints to be applied to values that have multiple ↵Chris Lattner2007-03-251-1/+4
| | | | | | alternatives, and end up not being registers. llvm-svn: 35320
* enforce the proper range for the i386 N constraint.Chris Lattner2007-03-251-8/+9
| | | | llvm-svn: 35319
* Fix test/CodeGen/X86/2007-03-24-InlineAsmPModifier.llChris Lattner2007-03-251-0/+4
| | | | llvm-svn: 35318
* new testcaseChris Lattner2007-03-251-0/+10
| | | | llvm-svn: 35317
* Fix a typo in a comment.Reid Spencer2007-03-251-1/+1
| | | | llvm-svn: 35316
* Actually, for getHighBitsSet and getLowBitsSet, don't make a 0 bit sizeReid Spencer2007-03-251-2/+6
| | | | | | | | illegal. Instead do the 0 valued construction for the user. This is because the caller may not know (or care to check) that the number of bits set is zero. llvm-svn: 35315
* fix a regression on vector or instructions.Chris Lattner2007-03-241-9/+9
| | | | llvm-svn: 35314
* Make it illegal to set 0 bits in getHighBitsSet and getLowBitsSet. For thatReid Spencer2007-03-241-0/+2
| | | | | | | | they should have used the uint64_t constructor. This avoids causing undefined results via shifts by the word size when the bit width is an exact multiple of the word size. llvm-svn: 35313
* In the getBitsSet function, don't optimize for a common case that isReid Spencer2007-03-241-4/+2
| | | | | | | | | already covered by getLowBitsSet (i.e. when loBits==0). Consequently, remove the default value for loBits and reorder the arguments to the more natural loBits, hiBits order. This makes it more clear that this function is for bit groups in the middle of the bit width and not towards one end or the other. llvm-svn: 35312
* Don't invoke undefined behavior in shifts in the functions getHighBitsSetReid Spencer2007-03-241-6/+6
| | | | | | and getLowBitsSet. llvm-svn: 35311
* Implement the getBitsSet function.Reid Spencer2007-03-241-1/+10
| | | | llvm-svn: 35310
* Remove the last vestiges of this directory.Reid Spencer2007-03-242-6/+0
| | | | llvm-svn: 35309
* Implement the getHighBitsSet and getLowBitsSet functions.Reid Spencer2007-03-241-2/+16
| | | | llvm-svn: 35308
* Get the signs in the right place!Reid Spencer2007-03-241-1/+1
| | | | llvm-svn: 35307
* Fix a link.Reid Spencer2007-03-241-1/+1
| | | | llvm-svn: 35306
* Undo the last change and make this really implement remainder and notReid Spencer2007-03-241-4/+6
| | | | | | | modulus. The previous change was a result of incorrect documentation in the LangRef.html. llvm-svn: 35305
* Flip the srem tests around. Previous commit was to correct an apparentReid Spencer2007-03-247-11/+11
| | | | | | | bug in the srem implementation. Turns out it was a documentation bug instead. llvm-svn: 35304
* Correct the description of srem. remainder follows the dividend not theReid Spencer2007-03-241-4/+6
| | | | | | divisor! llvm-svn: 35303
* Correct the implementation of srem to be remainder, not modulus. The sign ofReid Spencer2007-03-241-2/+2
| | | | | | the result must follow the sign of the divisor. llvm-svn: 35302
* Fix incorrect test cases for srem. The definition of srem is a remainder soReid Spencer2007-03-2413-9/+19
| | | | | | that the sign of the result follows the sign of the divisor. llvm-svn: 35301
* Clean up this interface:Reid Spencer2007-03-241-313/+458
| | | | | | | | | | 1. Group similar methods into doxygen groups 2. Reorganize the groups into a consist flow. 3. Significantly improve the quality of the documentation on several methods 4. Rewrite srem and sdiv to eliminate a copy and improve readability. 5. Eliminate unneeded forward references. llvm-svn: 35300
* don't rely on ADLChris Lattner2007-03-241-1/+1
| | | | llvm-svn: 35299
* add a valuetype for v1i64, which is needed by mmx.Chris Lattner2007-03-243-27/+37
| | | | llvm-svn: 35298
* Make some codes more efficient.Zhou Sheng2007-03-241-15/+17
| | | | llvm-svn: 35297
* add a bad case evan though of.Chris Lattner2007-03-241-0/+32
| | | | llvm-svn: 35296
* For PR1205:Reid Spencer2007-03-241-12/+11
| | | | | | | Convert some calls to ConstantInt::getZExtValue() into getValue() and use APInt facilities in the subsequent computations. llvm-svn: 35294
* Adjust offset to compensate for big endian machines.Evan Cheng2007-03-241-7/+5
| | | | llvm-svn: 35293
* Autodetect MMX & SSE stuff for AMD processorsAnton Korobeynikov2007-03-231-10/+11
| | | | llvm-svn: 35292
* This is dead. DEAD I tells you!!Bill Wendling2007-03-231-3/+0
| | | | llvm-svn: 35291
* PR1260:Bill Wendling2007-03-232-6/+26
| | | | | | Add final support to get the QT example to compile. llvm-svn: 35290
* Make sure SEXTLOAD of the specific type is supported on the target.Evan Cheng2007-03-231-0/+4
| | | | llvm-svn: 35289
* Add more test cases for APIntified InstCombine.Reid Spencer2007-03-233-0/+255
| | | | llvm-svn: 35288
* For PR1205:Reid Spencer2007-03-231-762/+37
| | | | | | | | | | | | * APIntify visitAdd and visitSelectInst * Remove unused uint64_t versions of utility functions that have been replaced with APInt versions. This completes most of the changes for APIntification of InstCombine. This passes llvm-test and llvm/test/Transforms/InstCombine/APInt. Patch by Zhou Sheng. llvm-svn: 35287
* Also replace uses of SRL if that's also folded during ReduceLoadWidth().Evan Cheng2007-03-231-1/+8
| | | | llvm-svn: 35286
* Add test case for testing InstCombine with arbitrary precision integerReid Spencer2007-03-2330-0/+974
| | | | | | | | | types. These tests mimic the integer test cases in the normal InstCombine test suite but use "strange" integer bit widths. Most tests written by Zhou Sheng, a few by me. llvm-svn: 35284
* For PR1205:Reid Spencer2007-03-231-25/+22
| | | | | | | | APIntify visitDiv, visitMul and visitRem. Patch by Zhou Sheng. llvm-svn: 35283
* switch AddReachableCodeToWorklist from being recursive to being iterative.Chris Lattner2007-03-231-46/+54
| | | | llvm-svn: 35282
* For PR1205:Reid Spencer2007-03-231-37/+39
| | | | | | | | | APIntify several utility functions supporting logical operators and shift operators. Patch by Zhou Sheng. llvm-svn: 35281
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