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* [X86] Lower the cost of avx512 horizontal bool and/or reductions to ↵Craig Topper2019-11-043-42/+63
| | | | | | | | | | | | | | | | | 2*log2(bitwidth)+1 for legal types. This better represents the kshift+binop we'd get for each stage before the final extract. Its likely we'll do even better by doing a kmov and a cmp with a GPR, but this is a good start. The default handling was costing a worst case single source permute shuffle of the vector before the binop. This worst case assumes the shuffle might have to be emulated with extracts and inserts. But since we know we're doing a reduction we can assume we'll get kshift lowering. There's still some room for improvement here, but this is much better than it was.
* [IR] Add Freeze instructionaqjune2019-11-0525-135/+242
| | | | | | | | | | | | | | | | | | Summary: - Define Instruction::Freeze, let it be UnaryOperator - Add support for freeze to LLLexer/LLParser/BitcodeReader/BitcodeWriter The format is `%x = freeze <ty> %v` - Add support for freeze instruction to llvm-c interface. - Add m_Freeze in PatternMatch. - Erase freeze when lowering IR to SelDag. Reviewers: deadalnix, hfinkel, efriedma, lebedev.ri, nlopes, jdoerfert, regehr, filcab, delcypher, whitequark Reviewed By: lebedev.ri, jdoerfert Subscribers: jfb, kristof.beyls, hiraditya, lebedev.ri, steven_wu, dexonsmith, xbolva00, delcypher, spatel, regehr, trentxintong, vsk, filcab, nlopes, mehdi_amini, deadalnix, llvm-commits Differential Revision: https://reviews.llvm.org/D29011
* [BPF] fix a use after free bugYonghong Song2019-11-041-2/+8
| | | | | | | | | | | | | | Commit fff2721286e1 ("[BPF] Fix CO-RE bugs with bitfields") fixed CO-RE handling bitfield issues. But the implementation introduced a use after free bug. The "Base" of the intrinsic might be freed so later on accessing the Type of "Base" might access the freed memory. The failed test case, CodeGen/BPF/CORE/offset-reloc-middle-chain.ll is exactly used to test such a case. Similarly to previous attempt to remember Metadata etc, remember "Base" pointee Alignment in advance to avoid such use after free bug.
* [X86] Teach X86MCInstLower to swap operands of commutable instructions to ↵Craig Topper2019-11-0430-233/+279
| | | | | | | | | | | | | | | | | | | | | | | | | | enable 2-byte VEX encoding. Summary: The 2 source operands commutable instructions are encoded in the VEX.VVVV field and the r/m field of the MODRM byte plus the VEX.B field. The VEX.B field is missing from the 2-byte VEX encoding. If the VEX.VVVV source is 0-7 and the other register is 8-15 we can swap them to avoid needing the VEX.B field. This works as long as the VEX.W, VEX.mmmmm, and VEX.X fields are also not needed. Fixes PR36706. Reviewers: RKSimon, spatel Reviewed By: RKSimon Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D68550
* [analyzer] Require darwin for scan-build testsDevin Coughlin2019-11-045-4/+6
| | | | | Let's at least get some coverage from these tests. We can generalize to other platforms later.
* [analyzer] Fixup scan-build tests for non-Darwin platforms.Devin Coughlin2019-11-045-1/+8
| | | | | This is a fix to 0aba69eb1a01c44185009f50cc633e3c648e9950 to address failing bots.
* Fix clone_constant_impl to correctly deal with null pointersaqjune2019-11-052-0/+8
| | | | | | | | | | | | | | | | | | | | | Summary: This patch resolves llvm-c-test's following error ``` LLVM ERROR: LLVMGetValueKind returned incorrect type ``` which arises when the input bitcode contains a null pointer. Reviewers: jdoerfert, CodaFi, deadalnix Reviewed By: jdoerfert Subscribers: llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D68928
* [analyzer] Add test directory for scan-build.Devin Coughlin2019-11-0410-1/+143
| | | | | | | | | | The static analyzer's scan-build script is critical infrastructure but is not well tested. To start to address this, add a new test directory under tests/Analysis for scan-build lit tests and seed it with several tests. The goal is that future scan-build changes will be accompanied by corresponding tests. Differential Revision: https://reviews.llvm.org/D69781
* [CUDA][HIP] Disable emitting llvm.linker.options in device compilationYaxun (Sam) Liu2019-11-043-4/+42
| | | | | | | The linker options (e.g. pragma detect_mismatch) are intended for host compilation only, therefore disable it for device compilation. Differential Revision: https://reviews.llvm.org/D57829
* [BPF] Fix CO-RE bugs with bitfieldsYonghong Song2019-11-043-38/+284
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | bitfield handling is not robust with current implementation. I have seen two issues as described below. Issue 1: struct s { long long f1; char f2; char b1:1; } *p; The current approach will generate an access bit size 56 (from b1 to the end of structure) which will be rejected as it is not power of 2. Issue 2: struct s { char f1; char b1:3; char b2:5; char b3:6: char b4:2; char f2; }; The LLVM will group 4 bitfields together with 2 bytes. But loading 2 bytes is not correct as it violates alignment requirement. Note that sometimes, LLVM breaks a large bitfield groups into multiple groups, but not in this case. To resolve the above two issues, this patch takes a different approach. The alignment for the structure is used to construct the offset of the bitfield access. The bitfield incurred memory access is an aligned memory access with alignment/size equal to the alignment of the structure. This also simplified the code. This may not be the optimal memory access in terms of memory access width. But this should be okay since extracting the bitfield value will have the same amount of work regardless of what kind of memory access width. Differential Revision: https://reviews.llvm.org/D69837
* Optimize std::midpoint for integersJorg Brown2019-11-041-10/+7
| | | | | | | | | | | | | | Same idea as the current algorithm, that is, add (half of the difference between a and b) to a. But we use a different technique for computing the difference: we compute b - a into a pair of integers that are named "sign_bit" and "diff". We have to use a pair because subtracting two 32-bit integers produces a 33-bit result. Computing half of that is a simple matter of shifting diff right by 1, and adding sign_bit shifted left by 31. llvm knows how to do that with one instruction: shld. The only tricky part is that if the difference is odd and negative, then shifting it by one isn't the same as dividing it by two - shifting a negative one produces a negative one, for example. So there's one more adjustment: if the sign bit and the low bit of diff are one, we add one. For a demonstration of the codegen difference, see https://godbolt.org/z/7ar3K9 , which also has a built-in test. Differential Revision: https://reviews.llvm.org/D69459
* [cmake] Add an option to skip stripping before installVedant Kumar2019-11-042-7/+10
| | | | | | The swift build system has support for cross-compiling, installing, and generating symbols for lldb. As the swift symbol-generation step occurs after installation, we need to disable stripping during the install.
* build: explicitly set the linker language for unwindSaleem Abdulrasool2019-11-041-0/+2
| | | | | | The unwinder should not depend on libc++. In fact, we do not end up with a link against libc++ as we do not have a dependency on libc++ at runtime. This ensures that we link with `clang` rather than `clang++`.
* [CGDebugInfo] Emit subprograms for decls when AT_tail_call is understoodVedant Kumar2019-11-044-10/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, clang emits subprograms for declared functions when the target debugger or DWARF standard is known to support entry values (DW_OP_entry_value & the GNU equivalent). Treat DW_AT_tail_call the same way to allow debuggers to follow cross-TU tail calls. Pre-patch debug session with a cross-TU tail call: ``` * frame #0: 0x0000000100000fa4 main`target at b.c:4:3 [opt] frame #1: 0x0000000100000f99 main`main at a.c:8:10 [opt] ``` Post-patch (note that the tail-calling frame, "helper", is visible): ``` * frame #0: 0x0000000100000fa4 main`target at b.c:4:3 [opt] frame #1: 0x0000000100000f80 main`helper [opt] [artificial] frame #2: 0x0000000100000f99 main`main at a.c:8:10 [opt] ``` rdar://46577651 Differential Revision: https://reviews.llvm.org/D69743
* Test commit: adds a . to comment. NFCRon Lieberman2019-11-041-1/+1
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* [AArch64] Update for ExynosEvandro Menezes2019-11-041-2/+4
| | | | Fix the costs of integer division.
* Add more binutils tools to LLVM_INSTALL_TOOLCHAIN_ONLY targetSam Clegg2019-11-041-0/+16
| | | | | | | | Also add the aliases for these tools so that LLVM_INSTALL_BINUTILS_SYMLINKS and LLVM_INSTALL_TOOLCHAIN_ONLY can work together. Differential Revision: https://reviews.llvm.org/D69635
* [AST][NFC] Fixes a comment typoMark de Wever2019-11-041-1/+1
| | | | Also a test for commit access.
* [AMDGPU] Added assert in SIFoldOperands before ptr use. NFC.Stanislav Mekhanoshin2019-11-041-0/+1
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* [OPENMP][DOCS]Update list of implemented features, NFC.Alexey Bataev2019-11-041-2/+2
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* Add release notes for commit ccc4d83cda16bea1d9dfd0967dc7d2cfb24b8e75.James Y Knight2019-11-041-1/+43
| | | | | (Which was "[ObjC] Diagnose implicit type coercion from ObjC 'Class' to object pointer types.")
* [OPENMP50]Support for imperfectly nested loops.Alexey Bataev2019-11-047-55/+246
| | | | Added support for imperfectly nested loops introduced in OpenMP 5.0.
* [LLDB][Python] remove ArgInfo::countLawrence D'Anna2019-11-045-88/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This patch updates the last user of ArgInfo::count and deletes it. I also delete `GetNumInitArguments()` and `GetInitArgInfo()`. Classess are callables and `GetArgInfo()` should work on them. On python 3 it already works, of course. `inspect` is good. On python 2 we have to add yet another special case. But hey if python 2 wasn't crufty we wouln't need python 3. I also delete `is_bound_method` becuase it is unused. This path is tested in `TestStepScripted.py` Reviewers: labath, mgorny, JDevlieghere Reviewed By: labath, JDevlieghere Subscribers: lldb-commits Tags: #lldb Differential Revision: https://reviews.llvm.org/D69742
* [AMDGPU] deduplicate tablegen predicatesStanislav Mekhanoshin2019-11-0411-38/+46
| | | | | | | | | | | | | | | We are duplicating predicates if several parts of the combined predicate list contain the same condition. Added code to deduplicate the list. We have AssemblerPredicates and AssemblerPredicate in the PredicateControl, but we never use AssemblerPredicates with an actual list, so this one is dropped. This addresses the first part of the llvm bug 43886: https://bugs.llvm.org/show_bug.cgi?id=43886 Differential Revision: https://reviews.llvm.org/D69815
* [demangle] NFC: get rid of NodeOrStringErik Pilkington2019-11-045-137/+38
| | | | | | This class was a bit overengineered, and was triggering some PVS warnings. Instead, put strings into a NameType and let clients unconditionally treat it as a Node.
* Remove unused variables, as suggested by @mcgov.Alexandre Ganea2019-11-041-3/+0
| | | | Fixes warning: unused variable 'XXX' [-Wunused-const-variable]
* Fix warning: format specifies type 'unsigned long' but the argument has type ↵Alexandre Ganea2019-11-041-0/+4
| | | | 'unsigned long long' [-Wformat]
* clang/Modules: Bring back optimization lost in 31e14f41a21fDuncan P. N. Exon Smith2019-11-042-5/+9
| | | | | | 31e14f41a21f9016050a20f07d5da03db2e8c13e accidentally dropped caching of failed module loads. This brings it back by making ModuleMap::getCachedModuleLoad return an Optional.
* [X86] Add support for -mvzeroupper and -mno-vzeroupper to match gccCraig Topper2019-11-049-111/+141
| | | | | | | | | | | | | | | | | -mvzeroupper will force the vzeroupper insertion pass to run on CPUs that normally wouldn't. -mno-vzeroupper disables it on CPUs where it normally runs. To support this with the default feature handling in clang, we need a vzeroupper feature flag in X86.td. Since this flag has the opposite polarity of the fast-partial-ymm-or-zmm-write we used to use to disable the pass, we now need to add this new flag to every CPU except KNL/KNM and BTVER2 to keep identical behavior. Remove -fast-partial-ymm-or-zmm-write which is no longer used. Differential Revision: https://reviews.llvm.org/D69786
* [SimplifyCFG] Use a (trivially) dominanting widenable branch to remove later ↵Philip Reames2019-11-042-0/+364
| | | | | | | | | | slow path blocks This transformation is a variation on the GuardWidening transformation we have checked in as it's own pass. Instead of focusing on merge (i.e. hoisting and simplifying) two widenable branches, this transform makes the observation that simply removing a second slowpath block (by reusing an existing one) is often a very useful canonicalization. This may lead to later merging, or may not. This is a useful generalization when the intermediate block has loads whose dereferenceability is hard to establish. As noted in the patch, this can be generalized further, and will be. Differential Revision: https://reviews.llvm.org/D69689
* [DAGCombine][MSP430] use shift amount threshold in DAGCombine (2/2)Sanjay Patel2019-11-042-83/+77
| | | | | | | | | | | | | | | | | Continuation of: D69116 Contributes to a fix for PR43559: https://bugs.llvm.org/show_bug.cgi?id=43559 See also D69099 and D69116 Use the TLI hook in DAGCombine.cpp to guard against creating shift nodes that are not optimal for a target. Patch by: @joanlluch (Joan LLuch) Differential Revision: https://reviews.llvm.org/D69120
* [lldb] [Process/NetBSD] Add register info for missing register setsMichał Górny2019-11-044-4/+64
| | | | | | | | | | | | | | | | | | | | | | Add info for all register sets supported in NetBSD, particularly for all registers 'expected' by LLDB. This is necessary in order to fix python_api/lldbutil/iter/TestRegistersIterator.py test that currently fails due to missing names of register sets (None). This copies fpreg descriptions from Linux, and combines Linux' AVX and MPX registers into a single XState group, to fit NetBSD register group design. Technically, we do not support MPX registers at the moment but gdb-remote insists on passing their errors anyway, and if we do not include it in any group, they end up in a separate anonymous group that breaks the test. While at it, swap the enums for XState and DBRegs to match register set ordering. This also adds a few consts to the lldb-x86-register-enums.h to provide more consistency between user registers and debug registers. Differential Revision: https://reviews.llvm.org/D69667
* [lit] Move measurement of testing time out of Run.executeJulian Lettner2019-11-042-10/+8
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* [lit] Better/earlier errors when no tests are executedJulian Lettner2019-11-044-9/+29
| | | | Fail early, when we discover no tests at all, or filter out all of them.
* [ms] Fix Microsoft compatibility handling of commas in nested macro expansions.Eric Astor2019-11-042-10/+31
| | | | | | | | | | | | | | | | | | | In Microsoft-compatibility mode, single commas from nested macro expansions should not be considered as argument separators; we already emulated this by marking them to be ignored. However, in MSVC's preprocessor, subsequent expansions DO treat these commas as argument separators... so we now ignore each comma at most once. Includes a small unit test that validates we match MSVC's behavior as shown in https://gcc.godbolt.org/z/y0twaq Fixes PR43282 Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D69626
* [X86] Fix uninitialized variable warnings. NFCI.Simon Pilgrim2019-11-0410-42/+42
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* VirtualFileSystem - fix uninitialized variable warnings. NFCI.Simon Pilgrim2019-11-041-2/+2
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* createMCObjectStreamer - fix uninitialized variable warning. NFCI.Simon Pilgrim2019-11-041-1/+1
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* MCDwarfFile::DirIndex - fix uninitialized variable warning. NFCI.Simon Pilgrim2019-11-041-1/+1
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* gn build: Merge 40d0d4e2335LLVM GN Syncbot2019-11-041-0/+1
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* Fix static analysis warnings in ARM calling convention loweringOliver Stannard2019-11-041-22/+22
| | | | Fixes https://bugs.llvm.org/show_bug.cgi?id=43891
* Lower generic MASSV entries to PowerPC subtarget-specific entriesJinsong Ji2019-11-047-3/+816
| | | | | | | | | | | | | | | | | | | | | This patch (second of two patches) lowers the generic PowerPC vector entries to PowerPC subtarget-specific entries. For instance, the PowerPC generic entry 'cbrtd2_massv' is lowered to 'cbrtd2_P9' or Power9 subtarget. The first patch enables the vectorizer to recognize the IBM MASS vector library routines. This patch specifically adds support for recognizing the '-vector-library=MASSV' option, and defines mappings from IEEE standard scalar math functions to generic PowerPC MASS vector counterparts. For instance, the generic PowerPC MASS vector entry for double-precision 'cbrt' function is '__cbrtd2_massv' The overall support for MASS vector library is presented as such in two patches for ease of review. Patch by pjeeva01 (Jeeva P.) Differential Revision: https://reviews.llvm.org/D59883
* Recommit "[CodeView] Add option to disable inline line tables."Amy Huang2019-11-0410-11/+184
| | | | | | | | | | | | This reverts commit 004ed2b0d1b86d424643ffc88fce20ad8bab6804. Original commit hash 6d03890384517919a3ba7fe4c35535425f278f89 Summary: This adds a clang option to disable inline line tables. When it is used, the inliner uses the call site as the location of the inlined function instead of marking it as an inline location with the function location. https://reviews.llvm.org/D67723
* ELF: Discard .ARM.exidx sections for empty functions instead of misordering ↵Peter Collingbourne2019-11-042-5/+44
| | | | | | | | | | | | | | | them. The logic added in r372781 caused ARMExidxSyntheticSection::addSection() to return false for exidx sections without a link order dep that passed isValidExidxSectionDep(). This included exidx sections for empty functions. As a result, such exidx sections would end up treated like ordinary sections and would end up being laid out before the ARMExidxSyntheticSection, most likely in the wrong order relative to the exidx entries in the ARMExidxSyntheticSection, breaking the orderedness invariant relied upon by unwinders. Fix this by simply discarding such sections. Differential Revision: https://reviews.llvm.org/D69744
* [FPEnv][SelectionDAG] Refactor strict FP node constructionUlrich Weigand2019-11-041-23/+23
| | | | | | | | | | | Small refactoring in visitConstrainedFPIntrinsic that should make it easier to create DAG nodes requiring extra arguments. That is the case currently only for STRICT_FP_ROUND, but may be the case for additional nodes (in particular compares) in the future. Extracted from the patch for D69281. NFC.
* [Sema] Make helper in TreeTransform.h 'inline' instead of 'static'. NFCIlya Biryukov2019-11-041-1/+1
| | | | | | | | | | | | | | | | | Summary: There seems to be no evidence that having internal linkage for the function was intentional. Since 'static' functions are normally used only in .cpp files, using 'inline' in the header file is more appropriate. Reviewers: Anastasia Reviewed By: Anastasia Subscribers: merge_guards_bot, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D69242
* Fix buildbots troubled by b7b170c.Jonas Paulsson2019-11-043-0/+3
| | | | Add '# REQUIRES: systemz-registered-target' in the new tests.
* [SLP]Fix PR43799: Crash on different sizes of GEP indices.Alexey Bataev2019-11-042-2/+45
| | | | | | | | | | | | | | | Summary: If the GEP instructions are going to be vectorized, the indices in those GEP instructions must be of the same type. Otherwise, the compiler may crash when trying to build the vector constant. Reviewers: RKSimon, spatel Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69627
* [X86] Convert ShrinkMode to scoped enum class. NFCI.Simon Pilgrim2019-11-041-11/+15
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* AliasSetTracker - fix uninitialized variable warnings. NFCI.Simon Pilgrim2019-11-041-2/+2
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