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* [ubsan] Fix a faulty memory accessibility checkVedant Kumar2017-06-154-3/+62
| | | | | | | | | | | | | The dynamic type check needs to inspect vtables, but could crash if it encounters a vtable pointer to inaccessible memory. In the first attempt to fix the issue (r304437), we performed a memory accessibility check on the wrong range of memory. This should *really* fix the problem. Patch by Max Moroz! Differential Revision: https://reviews.llvm.org/D34215 llvm-svn: 305489
* Fold variable into assert.Benjamin Kramer2017-06-151-2/+1
| | | | | | Silences an unused variable warning in Release builds. llvm-svn: 305488
* [InstCombine] Handle (iszero(A & K1) | iszero(A & K2)) -> (A & (K1 | K2)) != ↵Craig Topper2017-06-152-29/+18
| | | | | | | | | | | | (K1 | K2) when the one of the Ands is commuted relative to the other Currently we expect A to be on the same side in both Ands but nothing guarantees that. While there also switch to using matchers for some of the code. Differential Revision: https://reviews.llvm.org/D34230 llvm-svn: 305487
* Silence warning with assertions disabled.Peter Collingbourne2017-06-151-0/+1
| | | | llvm-svn: 305485
* ISel: Fix FastISel of swifterror valuesArnold Schwaighofer2017-06-157-14/+300
| | | | | | | | | | | | The code assumed that we process instructions in basic block order. FastISel processes instructions in reverse basic block order. We need to pre-assign virtual registers before selecting otherwise we get def-use relationships wrong. This only affects code with swifterror registers. rdar://32659327 llvm-svn: 305484
* [BasicAA] Add test case that goes with r305481.Craig Topper2017-06-151-0/+53
| | | | | | Forgot to 'git add' the file. llvm-svn: 305483
* Apply summary-based dead stripping to regular LTO modules with summaries.Peter Collingbourne2017-06-1512-116/+260
| | | | | | | | | | | | | | | If a regular LTO module has a summary index, then instead of linking it into the combined regular LTO module right away, add it to the combined summary index and associate it with a special module that represents the combined regular LTO module. Any such modules are linked during LTO::run(), at which time we use the results of summary-based dead stripping to control whether to link prevailing symbols. Differential Revision: https://reviews.llvm.org/D33922 llvm-svn: 305482
* [BasicAA] Don't call isKnownNonEqual if we might be have gone through a PHINode.Craig Topper2017-06-151-4/+18
| | | | | | | | | | | | This is a fix for the test case in PR32314. Basic Alias Analysis can ask if two nodes are known non-equal after looking through a phi node to find a GEP. isAddOfNonZero saw an add of a constant from the same phi and said that its output couldn't be equal. But Basic Alias Analysis was really asking about the value from the previous loop iteration. This patch at least makes that case not happen anymore, I'm not sure if there were still other ways this can fail. As was discussed in the bug, it looks like fixing BasicAA would be difficult so this patch seemed like a possible workaround Differential Revision: https://reviews.llvm.org/D33136 llvm-svn: 305481
* [analyzer]: Improve test handling with multiple constraint managersDominic Chen2017-06-151-8/+23
| | | | | | | | | | | | Summary: Modify the test infrastructure to properly handle tests that require z3, and merge together the output of all tests on success. This is required for D28954. Reviewers: dcoughlin, zaks.anna, NoQ, xazax.hun Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D33308 llvm-svn: 305480
* [PowerPC] fix potential verification errors on CFENCE8Hiroshi Inoue2017-06-154-13/+13
| | | | | | | | This patch fixes a potential verification error (64-bit register operands for cmpw) with -verify-machineinstrs. Differential Revision: https://reviews.llvm.org/D34208 llvm-svn: 305479
* [mips] Fix documentation of member variable. NFCI.Simon Dardis2017-06-151-1/+1
| | | | llvm-svn: 305478
* [DAG] As StoreMerge now generates only legal nodes remove unecessary guard ↵Nirav Dave2017-06-151-4/+2
| | | | | | when run post-legalization NFCI. llvm-svn: 305477
* Remove trailing whitespace. NFCI.Simon Pilgrim2017-06-151-1/+1
| | | | llvm-svn: 305476
* [Doc] Document prof metadata in LangRefTeresa Johnson2017-06-152-0/+80
| | | | | | | | | | | | | | Summary: Points to existing documentation for branch_weights and function_entry_count, and adds an example for VP value profile metadata. Reviewers: davidxl, reames Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D34218 llvm-svn: 305475
* [InstCombine] auto-generate complete checks; NFCSanjay Patel2017-06-151-50/+106
| | | | llvm-svn: 305474
* [DAG] Defer Pre/Post IndexStore merge to after mergestore. NFCI.Nirav Dave2017-06-151-4/+4
| | | | | | | | In preparation for doing storemerge post-legalization, reorder visitSTORE passes to move pre/post-index combining after store merge. Reordered passes other than store merge are unaffected. llvm-svn: 305473
* [X86][AVX2] Fix issue in lowerV8I16GeneralSingleInputVectorShuffle that was ↵Simon Pilgrim2017-06-152-3/+22
| | | | | | | | | | assuming v8i16 vectors We can use this with v16i16/v32i16 as well. Found during fuzz testing. llvm-svn: 305472
* [AArch64] Add indexed check to splitStores. NFC.Nirav Dave2017-06-151-1/+1
| | | | | | | Add explicit check for unhandled cases in preparation for delaying splitStores to post-legalization. llvm-svn: 305471
* Revert r305465: [X86][AVX512] Improve lowering of AVX512 compare intrinsics ↵Simon Pilgrim2017-06-156-14205/+75
| | | | | | | | (remove redundant shift left+right instructions). This is causing windows buildbot failures llvm-svn: 305470
* Add missing include to __bsd_locale_fallbacks.h. Fixes ↵Marshall Clow2017-06-151-0/+1
| | | | | | https://bugs.llvm.org/show_bug.cgi?id=33370 llvm-svn: 305469
* [DAG] Allow truncated and extend memory operations in Store Merge. NFCI.Nirav Dave2017-06-151-10/+21
| | | | | | | | As all store merges checks are based on the memory operation performed, allow use of truncated stores and extended loads as valid input candidates for merging. llvm-svn: 305468
* [DAG] Make MergeStores generate legalized stores. NFCI.Nirav Dave2017-06-151-4/+21
| | | | | | | Realized merged stores as truncstores if store will be realized as such by legalization. llvm-svn: 305467
* [DAG] Use correct size for truncated store merge of load. NFCI.Nirav Dave2017-06-151-2/+2
| | | | | | | Avoid non-legal memory ops by checking correct size when merging stores of loads into a extload-truncstore pair. llvm-svn: 305466
* [X86][AVX512] Improve lowering of AVX512 compare intrinsics (remove ↵Ayman Musa2017-06-156-75/+14205
| | | | | | | | | | | | | | | redundant shift left+right instructions). AVX512 compare instructions return v*i1 types. In cases where the number of elements in the returned value are less than 8, clang adds zeroes to get a mask of v8i1 type. Later on it's replaced with CONCAT_VECTORS, which then is lowered to many DAG nodes including insert/extract element and shift right/left nodes. The fact that AVX512 compare instructions put the result in a k register and zeroes all its upper bits allows us to remove the extra nodes simply by copying the result to the required register class. When lowering, identify these cases and transform them into an INSERT_SUBVECTOR node (marked legal), then catch this pattern in instructions selection phase and transform it into one avx512 cmp instruction. Differential Revision: https://reviews.llvm.org/D33188 llvm-svn: 305465
* [Docs] Add a catch-all file to document workflow & tricks.Siddharth Bhat2017-06-152-0/+40
| | | | | | | | - Write about `bugpoint` and `git-svn` for now. Differential Revision: https://reviews.llvm.org/D34147 llvm-svn: 305464
* [ScalarEvolution] Apply Depth limit to getMulExprMax Kazantsev2017-06-154-71/+148
| | | | | | | | | | | | | | | | | | | | | This is a fix for PR33292 that shows a case of extremely long compilation of a single .c file with clang, with most time spent within SCEV. We have a mechanism of limiting recursion depth for getAddExpr to avoid long analysis in SCEV. However, there are calls from getAddExpr to getMulExpr and back that do not propagate the info about depth. As result of this, a chain getAddExpr -> ... .> getAddExpr -> getMulExpr -> getAddExpr -> ... -> getAddExpr can be extremely long, with every segment of getAddExpr's being up to max depth long. This leads either to long compilation or crash by stack overflow. We face this situation while analyzing big SCEVs in the test of PR33292. This patch applies the same limit on max expression depth for getAddExpr and getMulExpr. Differential Revision: https://reviews.llvm.org/D33984 llvm-svn: 305463
* Add llvm::Error assignment operator to Status classPavel Labath2017-06-153-6/+15
| | | | | | This enables writing "status = std::move(some_llvm_error)". llvm-svn: 305462
* [swig] Improve the native module import logicPavel Labath2017-06-151-1/+7
| | | | | | | | | | | | | | | The simple module import logic was not sufficient for our distribution model of lldb, which is without the _lldb.pyd file (normally that would be a symlink to the shared library, but symlinks are not really a thing on windows). With the older swigs it worked (loading of the python scripting machinery from within lldb) because the normal swig import logic contained a last-ditch import of a global module _lldb (which is defined when you run python from lldb). Add back the last-ditch import to our custom import logic as well. llvm-svn: 305461
* Revert "Load lazily the template specialization in multi-module setups."Vassil Vassilev2017-06-151-47/+38
| | | | | | This broke our libcxx modules builds. llvm-svn: 305460
* [ARM] GlobalISel: Add support for i32 moduloDiana Picus2017-06-155-17/+186
| | | | | | | | | | | | | | | | | | Add support for modulo for targets that have hardware division and for those that don't. When hardware division is not available, we have to choose the correct libcall to use. This is generally straightforward, except for AEABI. The AEABI variant is trickier than the other libcalls because it returns { quotient, remainder }, instead of just one value like the other libcalls that we've seen so far. Therefore, we need to use custom lowering for it. However, we don't want to have too much special code, so we refactor the target-independent code in the legalizer by adding a helper for replacing an instruction with a libcall. This helper is used by the legalizer itself when dealing with simple calls, and also by the custom ARM legalization for the more complicated AEABI divmod calls. llvm-svn: 305459
* [ARM] GlobalISel: Lower only homogeneous struct argsDiana Picus2017-06-153-189/+69
| | | | | | | | | | | | | Lowering mixed struct args, params and returns used G_INSERT, which is a bit more convoluted to support through the entire pipeline. Since they don't occur that often in practice, it's probably wiser to leave them out until later. Meanwhile, we can lower homogeneous structs using G_MERGE_VALUES, which has good support in the legalizer. These occur e.g. as the return of __aeabi_idivmod, so it's nice to be able to support them. llvm-svn: 305458
* [AArch64] Enable FeatureFuseAES for the generic processor model.Florian Hahn2017-06-152-36/+42
| | | | | | | | | | | | | | | | | | | | | | | Summary: Scheduling AESE/AESMC and AESD/AESIMC instruction pairs back-to-back gives a double digit speedup on benchmarks using those instructions on Cortex-A processors. In GCC, this optimization is part of the generic processor model as well. This change should not have a major performance impact on processors that do not optimize AES instruction pairs, although I only had access to Cortex-A processors for benchmarking. Reviewers: rengolin, kristof.beyls, javed.absar, evandro, silviu.baranga, MatzeB, mcrosier, joelkevinjones, joel_k_jones, bmakam, t.p.northover Reviewed By: evandro Subscribers: sbaranga, aemerson, llvm-commits Differential Revision: https://reviews.llvm.org/D33836 llvm-svn: 305457
* Revert "Define _GNU_SOURCE for rtems c++"Daniel Jasper2017-06-152-4/+0
| | | | | | | | | | | | | | | | | This reverts commit r305399. This breaks a build in libcxx: libcxx/src/system_error.cpp:90:16: error: assigning to 'int' from incompatible type 'char *' if ((ret = ::strerror_r(ev, buffer, strerror_buff_size)) != 0) { ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 1 error generated. Which makes sense according to: https://linux.die.net/man/3/strerror_r Not entirely sure how this needs to be fixed. llvm-svn: 305456
* [mips][microMIPS] Extending size reduction pass with ADDIUSP and ADDIUR1SPZoran Jovanovic2017-06-152-12/+114
| | | | | | | | | | | | Author: milena.vujosevic.janicic Reviewers: sdardis The patch extends size reduction pass for MicroMIPS. The following instructions are examined and transformed, if possible: ADDIU instruction is transformed into 16-bit instruction ADDIUSP ADDIU instruction is transformed into 16-bit instruction ADDIUR1SP Differential Revision: https://reviews.llvm.org/D33887 llvm-svn: 305455
* [clangd] Add priority to completion item sort textKrasimir Georgiev2017-06-153-16/+27
| | | | | | | | | | | | | | | | | | Summary: This patch adds the priority of a completion item to the sort text of the returned LSP result. Reviewers: ilya-biryukov Reviewed By: ilya-biryukov Subscribers: cfe-commits Tags: #clang-tools-extra Differential Revision: https://reviews.llvm.org/D34137 llvm-svn: 305454
* Renamed some of the newly added tests. No functional changeMarshall Clow2017-06-156-0/+0
| | | | llvm-svn: 305453
* [ELF] Mark symbols referenced from linker script as livePetr Hosek2017-06-152-0/+18
| | | | | | | | | This is necessary to ensure that sections containing symbols referenced from linker scripts (e.g. in data commands) don't get GC'd. Differential Revision: https://reviews.llvm.org/D34195 llvm-svn: 305452
* attempt to fix GCC ToT build failuresEric Fiselier2017-06-151-1/+1
| | | | llvm-svn: 305451
* Correct documentation about the AfterClass clang-format optionEric Fiselier2017-06-151-5/+5
| | | | llvm-svn: 305450
* [formatv] Add the ability to specify a fill character when aligning.Zachary Turner2017-06-153-11/+24
| | | | | | | | | Previously if you used fmt_align(7, Center) you would get the output ' 7 '. It may be desirable for the user to specify the fill character though, for example producing '---7---'. This patch adds that. llvm-svn: 305449
* Fix another test with modules enabledEric Fiselier2017-06-151-0/+1
| | | | llvm-svn: 305448
* remove incorrectly committed assertionEric Fiselier2017-06-151-1/+0
| | | | llvm-svn: 305447
* Add hack to get --param=enable_modules=true working with a __config_site headerEric Fiselier2017-06-151-3/+17
| | | | llvm-svn: 305446
* Fix test when modules are enabledEric Fiselier2017-06-151-0/+1
| | | | llvm-svn: 305445
* [ELF] Initial migration of AVR targetLeslie Zhai2017-06-154-0/+53
| | | | | | | | | | Reviewers: ruiu, rafael, grimar, atanasyan, psmith, dylanmckay Reviewed By: ruiu, rafael, grimar, dylanmckay Differential Revision: https://reviews.llvm.org/D32991 llvm-svn: 305444
* Move external instantiation for __vector_base_common to vector.cppEric Fiselier2017-06-153-2/+17
| | | | | | | | Previously the explicit instantiation for this was in locale.cpp, but that didn't make much sense. This patch creates a new vector.cpp source file to contain the explicit instantiation. llvm-svn: 305442
* Change how LocateDSYMInVincinityOfExecutable strips off pathJason Molenda2017-06-1511-32/+332
| | | | | | | | | | | | | | | | | | components to not depend on "." characters in the fileanme (e.g. "Foundation.framework") but instead to just use path separators. The names of the files themselves may have dots in them ("com.apple.sbd") which would break the old scheme. Also add a test case for this (macosx/find-dsym/bundle-with-dot-in-filename) as well as a test case for r304520 (macosx/find-dsym/deep-bundle) which needed a similar setup to test correctly on a single machine. (both of these are really testing remote debug session situations where the binary can't be found on the system where lldb is running, complicating the test case a bit.) <rdar://problem/31825940> llvm-svn: 305441
* [ODRHash] Hash TemplateArgument::Pack and TemplateTypeParmTypeRichard Trieu2017-06-152-0/+52
| | | | llvm-svn: 305440
* [Basic] Use a static_assert instead of using the old array of size -1 trick.Craig Topper2017-06-151-1/+1
| | | | llvm-svn: 305439
* [InstCombine] Add a test case to show a case where don't handle a partially ↵Craig Topper2017-06-151-0/+27
| | | | | | commuted IR. NFC llvm-svn: 305438
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