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* The patch set unroll disable pragma when unrollEvgeny Stupachenko2016-06-082-11/+36
| | | | | | | | | | | | | | | | | with user specified count has been applied. Summary: Previously SetLoopAlreadyUnrolled() set the disable pragma only if there was some loop metadata. Now it set the pragma in all cases. This helps to prevent multiple unroll when -unroll-count=N is given. Reviewers: mzolotukhin Differential Revision: http://reviews.llvm.org/D20765 From: Evgeny Stupachenko <evstupac@gmail.com> llvm-svn: 272195
* [PM] Refector LoopAccessInfo analysis code Xinliang David Li2016-06-087-37/+62
| | | | | | | | This is the preparation patch to port the analysis to new PM Differential Revision: http://reviews.llvm.org/D20560 llvm-svn: 272194
* [InstCombine] reduce indent; NFCSanjay Patel2016-06-081-63/+64
| | | | llvm-svn: 272193
* [MemCpyOpt] Do not exchange llvm.lifetime.start and llvm.memcpyTim Shen2016-06-082-0/+30
| | | | | | | | | | Reviewers: iteratee Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D21087 llvm-svn: 272192
* [InstCombine] use copyIRFlags() ; NFCISanjay Patel2016-06-081-12/+2
| | | | llvm-svn: 272191
* Apply most suggestions of clang-tidy's performance-unnecessary-value-paramBenjamin Kramer2016-06-0848-108/+108
| | | | | | | Avoids unnecessary copies. All changes audited & pass tests with asan. No functional change intended. llvm-svn: 272190
* Add a test for the failure described by pr28055. Mark it as xfail.Jim Ingham2016-06-082-0/+68
| | | | llvm-svn: 272189
* clang-rename: implement renaming of classes inside dynamic_castMiklos Vajna2016-06-082-13/+46
| | | | | | | | | | Refactor to do the same as what is done already for static_cast. Reviewers: klimek Differential Revision: http://reviews.llvm.org/D21120 llvm-svn: 272188
* Generate codeview for array type metadata.Adrian McCarthy2016-06-083-0/+157
| | | | | | Differential Revision: http://reviews.llvm.org/D21107 llvm-svn: 272187
* [CodeView] Remove manual expansion of the default copy ctor.Benjamin Kramer2016-06-081-10/+0
| | | | | | | It provides nothing over the default one but makes the class not trivially copyable. No functionality change intended. llvm-svn: 272186
* Specify target in lifetime-asan test.Vitaly Buka2016-06-081-3/+2
| | | | | | | | | | | | Summary: Some target platforms -fsanitize=address. Reviewers: pcc, eugenis Subscribers: cfe-commits, christof, chapuni, kubabrecka Differential Revision: http://reviews.llvm.org/D21117 llvm-svn: 272185
* Attempt #2 to appease the buildbots.George Burgess IV2016-06-081-3/+3
| | | | | | | MSVC calls the copy ctor on StratifiedSets for some reason. So, undelete it. llvm-svn: 272184
* [codeview] Avoid emitting an empty file checksum tableReid Kleckner2016-06-082-0/+18
| | | | | | | | | | Again, the Microsoft linker does not like empty substreams. We still emit an empty string table if CodeView is enabled, but that doesn't cause problems because it always contains at least one null byte. llvm-svn: 272183
* [SCEV] Break out of loop if there is no more work to doSanjoy Das2016-06-081-1/+1
| | | | | | | This is NFC as far as externally visible behavior is concerned, but will keep us from spinning in the worklist traversal algorithm unnecessarily. llvm-svn: 272182
* [SCEV] Track no-abnormal-exits instead of no-throw callsSanjoy Das2016-06-083-12/+36
| | | | | | | | | | | Absence of may-unwind calls is not enough to guarantee that a UB-generating use of an add-rec poison in the loop latch will actually cause UB. We also need to guard against calls that terminate the thread or infinite loop themselves. This partially addresses PR28012. llvm-svn: 272181
* Teach isGuarantdToTransferExecToSuccessor about debug info intrinsicsSanjoy Das2016-06-082-3/+81
| | | | | | Calls to `@llvm.dbg.*` can be assumed to terminate. llvm-svn: 272180
* Fix a bug in SCEV's poison value propagationSanjoy Das2016-06-082-12/+49
| | | | | | | | | | | | | The worklist algorithm introduced in rL271151 didn't check to see if the direct users of the post-inc add recurrence propagates poison. This change fixes the problem and makes the code structure more obvious. Note for release managers: correctness wise, this bug wasn't a regression introduced by rL271151 -- the behavior of SCEV around post-inc add recurrences was strictly improved (in terms of correctness) in rL271151. llvm-svn: 272179
* [RegBankSelect] Silence an unused variable warning in release mode.Quentin Colombet2016-06-081-0/+1
| | | | llvm-svn: 272177
* [RegBankSelect] Comment on how we could improve repairing with copies.Quentin Colombet2016-06-081-0/+11
| | | | | | | | | | | When repairing with a copy, instead of accounting for the cost of that copy and actually inserting it, we may be able to use an alternative source for the register to repair and just use it. Make sure this is documented, so that we consider that opportunity at some point. llvm-svn: 272176
* [esan|wset] Reduce flakiness in samples testDerek Bruening2016-06-081-5/+5
| | | | | | | Generalizes the workingset-samples test to pass when a sample has a size of 0, which can happen on a loaded machine. llvm-svn: 272175
* [pdb] Fix build errors in PDB unit tests.Zachary Turner2016-06-081-8/+15
| | | | llvm-svn: 272174
* Try to appease buildbots.George Burgess IV2016-06-081-3/+8
| | | | | | | r272064 apparently made them angry. This undoes some changes made in r272064 (defaulting move ctors) to make them happy again. llvm-svn: 272173
* [pdb] Handle stream index errors better.Zachary Turner2016-06-0818-236/+336
| | | | | | | Reviewed By: ruiu Differential Revision: http://reviews.llvm.org/D21128 llvm-svn: 272172
* Remove a patch .rej file.Rui Ueyama2016-06-081-11/+0
| | | | llvm-svn: 272171
* [AArch64][RegisterBankInfo] G_OR are fine on either GPR or FPR.Quentin Colombet2016-06-083-1/+166
| | | | | | | | | | Teach AArch64RegisterBankInfo that G_OR can be mapped on either GPR or FPR for 64-bit or 32-bit values. Add test cases demonstrating how this information is used to coalesce a computation on a single register bank. llvm-svn: 272170
* [RegBankSelect] Use RegisterBankInfo applyMapping method.Quentin Colombet2016-06-081-11/+8
| | | | | | | The RegBankSelect pass can now rely on the target to do the remapping of the instructions. llvm-svn: 272169
* [NFC] "#include <ciso646>" is unnecessary, because "and", "or" were replacedRoman Gareev2016-06-081-1/+0
| | | | | | by "&&", "||". llvm-svn: 272168
* [profile] Hide some external symbols in InstrProfData.incVedant Kumar2016-06-082-17/+31
| | | | | | Differential Revision: http://reviews.llvm.org/D21116 llvm-svn: 272167
* [ProfileData] Update llvm's copy of InstrProfData.incVedant Kumar2016-06-081-19/+31
| | | | | | | The new version of the header introduces the INSTR_PROF_VISIBILITY macro. See http://reviews.llvm.org/D21116 for more details. llvm-svn: 272166
* [RegisterBankInfo] Implement the method to apply a mapping.Quentin Colombet2016-06-082-0/+61
| | | | | | | | | Now, the target will be able to provide its how implementation to remap an instruction. This open the way to crazier optimizations, but to beginning with, we will be able to handle something else than the default mapping. llvm-svn: 272165
* [RegBankSelect] Use the OperandMapper class to hold remap information.Quentin Colombet2016-06-081-10/+8
| | | | | | | | | Now that we have an entity that hold the remap information the rewritting should be easier to do. No functional changes. llvm-svn: 272164
* [RegBankSelect] Use const_iterator instead of iterator for repairReg.Quentin Colombet2016-06-082-5/+6
| | | | | | | The repairing code has no reason to change the source or destination of the registers. llvm-svn: 272163
* [profile] Pass extra build flags (feature enabling macros) to Darwin buildXinliang David Li2016-06-082-2/+1
| | | | | | Differential Revision: http://reviews.llvm.org/D21119 llvm-svn: 272162
* [RegisterBankInfo] Introduce OperandsMapper class.Quentin Colombet2016-06-082-0/+170
| | | | | | | This helper class is used to encapsulate the necessary information to remap an instruction. llvm-svn: 272161
* [Target] Introduce a generic opcode for bitwise OR: G_OR.Quentin Colombet2016-06-085-7/+25
| | | | | | This G_OR is used in GlobalISel to represent bitwise OR. llvm-svn: 272160
* [Sema] Don't permit catching variably modified typesDavid Majnemer2016-06-083-0/+21
| | | | | | | | Variably modified types shouldn't be permitted in catch clauses. This fixes PR28047. llvm-svn: 272159
* [RegBankSelect] Introduce a command line option to override the running mode.Quentin Colombet2016-06-081-0/+14
| | | | | | | | | | When the command line option is set, it overrides any thing that the target may have set. The rationale is that we get what we asked for. Options are respectively regbankselect-fast and regbankselect-greedy for fast and greedy mode. llvm-svn: 272158
* [RegBankSelect] Explain what it would take to support non-copyQuentin Colombet2016-06-081-0/+9
| | | | | | | | | | | repairing. Copies are easy because we repair only when there is a mismatch. For non-copy repairing, i.e., cases that involves breaking down or gathering up the value, one of the operand may not have a register bank yet. Thus, derivate a cost from that, requires more work. llvm-svn: 272157
* Prune away some unused using decls. NFC.Benjamin Kramer2016-06-085-13/+0
| | | | | | Found by clang's misc-unused-using-decls. llvm-svn: 272156
* [clang-tidy] misc-argument-comment: don't bail out when an argument is a ↵Alexander Kornienko2016-06-083-13/+16
| | | | | | | | macro expansion (e.g. NULL). Add CHECK-FIX tests. llvm-svn: 272155
* [ARM] MSR instructions implicitly set CPSROliver Stannard2016-06-083-0/+59
| | | | | | | | | | | | | | | The MSR instructions can write to the CPSR, but we did not model this fact, so we could emit them in the middle of IT blocks, changing the condition flags for later instructions in the block. The tests use two calls to llvm.write_register.i32 because it is valid to use these instructions at the end of an IT block, which if conversion does do in some cases. With two calls, the first clobbers the flags, so a branch has to be used to make the second one conditional. Differential Revision: http://reviews.llvm.org/D21139 llvm-svn: 272154
* [OpenCL] Fix __builtin_astype for vec3 types.Yaxun Liu2016-06-083-38/+117
| | | | | | | | __builtin_astype does not generate correct LLVM IR for vec3 types. This patch inserts bitcasts to/from vec4 when necessary in addition to generating vector shuffle. Sema and codegen tests are added. Differential Revision: http://reviews.llvm.org/D20133 llvm-svn: 272153
* [include-fixer] Keep dot dot in SymbolInfo file paths.Haojian Wu2016-06-084-8/+13
| | | | | | | | | | | | | | | | | | Summary: Currently, removing dot dot in header's path doesn't make include-fixer minimize path correctly in some cases, for example, specify a relative search path based on the build directory("-I../include/"). Besides, removing dot dot can break symbolic link directories. So don't removing it for now. Reviewers: ioeric, bkramer Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D21132 llvm-svn: 272152
* [include-fixer] explicitly set minimize-paths in test.Eric Liu2016-06-081-1/+1
| | | | llvm-svn: 272151
* Patch ready for #2436Marshall Clow2016-06-081-1/+1
| | | | llvm-svn: 272150
* [Sparc] Complex return value ABI compliance.Chris Dewhurst2016-06-081-0/+45
| | | | | | | | | | | | According to the Sparc V8 ABI, complex numbers should be passed and returned as pairs of registers: https://docs.oracle.com/cd/E26502_01/html/E28387/gentextid-2734.html This fix ensures this is the case. Without this, complex numbers are returned as a struct of two floats, which breaks the ABI rules. Differential Review: http://reviews.llvm.org/D20955 llvm-svn: 272149
* [Sparc] Complex return value ABI compliance.Chris Dewhurst2016-06-081-0/+19
| | | | | | | | | | | | According to the Sparc V8 ABI, complex numbers should be passed and returned as pairs of registers: https://docs.oracle.com/cd/E26502_01/html/E28387/gentextid-2734.html This fix ensures this is the case. Without this, complex numbers are returned as a struct of two floats, which breaks the ABI rules. Differential Review: http://reviews.llvm.org/D20955 llvm-svn: 272148
* [lit] Ensure we get bytes when reading redirected output files.Daniel Dunbar2016-06-081-1/+1
| | | | llvm-svn: 272147
* Move a function declaration to a header.Rui Ueyama2016-06-082-2/+1
| | | | llvm-svn: 272146
* Support: correct AArch64 TargetParser implementationSaleem Abdulrasool2016-06-082-20/+62
| | | | | | | | | | | | | | | | | | | | | | | The architecture enumeration is shared across ARM and AArch64. However, the data is not. The code incorrectly would index into the array using the architecture index which was offset by the ARMv7 architecture enumeration. We do not have a marker for indicating the architectural family to which the enumeration belongs so we cannot be clever about offsetting the index (at least it is not immediately apparent to me). Instead, fall back to the tried-and-true method of slowly iterating the array (its not a large array, so the impact of this is not too high). Because of the incorrect indexing, if we were lucky, we would crash, but usually we would return an invalid StringRef. We did not have any tests for the AArch64 target parser previously;. Extend the previous tests I had added for ARM to cover AArch64 for ensuring that we return expected StringRefs. Take the opportunity to change some iterator types to references. This work is needed to support parsing `.arch name` directives in the AArch64 target asm parser. llvm-svn: 272145
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