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* [X86] Use AND32ri8 instead of AND64ri8 in Asan code in EmitCallAsanReport ↵Craig Topper2017-12-151-1/+1
| | | | | | | | for 32-bit mode. This seemed to work due to a quirk in the X86 MC encoder that didn't emit a REX byte that the AND64ri8 implies when in 32-bit mode. This made the encoding the same as AND32ri8. I tried to add an assert to catch the dropped REX prefix that caught this. llvm-svn: 320864
* [X86] In LowerVectorCTPOP use ISD::ZERO_EXTEND/ISD::TRUNCATE instead of the ↵Craig Topper2017-12-151-4/+4
| | | | | | | | target specific nodes. The target independent nodes will get legalized to the target specific nodes by their own legalization process. Someday I'd like to stop using a target specific for zero extends and truncates of legal types so the less places we reference the target specific opcode the better. llvm-svn: 320863
* [X86] Remove unnecessary TODO.Craig Topper2017-12-151-1/+0
| | | | | | When I wrote it I thought we were missing a potential optimization for KNL. But investigating further shows that for KNL we still do the optimal thing by widening to v4f32 and then using special isel patterns to widen again to zmm a register. llvm-svn: 320862
* [MinGW] Ignore the --no-seh flagMartin Storsjo2017-12-151-0/+1
| | | | | | | | | The COFF linker automatically sets the IMAGE_DLL_CHARACTERISTICS_NO_SEH when suitable, similarly to link.exe. Differential Revision: https://reviews.llvm.org/D41275 llvm-svn: 320861
* [COFF] Set the IMAGE_DLL_CHARACTERISTICS_NO_SEH flag automaticallyMartin Storsjo2017-12-153-3/+9
| | | | | | | | This seems to match how link.exe sets it. Differential Revision: https://reviews.llvm.org/D41252 llvm-svn: 320860
* [LTO] Remove unused RegularLTOState::HasModuleVitaly Buka2017-12-151-1/+0
| | | | llvm-svn: 320859
* Re-commit : [LICM] Allow sinking when foldable in loopJun Bum Lim2017-12-153-31/+232
| | | | | | | | | | | | | | | | | | | | | | This recommits r320823 reverted due to the test failure in sink-foldable.ll and an unused variable. Added "REQUIRES: aarch64-registered-target" in the test and removed unused variable. Original commit message: Continue trying to sink an instruction if its users in the loop is foldable. This will allow the instruction to be folded in the loop by decoupling it from the user outside of the loop. Reviewers: hfinkel, majnemer, davidxl, efriedma, danielcdh, bmakam, mcrosier Reviewed By: hfinkel Subscribers: javed.absar, bmakam, mcrosier, llvm-commits Differential Revision: https://reviews.llvm.org/D37076 llvm-svn: 320858
* Revert "[DWARFv5] Dump an MD5 checksum in the line-table header."Paul Robinson2017-12-157-84/+27
| | | | | | Unit test fails on some bots. llvm-svn: 320857
* [llvm-objcopy] Reformat everything using clang-format -iJake Ehrlich2017-12-152-26/+22
| | | | | | | | | Overtime some non-clang formatted code has creeped into llvm-objcopy. This patch fixes all of that. Differential Revision: https://reviews.llvm.org/D41262 llvm-svn: 320856
* [Hexagon] Fix operand-swapping PatFrag for atomic storesKrzysztof Parzyszek2017-12-152-18/+90
| | | | | | | PatFrag now has the atomicity information stored as bit fields. They need to be copied to the new PatFrag. llvm-svn: 320855
* __is_target_environment: Check the environment after parsing itAlex Lorenz2017-12-152-4/+9
| | | | | | | This ensures that target triples with environment versions can still work with __is_target_environment. llvm-svn: 320854
* __is_target_arch: Check the arch and subarch instead of the arch nameAlex Lorenz2017-12-152-3/+13
| | | | | | | | | This ensures that when compiling for "arm64" __is_target_arch will succeed for both "arm64" and "aarch64". Thanks to Bob Wilson who pointed this out! llvm-svn: 320853
* [DWARFv5] Dump an MD5 checksum in the line-table header.Paul Robinson2017-12-157-27/+84
| | | | | | | | Adds missing support for DW_FORM_data16. Differential Revision: https://reviews.llvm.org/D41090 llvm-svn: 320852
* Do not add .dynamic entries that don't have to be added early in the ctor. NFC.Rui Ueyama2017-12-152-30/+22
| | | | | | | | | | | We add dynamic section entries both in the ctor of the class and DynamicSection::finalizeContents(). Some entries need to be added early in the ctor because they add strings to .dynstr. Other entries were intended to be added in finalizeContents(). However, some entries are added in the ctor even though they don't add strings. This patch fix the issue. llvm-svn: 320851
* [X86] Remove assert in X86MCCodeEmitter.cpp that was added in r320830.Craig Topper2017-12-151-2/+0
| | | | | | It seems to be failing real code which is concerning, but we were silently getting away with it. I'll investigate further. llvm-svn: 320850
* [SelectionDAG][X86] Fix insert_vector_elt lowering for v32i1/v64i1 with ↵Craig Topper2017-12-153-7/+619
| | | | | | | | | | | | | | | | | | | | | | | non-constant index Summary: Currently we don't handle v32i1/v64i1 insert_vector_elt correctly as we fail to look at the number of elements closely and assume it can only be v16i1 or v8i1. We also can't type legalize v64i1 insert_vector_elt correctly on KNL due to the type not being byte addressable as required by the legalizing through memory accesses path requires. For the first issue, the patch now tries to pick a 512-bit register with the correct number of elements and promotes to that. For the second issue, we now extend the vector to a byte addressable type, do the stores to memory, load the two halves, and then truncate the halves back to the original type. Technically since we changed the type, we may not need two loads, but actually checking that is more work and for the v64i1 case we do need them. Reviewers: RKSimon, delena, spatel, zvi Reviewed By: RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D40942 llvm-svn: 320849
* [Memcpy Loop Lowering] Insert loop BB inbetween the split BB.Sean Fertile2017-12-152-2/+9
| | | | | | | | | | | The original memcpy expansion inserted the loop basic block inbetween the 2 new basic blocks created by splitting the original block the memcpy call was in. This commit makes the new memcpy expansion do the same to keep the layout of the IR matching between the old and new implementations. Differential Review: https://reviews.llvm.org/D41197 llvm-svn: 320848
* [WebAssembly] Base imports on Symtab. NFC.Sam Clegg2017-12-152-14/+9
| | | | | | | | | | | | | Since imports are undefined symbols we know we can find all of them my looking at the symbol table alone. (i.e. imports cannot be have local binding). This will be strictly faster and also allows us to to remove a method from Symbol class Differential Revision: https://reviews.llvm.org/D41304 llvm-svn: 320847
* [X86] Add 'Requires<[In64BitMode]>' to a bunch of instructions that only ↵Craig Topper2017-12-154-67/+94
| | | | | | | | have memory and immediate operands. The asm parser wasn't preventing these from being accepted in 32-bit mode. Instructions that use a GR64 register are protected by the parser rejecting the register in 32-bit mode. llvm-svn: 320846
* [X86] Change BNDLDX to use anymem instead of i64mem for itsmemory operand.Craig Topper2017-12-151-1/+1
| | | | | | This instruction doesn't access memory. It juse use a similar looking memory encoding. Don't require Intel syntax to put "qword ptr" in front of it. llvm-svn: 320845
* [X86] Remove the 'Requires' In64BitMode/Not64BitMode from the LWP instructions.Craig Topper2017-12-151-4/+4
| | | | | | These aren't doing anything due to a top level "let Predicates =". I think the GR32/GR64 register class protects these anyway. llvm-svn: 320844
* [X86] Remove the 'Requires<[In64BitMode]>' from SHSTK instructions.Craig Topper2017-12-151-9/+5
| | | | | | This has no effect due to a top level "let Predicates =" around the instructions. But its also not required because the GR64 usage in the instruction guarantees it can never match. llvm-svn: 320843
* [TargetLibraryInfo] fix documentation comment; NFCSanjay Patel2017-12-151-3/+3
| | | | llvm-svn: 320842
* [clang-tidy] Adding Fuchsia checker for virtual inheritanceJulie Hockett2017-12-158-0/+142
| | | | | | | | | | | | Adds a check to the Fuchsia module to warn if classes are defined with virtual inheritance. See https://fuchsia.googlesource.com/zircon/+/master/docs/cxx.md for reference. Differential Revision: https://reviews.llvm.org/D40813 llvm-svn: 320841
* [CodeGen] fix documentation comments; NFCSanjay Patel2017-12-151-10/+7
| | | | llvm-svn: 320840
* [AArch64] Fix typo in the ASIMD instruction optimization passEvandro Menezes2017-12-151-66/+72
| | | | | | | | Fix typo in the representative instruction replacement. Also, fix formatting and reword some comments. llvm-svn: 320839
* fix typo in comment and remove inaccurate comment; NFCSanjay Patel2017-12-152-3/+1
| | | | llvm-svn: 320838
* Fix for bug PR35549 - Repeated schedule comments.Andrew V. Tischenko2017-12-154-18/+24
| | | | | | Differential Revision: https://reviews.llvm.org/D40960 llvm-svn: 320837
* Revert "Re-commit : [LICM] Allow sinking when foldable in loop"Jun Bum Lim2017-12-153-231/+31
| | | | | | This reverts commit r320833. llvm-svn: 320836
* [CodeGen] fix documentation comments; NFCSanjay Patel2017-12-151-10/+6
| | | | llvm-svn: 320835
* Re-commit : [LICM] Allow sinking when foldable in loopJun Bum Lim2017-12-153-31/+231
| | | | | | | | | | | | | | | | | | | | This recommit r320823 after fixing a test failure. Original commit message: Continue trying to sink an instruction if its users in the loop is foldable. This will allow the instruction to be folded in the loop by decoupling it from the user outside of the loop. Reviewers: hfinkel, majnemer, davidxl, efriedma, danielcdh, bmakam, mcrosier Reviewed By: hfinkel Subscribers: javed.absar, bmakam, mcrosier, llvm-commits Differential Revision: https://reviews.llvm.org/D37076 llvm-svn: 320833
* Updated llvm-objdump to display local relocations in Mach-O binariesMichael Trent2017-12-157-11/+371
| | | | | | | | | | | | | | | | | | | | | | | Summary: llvm-objdump's Mach-O parser was updated in r306037 to display external relocations for MH_KEXT_BUNDLE file types. This change extends the Macho-O parser to display local relocations for MH_PRELOAD files. When used with the -macho option relocations will be displayed in a historical format. All tests are passing for llvm, clang, and lld. llvm-objdump builds without compiler warnings. rdar://35778019 Reviewers: enderby Reviewed By: enderby Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D41199 llvm-svn: 320832
* [ubsan-minimal] Add a path for non-POSIX (and bare-metal) use of the libraryFilipe Cabecinhas2017-12-151-0/+5
| | | | | | | | | | | | | | | | | | | Summary: Hook on -DKERNEL_USE (which is also used in lib/builtins) to not import strlen and not rely on write() being implemented with the stderr on fd 2. With this, the only requirements to use this library are: - "Good enough" std::atomic<void*> and std::atomic<int> - abort() being implemented - ubsan_message(const char*) being implemented Reviewers: eugenis Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D39791 llvm-svn: 320831
* [X86] Fix XSAVE64 and similar instructions to not be allowed by the ↵Craig Topper2017-12-154-43/+34
| | | | | | | | | | assembler in 32-bit mode. There was a top level "let Predicates =" in the .td file that was overriding the Requires on each instruction. I've added an assert to the code emitter to catch more cases like this. I'm sure this isn't the only place where the right predicates aren't being applied. This assert already found that we don't block btq/btsq/btrq in 32-bit mode. llvm-svn: 320830
* Remove "FunctionName -" from docs on FunctionDecl(NFC)Erich Keane2017-12-151-26/+22
| | | | | | | | Removed the repetative usage of the operator name on the documentation for FunctionDecl. Also reflowed some of the comments since this changes the 80 character rule. llvm-svn: 320829
* Revert "[LICM] Allow sinking when foldable in loop"Jun Bum Lim2017-12-153-228/+31
| | | | | | This reverts commit r320823. llvm-svn: 320828
* [CodeGen] Print stack object references as %(fixed-)stack.0 in both MIR and ↵Francis Visoiu Mistrih2017-12-157-28/+55
| | | | | | | | | | | | | | debug output Work towards the unification of MIR and debug output by printing `%stack.0` instead of `<fi#0>`, and `%fixed-stack.0` instead of `<fi#-4>` (supposing there are 4 fixed stack objects). Only debug syntax is affected. Differential Revision: https://reviews.llvm.org/D41027 llvm-svn: 320827
* [OPENMP] Codegen `declare simd` for function declarations.Alexey Bataev2017-12-153-4/+32
| | | | | | | Previously the attributes were emitted only for function definitions. Patch adds emission of the attributes for function declarations. llvm-svn: 320826
* [ThinLTO] Disallow multiple prevailing defsEugene Leviant2017-12-154-24/+6
| | | | | | https://reviews.llvm.org/D41291 llvm-svn: 320825
* [X86] Widen (v2i32 (fp_to_uint v2f64)) to (v8i32 (fp_to_uint v8f64)) during ↵Craig Topper2017-12-152-11/+15
| | | | | | | | legalization if we have AVX512F, but not VLX. NFC Previously we widened it using isel patterns. llvm-svn: 320824
* [LICM] Allow sinking when foldable in loopJun Bum Lim2017-12-153-31/+228
| | | | | | | | | | | | | | | | | Summary: Continue trying to sink an instruction if its users in the loop is foldable. This will allow the instruction to be folded in the loop by decoupling it from the user outside of the loop. Reviewers: hfinkel, majnemer, davidxl, efriedma, danielcdh, bmakam, mcrosier Reviewed By: hfinkel Subscribers: javed.absar, bmakam, mcrosier, llvm-commits Differential Revision: https://reviews.llvm.org/D37076 llvm-svn: 320823
* [ARM] Some DAG combine testsSam Parker2017-12-152-0/+210
| | | | | | Add some more and and shift load combine tests. llvm-svn: 320822
* [ELF] Reduce size of ELF file produced by testPeter Smith2017-12-151-8/+8
| | | | | | | We only need to exceed 128 Megabytes to provoke the generation of a range extension thunk. This brings the file size down to just over 128 Megabytes. llvm-svn: 320821
* llgs-tests: Add support for "exit" stop-reply packetsPavel Labath2017-12-156-62/+149
| | | | | | | | | | | | | | | | | | Summary: This makes StopReply class abstract, so that we can represent different types of stop replies such as StopReplyStop and StopReplyExit (there should also be a StopReplySignal, but I don't need that right now so I haven't implemented it yet). This prepares the ground for a new test I'm writing. Reviewers: eugene, zturner Subscribers: lldb-commits Differential Revision: https://reviews.llvm.org/D41067 llvm-svn: 320820
* [MIR] Add support for missing CFI directivesFrancis Visoiu Mistrih2017-12-158-48/+181
| | | | | | | | | | | | | | | | | | | The following CFI directives are suported by MC but not by MIR: * .cfi_rel_offset * .cfi_adjust_cfa_offset * .cfi_escape * .cfi_remember_state * .cfi_restore_state * .cfi_undefined * .cfi_register * .cfi_window_save Add support for printing, parsing and update tests. Differential Revision: https://reviews.llvm.org/D41230 llvm-svn: 320819
* Delete a really large test output.Rafael Espindola2017-12-151-0/+3
| | | | llvm-svn: 320818
* Handle a VersymIndex of 0 as an error.Rafael Espindola2017-12-152-5/+5
| | | | | | | | | I noticed that the continue this patch deletes was not tested. Trying to add a test I realized that we never put a VER_NDX_LOCAL symbol in the dynamic symbol table. There doesn't seem to be any reason for a linker to use VER_NDX_LOCAL for a defined shared symbol. llvm-svn: 320817
* Fix 32-bit builds broken by 320813Pavel Labath2017-12-151-2/+2
| | | | | | cast to size_t to avoid narrowing error. llvm-svn: 320816
* [X86] Add RTM schedule testsSimon Pilgrim2017-12-151-0/+61
| | | | llvm-svn: 320815
* [InlineCost] Find repeated loads in the calleeHaicheng Wu2017-12-154-6/+242
| | | | | | | | | | | SROA analysis of InlineCost can figure out that some stores can be removed after inlining and then the repeated loads clobbered by these stores are also free. This patch finds these clobbered loads and adjust the inline cost accordingly. Differential Revision: https://reviews.llvm.org/D33946 llvm-svn: 320814
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