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* [SLP] - Add couple safety checks to TreeEntry::dump(). NFCSergey Dmitriev2019-11-051-5/+12
| | | | | | | | | | | | | | Summary: Check for MainOp and AltOp for NULL before dereferencing or issue NULL. Reviewers: Vasilis, dtemirbulatov, RKSimon, ABataev Reviewed By: ABataev Subscribers: mehdi_amini, hiraditya, dexonsmith, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69812
* [globalisel][docs] Add KnownBits Analysis documentationDaniel Sanders2019-11-052-0/+101
| | | | | | | | | | | | | | | Summary: This is largely based off of the slides from the keynote Depends on D69545 Reviewers: volkan, rovka, arsenm Subscribers: wdng, arphaman, Petar.Avramovic, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69644
* [JumpThreading] Factor out code to merge basic blocks (NFC)Kazu Hirata2019-11-052-43/+53
| | | | | | | | | | | | | | | Summary: This patch factors out code to merge a basic block with its sole successor -- partly for readability and partly to facilitate an upcoming patch of my own. Reviewers: wmi Subscribers: hiraditya, jfb, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69852
* Revert "[Object][MachO] Rewrite macho-invalid-fat-arch-size into YAML"Steven Wu2019-11-053-14/+2
| | | | The invalid binary trying to construct triggers an assertion.
* Remove redundant assignment. NFCI.Simon Pilgrim2019-11-051-1/+0
| | | | Fixes cppcheck warning.
* Use iterator prefix increment. NFCI.Simon Pilgrim2019-11-051-1/+1
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* [MachineOutliner] Reduce scope of variable and stop duplicate getMF() calls. ↵Simon Pilgrim2019-11-051-3/+3
| | | | NFCI.
* [Object][MachO] Rewrite macho-invalid-fat-arch-size into YAMLSteven Wu2019-11-053-2/+14
| | | | | | | | Rewrite one of the invalid macho test input file with YAML file. The original invalid macho is breaking our internal test infrastusture because it is too broken to be copy around. rdar://problem/56879982
* [llvm-objcopy][ELF] Implement --only-keep-debugFangrui Song2019-11-057-52/+352
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | --only-keep-debug produces a debug file as the output that only preserves contents of sections useful for debugging purposes (the binutils implementation preserves SHT_NOTE and non-SHF_ALLOC sections), by changing their section types to SHT_NOBITS and rewritting file offsets. See https://sourceware.org/gdb/onlinedocs/gdb/Separate-Debug-Files.html The intended use case is: ``` llvm-objcopy --only-keep-debug a a.dbg llvm-objcopy --strip-debug a b llvm-objcopy --add-gnu-debuglink=a.dbg b ``` The current layout algorithm is incapable of deleting contents and shrinking segments, so it is not suitable for implementing the functionality. This patch adds a new algorithm which assigns sh_offset to sections first, then modifies p_offset/p_filesz of program headers. It bears a resemblance to lld/ELF/Writer.cpp. Reviewed By: jhenderson, jakehehrlich Differential Revision: https://reviews.llvm.org/D67137
* [llvm-objcopy][ELF] Add OriginalType & OriginalFlagsFangrui Song2019-11-052-23/+26
| | | | | | | | | | | `llvm::objcopy::elf::*Section::classof` matches Type and Flags, yet Type and Flags are mutable (by setSectionFlagsAndTypes and upcoming --only-keep-debug feature). Add OriginalType & OriginalFlags to be used in classof, to prevent classof results from changing. Reviewed By: jakehehrlich, jhenderson, alexshap Differential Revision: https://reviews.llvm.org/D69739
* [ARM] Multi-vector MVE spill testDavid Green2019-11-051-0/+103
| | | | | This is a test from D67169, that can now be added after the vld2 intrinsics were committed upstream.
* [lldb] [Python] Build readline override module only on LinuxMichał Górny2019-11-051-1/+1
| | | | | | | | | Restrict building the readline override to Linux only. It both does not build on *BSD systems, and is largely irrelevant since they default to using libedit over readline anyway. This restores the behavior of the old readline override that also was built only on Linux. Differential Revision: https://reviews.llvm.org/D69846
* [DFAPacketizer] Allow up to 64 functional unitsjmolloy2019-11-053-427/+158
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: To drive the automaton we used a uint64_t as an action type. This contained the transition's resource requirements as a conjunction: (a OR b) AND (b OR c) We encoded this conjunction as a sequence of four 16-bit bitmasks. This limited the number of addressable functional units to 16, which is quite low and has bitten many people in the past. Instead, the DFAEmitter now generates a lookup table from InstrItinerary class (index of the ItinData inside the ProcItineraries) to an internal action index which is essentially a dense embedding of the conjunctive form. Because we never materialize the conjunctive form, we no longer have the 16 FU restriction. In this patch we limit to 64 functional units due to using a uint64_t bitmask in the DFAEmitter. Now that we've decoupled these representations we can increase this in future. Reviewers: ThomasRaoux, kparzysz, majnemer Reviewed By: ThomasRaoux Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69110
* [OPENMP]Improve diagnostics for unsupported unified addressing.Alexey Bataev2019-11-052-5/+10
| | | | Improved diagnostics for better user experience.
* [LV] Apply sink-after & interleave-groups as VPlan transformations (NFC)Gil Rapaport2019-11-057-131/+174
| | | | | | | This recommits 2be17087f8c38934b7fc9208ae6cf4e9b4d44f4b (reverted in d3ec06d219788801380af1948c7f7ef9d3c6100b for heap-use-after-free) with a fix in IAI's reset() which was not clearing the set of interleave groups after deleting them.
* Fix uninitialized variable warning. NFCI.Simon Pilgrim2019-11-051-1/+1
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* [MCObjectFileInfo] Fix uninitialized variable warnings. NFCI.Simon Pilgrim2019-11-051-88/+89
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* [MachineOutliner] Fix uninitialized variable warnings. NFCI.Simon Pilgrim2019-11-052-7/+7
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* [OPENMP][DOCS]Fix coloring of the implemented features status, NFC.Alexey Bataev2019-11-051-5/+5
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* [ObjC][ARC] Ignore lifetime markers between *ReturnValue callsFrancis Visoiu Mistrih2019-11-052-5/+28
| | | | | | | | | | | | | | | | | | | | | | When eliminating a pair of `llvm.objc.autoreleaseReturnValue` followed by `llvm.objc.retainAutoreleasedReturnValue` we need to make sure that the instructions in between are safe to ignore. Other than bitcasts and useless GEPs, it's also safe to ignore lifetime markers for both static allocas (lifetime.start/lifetime.end) and dynamic allocas (stacksave/stackrestore). These get added by the inliner as part of the return sequence and can prevent the transformation from happening in practice. Differential Revision: https://reviews.llvm.org/D69833
* [NFC][ObjC][ARC] Add tests for OptimizeRetainRVCallFrancis Visoiu Mistrih2019-11-051-0/+68
| | | | | Add tests for bitcasts + zero GEPs, and pre-commit tests for lifetime markers.
* [JumpThreading] Factor out common code to update the SSA form (NFC)Kazu Hirata2019-11-052-75/+48
| | | | | | | | | | | | | | | Summary: This patch factors out common code to update the SSA form in JumpThreading.cpp -- partly for readability and partly to facilitate an coming patch of my own. Reviewers: wmi Subscribers: hiraditya, jfb, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69811
* [GVN] Fix uninitialized variable warnings. NFCI.Simon Pilgrim2019-11-053-23/+23
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* Add missing GVN =operator. NFCI.Simon Pilgrim2019-11-052-0/+2
| | | | Fixes PVS Studio warning that the 'ValueTable' class implements a copy constructor, but lacks the '=' operator.
* [InstCombine] add tests for shift-logic-shift; NFCSanjay Patel2019-11-051-0/+171
| | | | | | This is based on existing CodeGen test files for x86 and AArch64. The corresponding potential transform is shown in: rL370617
* [lldb] Fix readline/libedit compat patch for py2serge-sans-paille2019-11-051-1/+9
| | | | This is a follow-up to https://reviews.llvm.org/D69793
* [AtomicExpandPass] Silence static analyzer warnings about operator priority. ↵Dávid Bolvanský2019-11-051-1/+1
| | | | NFCI.
* [MachineScheduler] Enable AA in PostRA Machine schedulerDavid Green2019-11-057-49/+51
| | | | | | | | | | | | This adds AA to Post-RA Machine Scheduling, allowing the pass more freedom when handling memory operations. My understanding is that this was just never done, not that it is inherently incorrect to do so. The older PostRA List scheduler already makes use of AA, it's just that the MI PostRA Scheduler was never taught to use it. Differential Revision: https://reviews.llvm.org/D69814
* [Docs] Add LangRef documentation for freeze instructionNuno Lopes2019-11-051-33/+81
| | | | | | | | | | | | Summary: - Describe the new freeze instruction - Make it explicit that branch on undef/poison is UB Reviewers: chandlerc, majnemer, efriedma, nikic, reames, jdoerfert, lebedev.ri, regehr Subscribers: fhahn, bollu, lebedev.ri, delcypher, spatel, filcab, llvm-commits, aqjune Differential Revision: https://reviews.llvm.org/D29121
* [Clang FE] Recognize -mnop-mcount CL option (SystemZ only).Jonas Paulsson2019-11-057-0/+45
| | | | | | | | | | | | | | Recognize -mnop-mcount from the command line and add a function attribute "mnop-mcount"="true" when passed. When this option is used, a nop is added instead of a call to fentry. This is used when building the Linux Kernel. If this option is passed for any other target than SystemZ, an error is generated. Review: Ulrich Weigand https://reviews.llvm.org/D67763
* Fix PR40644: miscompile indexed FP constant storeThomas Preud'homme2019-11-052-0/+6
| | | | | | | | | | | | | | | | | | | | | Summary: Functions replaceStoreOfFPConstant() and OptimizeFloatStore() both replace store of float by a store of an integer unconditionally. However this generates wrong code when the store that is replaced is an indexed or truncating store. This commit solves this issue by adding an early return in these functions when the store being considered is not a normal store. Bug was only observed on out of tree targets, hence the lack of testcase in this commit. Reviewers: efriedma Subscribers: hiraditya, arphaman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D68420
* [ARM] Always enable UseAA in the arm backendDavid Green2019-11-056-36/+47
| | | | | | | | | | This feature controls whether AA is used into the backend, and was previously turned on for certain subtargets to help create less constrained scheduling graphs. This patch turns it on for all subtargets, so that they can all make use of the extra information to produce better code. Differential Revision: https://reviews.llvm.org/D69796
* [Scheduling][ARM] Consistently enable PostRA Machine schedulingDavid Green2019-11-0517-18/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In the ARM backend, for historical reasons we have only some targets using Machine Scheduling. The rest use the old list scheduler as they are using itinaries and the list scheduler seems to produce better code (and not crash running out of register on v6m codes). So whether to use the MIScheduler or not is checked at runtime from the subtarget features. This is fine, except for post-ra scheduling. Whether to use the old post-ra list scheduler or the post-ra machine schedule is decided as the pass manager is set up, in arms case from a newly constructed subtarget. Under some situations, like LTO, this won't include the correct cpu so can pick the wrong option. This can have a surprising effect on performance. To fix that, this patch overrides targetSchedulesPostRAScheduling and addPreSched2 in the ARM backend, adding _both_ post-ra schedulers and picking at runtime which to execute. To pick between the two I've had to add a enablePostRAMachineScheduler() method that normally returns enableMachineScheduler() && enablePostRAScheduler(), which can be overridden to enable just one of PostRAMachineScheduler vs PostRAScheduler. Thanks to David Penry for the identifying this problem. Differential Revision: https://reviews.llvm.org/D69775
* lldb/breakpad: add suppport for the "x86_64h" architecturePavel Labath2019-11-052-2/+2
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* Revert and patch "[Python] Remove readline module"serge-sans-paille2019-11-054-0/+124
| | | | | | | | | | | | | | | | | | | | Fix https://bugs.llvm.org/show_bug.cgi?id=43830 while avoiding polluting the global Python namespace. This both reverts r357277 to rebundle a version of Python's readline module based on libedit. However, this patch also provides two improvements over the previous implementation: 1. use PyMem_RawMalloc instead of PyMem_Malloc, as expected by PyOS_Readline (prevents to segfault upon exit of interactive session) 2. patch the readline module upon embedded interpreter loading, instead of patching it globally, which should prevent any side effect on other modules/packages 3. only activate the patched module if libedit is actually linked in lldb Differential Revision: https://reviews.llvm.org/D69793
* [OpenCL] Group builtin functions by prototypeSven van Haastregt2019-11-051-13/+136
| | | | | | | | | | The TableGen-generated file containing the function definitions can be reorganized to save some memory in the Clang binary. Functions having the same prototype(s) will point to a shared list of prototype(s). Patch by Pierre Gondois and Sven van Haastregt. Differential Revision: https://reviews.llvm.org/D63557
* [OpenCL] Add builtin function attribute handlingSven van Haastregt2019-11-054-43/+97
| | | | | | | | | Add handling for the "pure", "const" and "convergent" function attributes for OpenCL builtin functions. Patch by Pierre Gondois and Sven van Haastregt. Differential Revision: https://reviews.llvm.org/D64319
* lldb/minidump: Add support for the alternate ARM64 constantPavel Labath2019-11-052-1/+2
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* MemoryRegion: Print "don't know" permission values as suchPavel Labath2019-11-054-25/+33
| | | | | | | | | | | | | | | | | | | Summary: The permissions in a memory region have ternary states (yes, no, don't know), but the memory region command only prints in binary, treating "don't know" as "yes", which is particularly confusing as for instance the unwinder will treat an unknown value as "no". This patch makes is so that we distinguish all three states when printing the values, using "?" to indicate the lack of information. It is implemented via a special argument to the format provider for the OptionalBool enumeration. Reviewers: clayborg, jingham Subscribers: lldb-commits Differential Revision: https://reviews.llvm.org/D69106
* [LoopUnroll] peel-loop-conditions.ll: add some 'is even/odd' peeling testsRoman Lebedev2019-11-051-0/+98
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* [InstCombine] dropRedundantMaskingOfLeftShiftInput(): truncation (PR42563)Roman Lebedev2019-11-0512-110/+141
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: That fold keeps growing and growing :( I think this may be one of the last pieces for it. Since D67677/D67725, the fold knowns the general form of the pattern - where some masking is needed: https://rise4fun.com/Alive/F5R https://rise4fun.com/Alive/gslRa But there is one more huge piece missing - if you are extracting some bits, it is not impossible that the origin is wider than the extraction, i.e. there may be a truncation. And we don't deal with that yet. But we can, and the generalization remains fully identical: https://rise4fun.com/Alive/Uar https://rise4fun.com/Alive/5SW After a preparatory cleanup i think the diff looks rather clean. One missing piece is that in some patterns (especially pat. b), `-1` only needs to be `-1` in final type, but that is for later.. https://bugs.llvm.org/show_bug.cgi?id=42563 Reviewers: spatel, nikic Reviewed By: spatel Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69125
* [RISCV] Add InstrInfo areMemAccessesTriviallyDisjoint hookLuís Marques2019-11-053-0/+89
| | | | | | | | | | | Summary: Introduces the `InstrInfo::areMemAccessesTriviallyDisjoint` hook. The test could check for instruction reorderings, but to avoid being brittle it just checks instruction dependencies. Reviewers: asb, lenary Reviewed By: lenary Tags: #llvm Differential Revision: https://reviews.llvm.org/D67046
* DWARFDebugLoclists: Make it possible to read relocated addressesPavel Labath2019-11-055-19/+142
| | | | | | | | | | | | | | | | | Summary: Handling relocations was not needed when the loclists section was a DWO-only thing. But since DWARF5, it is possible to use it in regular objects too, and the standard permits embedding addresses into the section directly. These addresses need to be relocated in unlinked files. Reviewers: JDevlieghere, dblaikie, probinson Subscribers: aprantl, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D68271
* [mips] Set __OCTEON__ macrosSimon Atanasyan2019-11-052-0/+4
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* [mips] Fix `__mips_isa_rev` macros value for Octeon CPUSimon Atanasyan2019-11-052-1/+10
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* Recommit "[HardwareLoops] Optimisation remarks"Sjoerd Meijer2019-11-053-26/+107
| | | | | | | | | With a few things fixed: - initialisaiton of the optimisation remark pass (this was causing the buildbot failures on PPC), - a test case. Differential Revision: https://reviews.llvm.org/D69660
* [AArch64] Update test checks on merge-store-dependency.ll. NFCDavid Green2019-11-051-4/+42
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* [lldb][NFC] Give some parameters in CommandInterpreter more descriptive namesRaphael Isemann2019-11-052-9/+9
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* [IR] Remove switch's default block that causes clang 8 raise erroraqjune2019-11-051-2/+0
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* [X86] Lower the cost of avx512 horizontal bool and/or reductions to ↵Craig Topper2019-11-043-42/+63
| | | | | | | | | | | | | | | | | 2*log2(bitwidth)+1 for legal types. This better represents the kshift+binop we'd get for each stage before the final extract. Its likely we'll do even better by doing a kmov and a cmp with a GPR, but this is a good start. The default handling was costing a worst case single source permute shuffle of the vector before the binop. This worst case assumes the shuffle might have to be emulated with extracts and inserts. But since we know we're doing a reduction we can assume we'll get kshift lowering. There's still some room for improvement here, but this is much better than it was.
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