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* [CodeView] Refactor / Rewrite TypeSerializer and TypeTableBuilder.Zachary Turner2017-11-2821-732/+795
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The motivation behind this patch is that future directions require us to be able to compute the hash value of records independently of actually using them for de-duplication. The current structure of TypeSerializer / TypeTableBuilder being a single entry point that takes an unserialized type record, and then hashes and de-duplicates it is not flexible enough to allow this. At the same time, the existing TypeSerializer is already extremely complex for this very reason -- it tries to be too many things. In addition to serializing, hashing, and de-duplicating, ti also supports splitting up field list records and adding continuations. All of this functionality crammed into this one class makes it very complicated to work with and hard to maintain. To solve all of these problems, I've re-written everything from scratch and split the functionality into separate pieces that can easily be reused. The end result is that one class TypeSerializer is turned into 3 new classes SimpleTypeSerializer, ContinuationRecordBuilder, and TypeTableBuilder, each of which in isolation is simple and straightforward. A quick summary of these new classes and their responsibilities are: - SimpleTypeSerializer : Turns a non-FieldList leaf type into a series of bytes. Does not do any hashing. Every time you call it, it will re-serialize and return bytes again. The same instance can be re-used over and over to avoid re-allocations, and in exchange for this optimization the bytes returned by the serializer only live until the caller attempts to serialize a new record. - ContinuationRecordBuilder : Turns a FieldList-like record into a series of fragments. Does not do any hashing. Like SimpleTypeSerializer, returns references to privately owned bytes, so the storage is invalidated as soon as the caller tries to re-use the instance. Works equally well for LF_FIELDLIST as it does for LF_METHODLIST, solving a long-standing theoretical limitation of the previous implementation. - TypeTableBuilder : Accepts sequences of bytes that the user has already serialized, and inserts them by de-duplicating with a hash table. For the sake of convenience and efficiency, this class internally stores a SimpleTypeSerializer so that it can accept unserialized records. The same is not true of ContinuationRecordBuilder. The user is required to create their own instance of ContinuationRecordBuilder. Differential Revision: https://reviews.llvm.org/D40518 llvm-svn: 319198
* [X86][X87] Tag FP_TO_INT_IN_MEM pseudos with hasNoSchedulingInfoSimon Pilgrim2017-11-281-2/+2
| | | | | | We don't need scheduling info for pseudos llvm-svn: 319197
* Handle binding in --wrap.Rafael Espindola2017-11-283-2/+9
| | | | | | Copying the binding seems reasonable and matches the bfd behavior. llvm-svn: 319196
* [Target] Make a copy of TargetOptions feature list before sorting during CodeGenCraig Topper2017-11-281-18/+11
| | | | | | | | Currently CodeGen is calling std::sort on the features vector in TargetOptions for every function, but I don't think CodeGen should be modifying TargetOptions. Differential Revision: https://reviews.llvm.org/D40228 llvm-svn: 319195
* [CodeGen] Separate MachineOperand implementation from MachineInstrFrancis Visoiu Mistrih2017-11-283-701/+752
| | | | | | | | Move the implementation to its own file. Differential Revision: https://reviews.llvm.org/D40419 llvm-svn: 319194
* [CodeGen] Cleanup MachineOperandFrancis Visoiu Mistrih2017-11-282-43/+23
| | | | | | | | * clang-format * move doxygen from the implementation to headers * remove duplicate doxygen llvm-svn: 319193
* AMDGPU: Add num spilled s/vgprs to metadataKonstantin Zhuravlyov2017-11-286-17/+153
| | | | | | | | This was requested by tools. Differential Revision: https://reviews.llvm.org/D40321 llvm-svn: 319192
* Simplify UUID constructorsStephane Sezer2017-11-281-3/+2
| | | | | | | | | | | | Summary: This remove a small amount of duplicated code. Reviewers: clayborg, zturner, davide Subscribers: lldb-commits Differential Revision: https://reviews.llvm.org/D40536 llvm-svn: 319191
* [LibFuzzer] Improve comments on `CounterToFeature()` function.Dan Liew2017-11-281-1/+12
| | | | | | | | | | | | This is based on discussion in https://reviews.llvm.org/D40376 . The comments try to explain the reason for the current implementation and note that it might change in the future, so clients should not rely on this particular implementation. Differential Revision: https://reviews.llvm.org/D40565 llvm-svn: 319190
* Support the setjmp(3) family of functions in TSan/NetBSDKamil Rytarowski2017-11-282-26/+106
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This change adds support for the setjmp(3)/longjmp(3) family of functions on NetBSD. There are three types of them on NetBSD: - setjmp(3) / longjmp(3) - sigsetjmp(3) / sigsetjmp(3) - _setjmp(3) / _longjmp(3) Due to historical and compat reasons the symbol names are mangled: - setjmp -> __setjmp14 - longjmp -> __longjmp14 - sigsetjmp -> __sigsetjmp14 - siglongjmp -> __siglongjmp14 - _setjmp -> _setjmp - _longjmp -> _longjmp This leads to symbol renaming in the existing codebase. There is no such symbol as __sigsetjmp/__longsetjmp on NetBSD Add a comment that GNU-style executable stack note is not needed on NetBSD. The stack is not executable without it. Sponsored by <The NetBSD Foundation> Reviewers: joerg, dvyukov, vitalybuka Reviewed By: dvyukov Subscribers: llvm-commits, kubamracek, #sanitizers Tags: #sanitizers Differential Revision: https://reviews.llvm.org/D40337 llvm-svn: 319189
* Add opt-viewer testingAdam Nemet2017-11-2813-10/+1161
| | | | | | | | | | | | | | | Detects whether we have the Python modules (pygments, yaml) required by opt-viewer and hooks this up to REQUIRES. This fixes https://bugs.llvm.org/show_bug.cgi?id=34129 (the lack of opt-viewer testing). It's also related to https://github.com/apple/swift/pull/12938 and the idea is to expose LLVM_HAVE_OPT_VIEWER_MODULES to the Swift cmake. Differential Revision: https://reviews.llvm.org/D40202 llvm-svn: 319188
* [CodeGen] Print register names in lowercase in both MIR and debug outputFrancis Visoiu Mistrih2017-11-28358-4044/+4046
| | | | | | | | | | | As part of the unification of the debug format and the MIR format, always print registers as lowercase. * Only debug printing is affected. It now follows MIR. Differential Revision: https://reviews.llvm.org/D40417 llvm-svn: 319187
* [WebAssembly] Support bitcasted function addresses with varargs.Dan Gohman2017-11-285-17/+58
| | | | | | | | | | | | | Generalize FixFunctionBitcasts to handle varargs functions. This in particular fixes the case where clang bitcasts away a varargs when calling a K&R-style function. This avoids interacting with tricky ABI details because it operates at the LLVM IR level before varargs ABI details are exposed. This fixes PR35385. llvm-svn: 319186
* DAG: Legalize truncstores to illegal int typesMatt Arsenault2017-11-282-6/+72
| | | | | | | Truncate to a legal int type, and produce a new truncstore from a narrower type. llvm-svn: 319185
* [X86][X87] Tag FTST x87 instruction scheduler classSimon Pilgrim2017-11-282-8/+9
| | | | | | Looking through Agner, FTST is very similar to generic float compare behaviour, so I've added them to the existing IIC_FCOMI (WriteFAdd) tags. llvm-svn: 319184
* [clang-tidy] Move more checks from misc- to performance-Alexander Kornienko2017-11-2820-85/+105
| | | | | | | | | | | | | | | | Summary: rename_check.py misc-move-const-arg performance-move-const-arg rename_check.py misc-noexcept-move-constructor performance-noexcept-move-constructor Reviewers: hokein, xazax.hun Reviewed By: xazax.hun Subscribers: rnkovacs, klimek, mgorny, xazax.hun, cfe-commits Differential Revision: https://reviews.llvm.org/D40507 llvm-svn: 319183
* [InstCombine] add tests from D39421 to show current transforms; NFCSanjay Patel2017-11-281-0/+133
| | | | llvm-svn: 319182
* [PowerPC][tsan] Update tsan to handle changed memory layouts in newer kernelsBill Seurer2017-11-281-2/+2
| | | | | | | | | | | | In more recent Linux kernels with 47 bit VMAs the layout of virtual memory for powerpc64 changed causing the thread sanitizer to not work properly. This patch adds support for 47 bit VMA kernels for powerpc64. (second part) Tested on several 4.x and 3.x kernel releases. llvm-svn: 319180
* Refactor functions PrintTemplateArgumentListSerge Pavlov2017-11-2810-134/+83
| | | | | | | | | | | These functions were defined as static members of TemplateSpecializationType. Now they are moved to namespace level. Previously there were different implementations for lists containing TemplateArgument and TemplateArgumentLoc, now these implementations share the same code. This change is a result of refactoring patch D40508. NFC. llvm-svn: 319178
* [Support] Add unit test for printLowerCaseFrancis Visoiu Mistrih2017-11-281-0/+8
| | | | | | Add test case for the function added in r319171. llvm-svn: 319177
* [cmake] Remove redundant call to cmake when building host tools.Don Hinton2017-11-281-26/+10
| | | | | | | | | | | | | | | | | | | | | Summary: Remove the redundant, config-time call to cmake when building host tools for cross compiles or optimized tablegen.. The config-time call to cmake is redundant because it will always get called again when the CONFIGURE_LLVM_${target_name} target fires at build-time. This speeds up initial configuration, but has no affect on build behavior. Reviewers: beanz Reviewed By: beanz Subscribers: mgorny, llvm-commits Differential Revision: https://reviews.llvm.org/D40229 llvm-svn: 319176
* [X86][X87] Tag FABS/FCHS/FSQRT/FSIN/FCOS x87 instruction scheduler classesSimon Pilgrim2017-11-284-49/+63
| | | | | | | Atom's FABS/FCHS/FSQRT latencies taken from Agner. Note: I just added FSIN and FCOS to the existing IIC_FSINCOS itinerary, which is actually a more costly instruction. llvm-svn: 319175
* [clang-tidy] Ignore ExprWithCleanups when looking for else-after-throwMalcolm Parsons2017-11-282-1/+20
| | | | | | | | | | | | | | | | | Summary: The readability-else-after-return check was not warning about an else after a throw of an exception that had arguments that needed to be cleaned up. Reviewers: aaron.ballman, alexfh, djasper Reviewed By: aaron.ballman Subscribers: lebedev.ri, klimek, xazax.hun, cfe-commits Differential Revision: https://reviews.llvm.org/D40505 llvm-svn: 319174
* Use getStoreSize() in various places instead of 'BitSize >> 3'.Jonas Paulsson2017-11-288-38/+22
| | | | | | | | | | | | | | | | | | This is needed for cases when the memory access is not as big as the width of the data type. For instance, storing i1 (1 bit) would be done in a byte (8 bits). Using 'BitSize >> 3' (or '/ 8') would e.g. give the memory access of an i1 a size of 0, which for instance makes alias analysis return NoAlias even when it shouldn't. There are no tests as this was done as a follow-up to the bugfix for the case where this was discovered (r318824). This handles more similar cases. Review: Björn Petterson https://reviews.llvm.org/D40339 llvm-svn: 319173
* [X86][X86] Add some x87 schedule testsSimon Pilgrim2017-11-281-0/+4588
| | | | | | Still missing some instructions: mainly loads/stores/system ops, all flagged as TODO. llvm-svn: 319172
* [Support] Merge toLower / toUpper implementationsFrancis Visoiu Mistrih2017-11-283-27/+35
| | | | | | Merge the ones from StringRef and StringExtras. llvm-svn: 319171
* [clang-tidy] Fix tests for ReplaceRandomShuffleCheckGabor Horvath2017-11-281-4/+4
| | | | | | | | Patch by: Daniel Kolozsvari! Differential Revision: https://reviews.llvm.org/D40516 llvm-svn: 319170
* [ELF] Read ARM BuildAttributes section to determine supported features.Peter Smith2017-11-285-5/+152
| | | | | | | | | | | | | | | | | | | lld assumes some ARM features that are not available in all Arm processors. In particular: - The blx instruction present for interworking. - The movt/movw instructions are used in Thunks. - The J1=1 J2=1 encoding of branch immediates to improve Thumb wide branch range are assumed to be present. This patch reads the ARM Attributes section to check for the architecture the object file was compiled with. If none of the objects have an architecture that supports either of these features a warning will be given. This is most likely to affect armv6 as used in the first Raspberry Pi. Differential Revision: https://reviews.llvm.org/D36823 llvm-svn: 319169
* [CodeGen] Rename functions PrintReg* to printReg*Francis Visoiu Mistrih2017-11-2867-306/+306
| | | | | | | | | | | LLVM Coding Standards: Function names should be verb phrases (as they represent actions), and command-like function should be imperative. The name should be camel case, and start with a lower case letter (e.g. openFile() or isFoo()). Differential Revision: https://reviews.llvm.org/D40416 llvm-svn: 319168
* [X86][3DNow] Add instruction itinerary and scheduling classes for ↵Simon Pilgrim2017-11-282-6/+30
| | | | | | femms/prefetch/prefetchw llvm-svn: 319167
* [ARM][AArch64] Workaround ARM/AArch64 peculiarity in clearing icache.Peter Smith2017-11-281-4/+24
| | | | | | | | | | | | | | | | | | | | | | | | Certain ARM implementations treat icache clear instruction as a memory read, and CPU segfaults on trying to clear cache on !PROT_READ page. We workaround this in Memory::protectMappedMemory by adding PROT_READ to affected pages, clearing the cache, and then setting desired protection. This fixes "AllocationTests/MappedMemoryTest.***/3" unit-tests on affected hardware. Reviewers: psmith, zatrazz, kristof.beyls, lhames Reviewed By: lhames Subscribers: llvm-commits, krytarowski, peter.smith, jgreenhalgh, aemerson, rengolin Patch by maxim-kuvrykov! Differential Revision: https://reviews.llvm.org/D40423 llvm-svn: 319166
* [XRay][compiler-rt][Darwin] Minimal XRay build support in DarwinDean Michael Berris2017-11-287-70/+109
| | | | | | | | | | | | | | | | | | | | | | | This change is the first in a series of changes to get the XRay runtime building on macOS. This first allows us to build the minimal parts of XRay to get us started on supporting macOS development. These include: - CMake changes to allow targeting x86_64 initially. - Allowing for building the initialisation routines without `.preinit_array` support. - Use __sanitizer::SleepForMillis() to work around the lack of clock_nanosleep on macOS. - Deprecate the xray_fdr_log_grace_period_us flag, and introduce the xray_fdr_log_grace_period_ms flag instead, to use milliseconds across platforms. Reviewers: kubamracek Subscribers: llvm-commits, krytarowski, nglevin, mgorny Differential Review: https://reviews.llvm.org/D39114 llvm-svn: 319165
* Add a new pass to speculate around PHI nodes with constant (integer) ↵Chandler Carruth2017-11-288-0/+1527
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | operands when profitable. The core idea is to (re-)introduce some redundancies where their cost is hidden by the cost of materializing immediates for constant operands of PHI nodes. When the cost of the redundancies is covered by this, avoiding materializing the immediate has numerous benefits: 1) Less register pressure 2) Potential for further folding / combining 3) Potential for more efficient instructions due to immediate operand As a motivating example, consider the remarkably different cost on x86 of a SHL instruction with an immediate operand versus a register operand. This pattern turns up surprisingly frequently, but is somewhat rarely obvious as a significant performance problem. The pass is entirely target independent, but it does rely on the target cost model in TTI to decide when to speculate things around the PHI node. I've included x86-focused tests, but any target that sets up its immediate cost model should benefit from this pass. There is probably more that can be done in this space, but the pass as-is is enough to get some important performance on our internal benchmarks, and should be generally performance neutral, but help with more extensive benchmarking is always welcome. One awkward part is that this pass has to be scheduled after *everything* that can eliminate these kinds of redundancies. This includes SimplifyCFG, GVN, etc. I'm open to suggestions about better places to put this. We could in theory make it part of the codegen pass pipeline, but there doesn't really seem to be a good reason for that -- it isn't "lowering" in any sense and only relies on pretty standard cost model based TTI queries, so it seems to fit well with the "optimization" pipeline model. Still, further thoughts on the pipeline position are welcome. I've also only implemented this in the new pass manager. If folks are very interested, I can try to add it to the old PM as well, but I didn't really see much point (my use case is already switched over to the new PM). I've tested this pretty heavily without issue. A wide range of benchmarks internally show no change outside the noise, and I don't see any significant changes in SPEC either. However, the size class computation in tcmalloc is substantially improved by this, which turns into a 2% to 4% win on the hottest path through tcmalloc for us, so there are definitely important cases where this is going to make a substantial difference. Differential revision: https://reviews.llvm.org/D37467 llvm-svn: 319164
* Correct mangled_sp on NetBSD/amd64 in TSanKamil Rytarowski2017-11-281-2/+4
| | | | | | | | | | | | The proper index is 6, not 2. Patch extracted from https://reviews.llvm.org/D40337 Reviewed and accepted by <dvyukov>. Sponsored by <The NetBSD Foundation> llvm-svn: 319163
* elf-core: Convert remaining register context to use register set mapsPavel Labath2017-11-2823-195/+226
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In https://reviews.llvm.org/D39681, we started using a map instead passing a long list of register sets to the ppc64le register context. However, existing register contexts were still using the old method. This converts the remaining register contexts to use this approach. While doing that, I've had to modify the approach a bit: - the general purpose register set is still kept as a separate field, because this one is always present, and it's parsing is somewhat different than that of other register sets. - since the same register sets have different IDs on different operating systems, but we use the same register context class to represent different register sets, I've needed to add a layer of indirection to translate os-specific constants (e.g. NETBSD::NT_AMD64_FPREGS) into more generic terms (e.g. floating point register set). While slightly more complicated, this setup allows for better separation of concerns. The parsing code in ProcessElfCore can focus on parsing OS-specific core file notes, and can completely ignore architecture-specific register sets (by just storing any unrecognised notes in a map). These notes will then be passed on to the architecture-specific register context, which can just deal with architecture specifics, because the OS-specific note types are hidden in a register set description map. This way, adding an register set, which is already supported on other OSes, to a new OS, should in most cases be as simple as adding a new entry into the register set description map. Differential Revision: https://reviews.llvm.org/D40133 llvm-svn: 319162
* Fix floating point register write on new x86 linux kernelsPavel Labath2017-11-285-12/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: New linux kernels (on systems that support the XSAVES instruction) will not update the inferior registers unless the corresponding flag in the XSAVE header is set. Normally this flag will be set in our image of the XSAVE area (since we obtained it from the kernel), but if the inferior has never used the corresponding register set, the respective flag can be clear. This fixes the issue by making sure we explicitly set the flags corresponding to the registers we modify. I don't try to precisely match the flags to set on each write, as the rules could get quite complicated -- I use a simpler over-approximation instead. This was already caught by test_fp_register_write, but that was only because the code that ran before main() did not use some of the register sets. Since nothing in this test relies on being stopped in main(), I modify the test to stop at the entry point instead, so we can be sure the inferior did not have a chance to access these registers. Reviewers: clayborg, valentinagiusti Subscribers: lldb-commits Differential Revision: https://reviews.llvm.org/D40434 llvm-svn: 319161
* Handle symbol renaming of sigaction for NetBSDKamil Rytarowski2017-11-282-6/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: NetBSD uses the __sigaction14 symbol name for historical and compat reasons for the sigaction(2) function name. Rename the interceptors and users of sigaction to sigaction_symname and reuse it in the code base. This change fixes 4 failing tests in TSan/NetBSD: - ThreadSanitizer-x86_64 :: signal_errno.cc - ThreadSanitizer-x86_64 :: signal_malloc.cc - ThreadSanitizer-x86_64 :: signal_sync2.cc - ThreadSanitizer-x86_64 :: signal_thread.cc Sponsored by <The NetBSD Foundation> Reviewers: joerg, vitalybuka, eugenis, dvyukov, kcc Reviewed By: dvyukov Subscribers: kubamracek, llvm-commits, #sanitizers Tags: #sanitizers Differential Revision: https://reviews.llvm.org/D40341 llvm-svn: 319160
* [clangd] Switch from YAMLParser to JSONExprSam McCall2017-11-2814-994/+427
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: - Converted Protocol.h parse() functions to take JSON::Expr. These no longer detect and log unknown fields, as this is not that useful and no longer free. I haven't changed the error handling too much: fields that were treated as optional before are still optional, even when it's wrong. Exception: object properties with the wrong type are now ignored. - Made JSONRPCDispatcher parse using json::parse - The bug where 'method' must come before 'params' in the stream is fixed as a side-effect. (And the same bug in executeCommand). - Some parser crashers fixed as a side effect. e.g. https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=3890 - The debug stream now prettyprints the input messages with --pretty. - Request params are attached to traces when tracing is enabled. - Fixed some bugs in tests (errors tolerated by YAMLParser, and off-by-ones in Content-Length that our null-termination was masking) - Fixed a random double-escape bug in ClangdLSPServer (it was our last use of YAMLParser!) Reviewers: ilya-biryukov Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D40406 llvm-svn: 319159
* [TailRecursionElimination] Skip debug intrinsics.Florian Hahn2017-11-282-3/+3
| | | | | | | | | | | | | | | | | | | | | | Summary: I think we do not need to analyze debug intrinsics here, as they should not impact codegen. This has 2 benefits: 1) slightly less work to do and 2) avoiding generating optimization remarks for converting calls to debug intrinsics to tail calls, which are not really helpful for users. Based on work by Sander de Smalen. Reviewers: davide, trentxintong, aprantl Reviewed By: aprantl Subscribers: llvm-commits, JDevlieghere Tags: #debug-info Differential Revision: https://reviews.llvm.org/D40440 llvm-svn: 319158
* [clangd] Add missing (but documented!) JSONExpr typed accessorsSam McCall2017-11-283-22/+141
| | | | | | | | | | | | | | Summary: Noticed this when I tried to port the Protocol.h parsers. And tests for the inspect API, which caught a small bug. Reviewers: ioeric Subscribers: ilya-biryukov Differential Revision: https://reviews.llvm.org/D40399 llvm-svn: 319157
* AMDGPU: Re-organize the outer loop of SILoadStoreOptimizerNicolai Haehnle2017-11-281-6/+5
| | | | | | | | | | | | | | | | | | | Summary: The entire algorithm operates per basic-block, so for cache locality it should be better to re-optimize a basic-block immediately rather than in a separate loop. I don't have performance measurements. Change-Id: I85106570bd623c4ff277faaa50ee43258e1ddcc5 Reviewers: arsenm, rampitec Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye Differential Revision: https://reviews.llvm.org/D40344 llvm-svn: 319156
* AMDGPU: Consistently check for immediates in SIInstrInfo::FoldImmediateNicolai Haehnle2017-11-281-23/+22
| | | | | | | | | | | | | | | | | | | | | | | Summary: The PeepholeOptimizer pass calls this function solely based on checking DefMI->isMoveImmediate(), which only checks the MoveImm bit of the instruction description. So it's up to FoldImmediate itself to properly check that DefMI *actually* moves from an immediate. I don't have a separate test case for this, but the next patch introduces a test case which happens to crash without this change. This error is caught by the assertion in MachineOperand::getImm(). Change-Id: I88e7cdbcf54d75e1a296822e6fe5f9a5f095bbf8 Reviewers: arsenm, rampitec Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits Differential Revision: https://reviews.llvm.org/D40342 llvm-svn: 319155
* Revert r319008, "[ELF] Do not keep symbols if they referenced only from ↵Igor Kudrin2017-11-287-108/+14
| | | | | | | | | | | discarded sections." and r319051, "Add a missing test." r319008 broke the LTO bots; r319051 depends on changes in r319008. llvm-svn: 319154
* [SCEV][NFC] More efficient caching in CompareValueComplexityMax Kazantsev2017-11-281-4/+4
| | | | | | | | | | | | | | Currently, we use a set of pairs to cache responces like `CompareValueComplexity(X, Y) == 0`. If we had proved that `CompareValueComplexity(S1, S2) == 0` and `CompareValueComplexity(S2, S3) == 0`, this cache does not allow us to prove that `CompareValueComplexity(S1, S3)` is also `0`. This patch replaces this set with `EquivalenceClasses` that merges Values into equivalence sets so that any two values from the same set are equal from point of `CompareValueComplexity`. This, in particular, allows us to prove the fact from example above. Differential Revision: https://reviews.llvm.org/D40429 llvm-svn: 319153
* Fix shared library builds of lld, broken in SVN r319138Martin Storsjo2017-11-282-1/+1
| | | | llvm-svn: 319152
* [COFF] Interpret a period as a separator for section suffix just like '$'Martin Storsjo2017-11-282-0/+35
| | | | | | | | | | | This allows grouping all sections like ".ctors.12345" into ".ctors". For MinGW, the numerical values for such ctors are all zero-padded, so a lexical sort is good enough. Differential Revision: https://reviews.llvm.org/D40408 llvm-svn: 319151
* [COFF] Implement constructor prioritiesMartin Storsjo2017-11-282-9/+55
| | | | | | | | | | | The priorities in the section name suffixes are zero padded, allowing the linker to just do a lexical sort. Add zero padding for .ctors sections in ELF as well. Differential Revision: https://reviews.llvm.org/D40407 llvm-svn: 319150
* [SCEV][NFC] More efficient caching in CompareSCEVComplexityMax Kazantsev2017-11-281-8/+9
| | | | | | | | | | | | | Currently, we use a set of pairs to cache responces like `CompareSCEVComplexity(X, Y) == 0`. If we had proved that `CompareSCEVComplexity(S1, S2) == 0` and `CompareSCEVComplexity(S2, S3) == 0`, this cache does not allow us to prove that `CompareSCEVComplexity(S1, S3)` is also `0`. This patch replaces this set with `EquivalenceClasses` any two values from the same set are equal from point of `CompareSCEVComplexity`. This, in particular, allows us to prove the fact from example above. Differential Revision: https://reviews.llvm.org/D40428 llvm-svn: 319149
* run-clang-tidy: Use check_call instead of check_outputKevin Funk2017-11-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Streamlines the output under Python 3.x. Before: ``` b'Enabled checks:\n clang-analyzer-apiModeling.google.GTest\n ... ``` After: ``` Enabled checks: clang-analyzer-apiModeling.google.GTest ... ``` Reviewers: cfe-commits, alexfh Reviewed By: alexfh Subscribers: JDevlieghere Differential Revision: https://reviews.llvm.org/D37482 Change-Id: I6287104bc73926ae6d0f66c15c250c3cb44bee33 llvm-svn: 319148
* [GVN] Prevent ScalarPRE from hoisting across instructions that don't pass ↵Max Kazantsev2017-11-282-0/+139
| | | | | | | | | | | | control flow to successors This is to address a problem similar to those in D37460 for Scalar PRE. We should not PRE across an instruction that may not pass execution to its successor unless it is safe to speculatively execute it. Differential Revision: https://reviews.llvm.org/D38619 llvm-svn: 319147
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