| Commit message (Collapse) | Author | Age | Files | Lines | 
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Thanks Chandler!
llvm-svn: 180592
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Original commit message:
Fix a case in linkage computation that should check for single line extern "C".
llvm-svn: 180591
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that were once autoreleaseRV instructions."
This reverts commit r180222.
I think this might tie in with a different problem which will require a
different approach potentially. I am reverting this in the case I need to go
down that second path.
My apologies for the noise. = /.
llvm-svn: 180590
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instead of catting it into the documentation itself.
llvm-svn: 180589
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llvm-svn: 180588
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It makes more sense to have git-svnup here than catting said file in the
documentation (where we should rather point users to this directory).
I included git-svnrevert as an additional gift to the community. I will update
the documentation in a second commit later today.
git-svnrevert takes in a git hash for a commit, looks up the svn revision for
said commit and then creates the normal git revert commit message with the one
liner message, except instead of saying
  Revert "<<<INSERT ONELINER HERE>>>"
  This reverts commit <<<INSERT GITHASH HERE>>>
It says:
  Revert "<<<INSERT ONELINER HERE>>>"
  This reverts commit r<<<INSERT SVN REVISION HERE>>>
so git hashes will not escape into our svn logs (which just look unseemly).
llvm-svn: 180587
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Thanks to Bill Wendling for the original testcase.
llvm-svn: 180586
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llvm-svn: 180585
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Mips have delayslots for certain instructions 
like jumps and branches. These are instructions 
that follow the branch or jump and are executed
before the jump or branch is completed.
Early Mips compilers could not cope with delayslots
and left them up to the assembler. The assembler would
fill the delayslots with the appropriate instruction,
usually just a nop to allow correct runtime behavior.
The default behavior for this is set with .set reorder.
To tell the assembler that you don't want it to mess with
the delayslot one used .set noreorder.
For backwards compatibility we need to support
.set reorder and have it be the default behavior in the 
assembler.
Our support for it is to insert a NOP directly after an
instruction with a delayslot when in .set reorder mode.
Contributer: Vladimir Medic
llvm-svn: 180584
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llvm-svn: 180583
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llvm-svn: 180582
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Patch by Ashok Thirumurthi.
llvm-svn: 180581
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patch -n r180198.
When reporting on missing property accessor implementation in
categories, do not report when they are declared in primary class,
class's protocol, or one of it super classes or in of the other
categories. // rdar://13713098
llvm-svn: 180580
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llvm-svn: 180579
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Pattern has source location by itself. After adding a trivial method to
retrieve it, it's unnecessary to pair a source location for CHECK-NOT patterns.
One thing revised after this is the diagnostic info is more accurate by
pointing to the start of the CHECK-NOT pattern instead of the end of the
CHECK-NOT pattern. E.g. diagnostic message previously looks like
    <stdin>:1:1: error: CHECK-NOT: string occurred!
    test
    ^
    test.txt:1:16: note: CHECK-NOT: pattern specified here
    CHECK-NOT: test
                   ^
is changed to
    <stdin>:1:1: error: CHECK-NOT: string occurred!
    test
    ^
    test.txt:1:12: note: CHECK-NOT: pattern specified here
    CHECK-NOT: test
               ^
llvm-svn: 180578
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Expunge all remaining traces and use of live variable information.
llvm-svn: 180577
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Reflect this in the cost model. I observed this in MiBench/consumer-lame.
radar://13354716
llvm-svn: 180576
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llvm-svn: 180575
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llvm-svn: 180574
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latency for certain models of the Intel Atom family, by converting
instructions into their equivalent LEA instructions, when it is both
useful and possible to do so.
llvm-svn: 180573
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- Adds unique enums for ymm registers to the ABI and the POSIX register context.
- Reworks the register context data structures to support a union of FXSAVE and XSAVE
--- Allows the same code base to deal with the FPU independent of the availability of AVX.
- Determine if AVX is supported by attempting to read XSAVE using ptrace.
--- Support an extended register set for avx registers if available.
- Provide a mechanism to assemble/parse register halves into a single ymm buffer for use with RegisterValue.
--- Reworked Read/WriteRegister routines to read/write/parse ymm registers.
Adds tests for ymm register write with read-back, and expressions involving ymm registers.
- Tests vary depending on the availability of an avx register set.
Thanks to Daniel and Matt for their reviews.
llvm-svn: 180572
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When we find a friend declaration we have to skip transparent contexts for doing
lookups, but we should not skip them when inserting the new decl if the lookup
found nothing.
Fixes PR15841.
llvm-svn: 180571
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readonly pointers.
llvm-svn: 180570
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Summary:
This is modelled on the Mach-O linker options implementation and should
support a Clang implementation of #pragma comment(lib/linker).
Reviewers: rafael
CC: llvm-commits
Differential Revision: http://llvm-reviews.chandlerc.com/D724
llvm-svn: 180569
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Patch by Kai Nacke. This matches the gnu as output.
llvm-svn: 180568
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interpreter.  They are a legacy from when the IR
interpreter didn't work with materialized values
but rather got values directly from
ClangExpressionDeclMap.
Also updated the #includes for IRInterpreter
accordingly.
llvm-svn: 180565
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llvm-svn: 180564
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disabled.
llvm-svn: 180563
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assembly is requesting a 64-bit register, which is invalid for i386.
rdar://13731657
llvm-svn: 180445
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When computing the other parameters, ‘op’ is checked for being null before it’s dereferenced.
llvm-svn: 180271
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llvm-svn: 180268
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llvm-svn: 180267
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llvm-svn: 180266
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Otherwise we are picking up an extra libstdc++ dependency.
llvm-svn: 180265
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Deeply nested expressions basically break clang-format's memoization.
This patch slightly improves the situations and makes expressions like
  aaaaa(aaaaa(aaaaa(aaaaa(aaaaa(aaaaa(aaaaa(aaaaa(
      aaaaa(aaaaa(aaaaa(aaaaa(aaaaa(aaaaa(aaaaa(aaaaa(aaaaa(aaaaa(aaaaa(
          aaaaa(aaaaa(aaaaa(aaaaa(aaaaa(aaaaa(aaaaa(aaaaa(aaaaa(aaaaa(
              aaaaa(aaaaa(aaaaa(aaaaa(aaaaa(aaaaa(aaaaa(aaaaa(aaaaa(
                  aaaaa(aaaaa())))))))))))))))))))))))))))))))))))))));
work.
llvm-svn: 180264
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llvm-svn: 180263
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Since the relocation iterator walks only the relocations in one section, we
can just use a pointer and avoid fetching information about the section at
every reference.
llvm-svn: 180262
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getRelocationAddress is for dynamic libraries and executables,
getRelocationOffset for relocatable objects.
Mark the getRelocationAddress of COFF and MachO as not implemented yet. Add a
test of ELF's. llvm-readobj -r now prints the same values as readelf -r.
llvm-svn: 180259
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Instead, we check for one line extern "C" context in linkage computation and
when deciding if a variable is a definition.
This hopefully completes the transition to having "as written" semantics for
hasExternalStorage.
llvm-svn: 180258
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installed by ASan
llvm-svn: 180255
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vector types not returns a vector instead of a scalar.
llvm-svn: 180254
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This enables formattings like:
  #define A   \
    int aaaa; \
    int b;    \
    int ccc;  \
    int dddddddddd;
Enabling this for Google/Chromium styles only as I don't know whether it
is desired for Clang/LLVM.
llvm-svn: 180253
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This patch ensure that nothing scrolls even if the same buffer is opened
in multiple windows.
llvm-svn: 180252
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llvm-svn: 180251
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This includes the following fixes:
 - Implement 4 subtly different variants of qualifier mangling and use them
   in what I believe are the right places.
 - Fix handling of array types.  Previously we were always decaying them,
   which is wrong if the type appears as a template argument, pointee,
   referent etc.
Fixes PR13182.
Differential Revision: http://llvm-reviews.chandlerc.com/D709
llvm-svn: 180250
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This reverts commit 07f03923137a91e3cca5d7fc075a22f8c9baf33a.
Looks like it broke the valgrind bot:
http://lab.llvm.org:8011/builders/llvm-x86_64-linux-vg_leak/builds/649
llvm-svn: 180249
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This reverts commit 8c31b298149ca3c3f2bbd9e8aa9a01c4d91f3d74.
It looks like this commit broke some bots:
http://lab.llvm.org:8011/builders/llvm-ppc64-linux2/builds/5209
llvm-svn: 180248
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llvm-svn: 180247
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llvm-svn: 180246
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llvm-svn: 180245
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