summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
...
* [ConstantFolding] Don't create illegal (non-integral) inttoptrsSanjoy Das2016-08-052-3/+24
| | | | | | | | | | Reviewers: majnemer, arsenm Subscribers: mcrosier, llvm-commits Differential Revision: https://reviews.llvm.org/D23182 llvm-svn: 277854
* fix documentation comments; NFCSanjay Patel2016-08-051-320/+299
| | | | llvm-svn: 277853
* PR26423: Assert on valid use of using declaration of a function with an ↵David Blaikie2016-08-052-4/+32
| | | | | | | | | | | | undeduced auto return type For now just disregard the using declaration in this case. Suboptimal, but wiring up the ability to have declarations of functions that are separate from their definition (we currently only do that for member functions) and have differing return types (we don't have any support for that) is more work than seems reasonable to at least fix this crash. llvm-svn: 277852
* fix random typos [NFC]Etienne Bergeron2016-08-052-4/+4
| | | | llvm-svn: 277850
* [AutoFDO] Fix handling of empty profilesDavid Callahan2016-08-051-1/+4
| | | | | | | | | | | | | | | Summary: If a profile has no samples for a function, then the function "entry count" is set to the value 0. Several places in the code test that if the Function::getEntryCount is defined at all. Here we change to treat a 0 entry count the same as undefined. In particular, this fixes a problem in getLayoutSuccessorProbThreshold in MachineBlockPlacement.cpp where we use a different and inferior heuristic for laying out basic blocks. Reviewers: danielcdh, dnovillo Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D23082 llvm-svn: 277849
* [SCEV] Don't infinitely recurse on unreachable codeSanjoy Das2016-08-052-1/+31
| | | | llvm-svn: 277848
* [ORC] Change LogicalDylib::LogicalModuleHandle from an iterator to an index.Lang Hames2016-08-051-19/+20
| | | | | | | | | | | This prevents handles from being invalidated (through iterator invalidation) when new modules are added. No test-case yet: This bug was uncovered during work on an upcoming patch for weak symbol support and the testcase for that feature will implicitly test for correct behavior here. llvm-svn: 277847
* COFF ARM: Apply an existing offset in MOV32T relocationsSaleem Abdulrasool2016-08-052-4/+16
| | | | | | | | | | | Don't blindly OR in the new value, but clear the existing one, since it can be nonzero. Read out the existing value before, and add into the desired offset. (The add is done outside of the applyMOV, to handle potential overflow between the two.) Patch by Martin Storsjö! llvm-svn: 277846
* Add the first of what will be a long line of additional error checks for ↵Kevin Enderby2016-08-057-4/+18
| | | | | | | | | | | | | invalid Mach-O files. This is where an LC_SEGMENT load command has a fileoff field that extends past the end of the file. Also fix llvm-nm and llvm-size to remove the errorToErrorCode() call so error messages are printed. And needed to update a few test cases now that they do print the error messages just a bit differently. llvm-svn: 277845
* Tweaks to the reporting of "missing dyld shared cached" that make it easier ↵Enrico Granata2016-08-052-23/+69
| | | | | | to grab logs when such issues occur, make the logs more helpful, and also tweaks to the user messaging to make it easier to pinpoint an investigation avenue early on llvm-svn: 277844
* Do not assign new discriminator for all intrinsics.Dehao Chen2016-08-052-2/+8
| | | | | | | | | | | | Summary: We do not care about intrinsic calls when assigning discriminators. Reviewers: davidxl, dnovillo Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D23212 llvm-svn: 277843
* Fix dumping of process module list and test itReid Kleckner2016-08-052-2/+31
| | | | | | I probably broke this a year ago in r243895. llvm-svn: 277842
* GlobalISel: clear pending phis after MachineFunction translatedTim Northover2016-08-052-11/+13
| | | | | | | Test is just reordering the existing functions (it would trigger for any function after one with a phi). llvm-svn: 277841
* [SemaOpenMP] Some miscellaneous cleanupsDavid Majnemer2016-08-051-142/+139
| | | | | | | | Clean up some typos, follow the coding style a little more rigorously. No functionality change is intended. llvm-svn: 277840
* [X86][SSE] Add initial support for 2 input target shuffle combining.Simon Pilgrim2016-08-053-66/+71
| | | | | | At the moment only the INSERTPS matching can actually use 2 inputs but the plumbing is now in place. llvm-svn: 277839
* COFF ARM: Error out if 24 bit thumb branches are out of rangeSaleem Abdulrasool2016-08-053-0/+14
| | | | | | | | | In the ELF linker, the same situation already errors out with "relocation R_ARM_THM_CALL out of range". Patch by Martin Storsjö! llvm-svn: 277838
* [asan] Remove unused include (NFC)Vedant Kumar2016-08-051-1/+0
| | | | llvm-svn: 277837
* COFF ARM: Clear the J1 and J2 bits when applying relocations to 24 bit branchesSaleem Abdulrasool2016-08-052-3/+13
| | | | | | | | | | The opcode for the bl branches can initially be F000 F800, i.e. the J1 and J2 bits are already set. Therefore mask these bits out before or'ing in the new bits. Patch by Martin Storsjö! llvm-svn: 277836
* GlobalISel: IRTranslate PHI instructionsTim Northover2016-08-054-2/+78
| | | | llvm-svn: 277835
* builtins: windows has only one flavour on ARMSaleem Abdulrasool2016-08-051-2/+6
| | | | | | | Windows on ARM is a hard-float only environment. Don't try to build two copies of the same library. llvm-svn: 277834
* Fix gdb pretty printers to work with Python 3.Igor Kudrin2016-08-051-0/+4
| | | | | | Differential Revision: https://reviews.llvm.org/D23202 llvm-svn: 277833
* [CodeGen] Use MapVector instead of DenseMap.Michael Kruse2016-08-052-5/+5
| | | | | | | | | | | The map is iterated over when generating the values escaping the SCoP. The indeterministic iteration order of DenseMap causes the output IR to change at every compilation, adding noise to comparisons. Replace DenseMap by a MapVector to ensure the same iteration order at every compilation. llvm-svn: 277832
* Fix TargetParser unit tests for ARM / AArch64.Zachary Turner2016-08-051-4/+13
| | | | | | | | String pooling is not guaranteed by the standard, so if you're comparing two different string literals for equality, you have to use strcmp. llvm-svn: 277831
* Revert "[Sema] Add sizeof diagnostics for bzero"Bruno Cardoso Lopes2016-08-053-54/+3
| | | | | | This reverts commit r277787, which caused PR28870. llvm-svn: 277830
* opt: Adding -O0 to opt toolGor Nishanov2016-08-052-1/+15
| | | | | | | | | | | | | | Summary: Having -O0 in opt allows testing that -O0 optimization pipeline is built correctly. Reviewers: majnemer Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D23208 llvm-svn: 277829
* builtins: better categorisation of Thumb1 builtinsSaleem Abdulrasool2016-08-051-11/+18
| | | | | | | Adjust the builtins to better annotate the Thumb1 routines and their purpose. Exclude the remaining thumb1 sources on Windows ARM. llvm-svn: 277828
* [StreamExecutor] Add kernel typesJason Henline2016-08-059-1/+383
| | | | | | | | | | | | Summary: Add StreamExecutor kernel types. Reviewers: jlebar, tra Subscribers: parallel_libs-commits Differential Revision: https://reviews.llvm.org/D23138 llvm-svn: 277827
* Print a more useful BP value from MSVC-built ASan runtimesReid Kleckner2016-08-051-3/+3
| | | | | | | | MSVC doesn't have an exact equivalent for __builtin_frame_address, but _AddressOfReturnAddress() + sizeof(void*) should be equivalent for all frames build with -fno-omit-frame-pointer. llvm-svn: 277826
* Fixed x2APIC discovery for 256-processor architectures.Andrey Churbanov2016-08-051-3/+3
| | | | | | | | Mask for value read from ebx register returned by CPUID expanded to 0xFFFF. Differential Revision: https://reviews.llvm.org/D23203 llvm-svn: 277825
* AMDGPU : Add Clang builtin intrinsics for compare with the fullWei Ding2016-08-054-0/+89
| | | | | | | | wavefront result. Differential Revision: http://reviews.llvm.org/D22934 llvm-svn: 277824
* [PowerPC] Wrong fast-isel codegen for VSX floating-point loadsUlrich Weigand2016-08-052-12/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There were two locations where fast-isel would generate a LFD instruction with a target register class VSFRC instead of F8RC when VSX was enabled. This can ccause invalid registers to be used in certain cases, like: lfd 36, ... instead of using a VSX load instruction. The wrong register number gets silently truncated, causing invalid code to be generated. The first place is PPCFastISel::PPCEmitLoad, which had multiple problems: 1.) The IsVSSRC and IsVSFRC flags are not initialized correctly, since they are computed from resultReg, which is still zero at this point in many cases. Fixed by changing the helper routines to operate on a register class instead of a register and passing in UseRC. 2.) Even with this fixed, Is64VSXLoad is still wrong due to a typo: bool Is32VSXLoad = IsVSSRC && Opc == PPC::LFS; bool Is64VSXLoad = IsVSSRC && Opc == PPC::LFD; The second line needs to use isVSFRC (like PPCEmitStore does). 3.) Once both the above are fixed, we're now generating a VSX instruction -- but an incorrect one, since generation of an indexed instruction with null index is wrong. Fixed by copying the code handling the same issue in PPCEmitStore. The second place is PPCFastISel::PPCMaterializeFP, where we would emit an LFD to load a constant from the literal pool, and use the wrong result register class. Fixed by hardcoding a F8RC class even on systems supporting VSX. Fixes: https://llvm.org/bugs/show_bug.cgi?id=28630 Differential Revision: https://reviews.llvm.org/D22632 llvm-svn: 277823
* [SystemZ] Add missing classes and instructionsZhan Jun Liau2016-08-056-0/+464
| | | | | | | | | | | | | | | | Summary: Add instruction formats E, RSI, SSd, SSE, and SSF. Added BRXH, BRXLE, PR, MVCK, STRAG, and ECTG instructions to test out those formats. Reviewers: uweigand Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D23179 llvm-svn: 277822
* Actually, r277337 was fine. Just kill the DAGs that made the test allow ↵Benjamin Kramer2016-08-051-20/+20
| | | | | | nondeterminism. llvm-svn: 277821
* [SimplifyCFG] Make range reduction code deterministic.Benjamin Kramer2016-08-052-22/+23
| | | | | | | | | | | This generated IR based on the order of evaluation, which is different between GCC and Clang. With that in mind you get bootstrap miscompares if you compare a Clang built with GCC-built Clang vs. Clang built with Clang-built Clang. Diagnosing that made my head hurt. This also reverts commit r277337, which "fixed" the test case. llvm-svn: 277820
* reduce tests; auto-generate checksSanjay Patel2016-08-051-59/+68
| | | | llvm-svn: 277819
* [OpenMP] Sema and parsing for 'teams distribute' pragmaKelvin Li2016-08-0536-13/+3543
| | | | | | | | This patch is to implement sema and parsing for 'teams distribute' pragma. Differential Revision: https://reviews.llvm.org/D23189 llvm-svn: 277818
* [X86][SSE] Update the the target shuffle matches to use the effective mask's ↵Simon Pilgrim2016-08-051-31/+29
| | | | | | | | value type directly instead of via the input value type. Preparation for adding 2 input support so we want to avoid unnecessary references to the input value type. llvm-svn: 277817
* testing commit accessGor Nishanov2016-08-051-1/+1
| | | | llvm-svn: 277816
* [X86][SSE] Consistently use the target shuffle root value type for vector ↵Simon Pilgrim2016-08-051-11/+12
| | | | | | | | size calculations. NFCI. Preparation for adding 2 input support so we want to avoid unnecessary references to the input value type. llvm-svn: 277814
* LLLexer.cpp: Avoid using BitsToDouble() to preserve SNaN like "double ↵NAKAMURA Takumi2016-08-051-1/+2
| | | | | | | | | 0x7FF4000000000000". We should not use double (or float) in the LLVM, unless it is really needed. x87 FP register doesn't preserve SNaN to move the value. FIXME: APFloat() may have the constructor by raw bit. llvm-svn: 277813
* Reformat.NAKAMURA Takumi2016-08-051-1/+1
| | | | llvm-svn: 277812
* [include-fixer] Correct some header mappings.Haojian Wu2016-08-051-8/+8
| | | | | | | | | | Reviewers: bkramer Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D23199 llvm-svn: 277811
* [DependenceInfo] Reset operations counter when setting limit.Michael Kruse2016-08-051-1/+3
| | | | | | | | | | | | | | | | | When entering the dependence computation and the max_operations is set, the operations counter may have already exceeded the counter, thus aborting any ISL computation from the start. The counter is reset at the end of the dependence calculation such that a follow-up recomputation might succeed, ie. the success of the first dependence calculation depends on unrelated ISL operations that happened before, giving it a disadvantage to the following calculations. This patch resets the operations counter at the beginning of the dependence recalculation to not depend on previous actions. Otherwise additional preprocessing of the Scop that aims to improve its schedulability (eg. DeLICM) do have the effect that DependenceInfo and hence the scheduling fail more likely, contraproductive to the goal of said preprocessing. llvm-svn: 277810
* Add a missing backslash to my previous commitJohn Brawn2016-08-051-1/+1
| | | | llvm-svn: 277809
* [X86][SSE] Added target shuffle combine binary compute matching function. NFCI.Simon Pilgrim2016-08-051-72/+80
| | | | | | Added matchBinaryPermuteVectorShuffle and moved the blend+zero and insertps matching code into it. llvm-svn: 277808
* Reapply r276973 "Adjust Registry interface to not require plugins to export ↵John Brawn2016-08-0512-72/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | a registry" This differs from the previous version by being more careful about template instantiation/specialization in order to prevent errors when building with clang -Werror. Specifically: * begin is not defined in the template and is instead instantiated when Head is. I think the warning when we don't do that is wrong (PR28815) but for now at least do it this way to avoid the warning. * Instead of performing template specializations in LLVM_INSTANTIATE_REGISTRY instead provide a template definition then do explicit instantiation. No compiler I've tried has problems with doing it the other way, but strictly speaking it's not permitted by the C++ standard so better safe than sorry. Original commit message: Currently the Registry class contains the vestiges of a previous attempt to allow plugins to be used on Windows without using BUILD_SHARED_LIBS, where a plugin would have its own copy of a registry and export it to be imported by the tool that's loading the plugin. This only works if the plugin is entirely self-contained with the only interface between the plugin and tool being the registry, and in particular this conflicts with how IR pass plugins work. This patch changes things so that instead the add_node function of the registry is exported by the tool and then imported by the plugin, which solves this problem and also means that instead of every plugin having to export every registry they use instead LLVM only has to export the add_node functions. This allows plugins that use a registry to work on Windows if LLVM_EXPORT_SYMBOLS_FOR_PLUGINS is used. llvm-svn: 277806
* [PowerPC] fix passing long double arguments to function (soft-float)Strahinja Petrovic2016-08-054-0/+65
| | | | | | | | | | This patch fixes passing long double type arguments to function in soft float mode. If there is less than 4 argument registers free (long double type is mapped in 4 gpr registers in soft float mode) long double type argument must be passed through stack. Differential Revision: https://reviews.llvm.org/D20114. llvm-svn: 277804
* GPGPU: Sort dimension sizes of multi-dimensional shared memory arrays correctlyTobias Grosser2016-08-052-1/+110
| | | | | | | | | | Before this commit we generated the array type in reverse order and we also added the outermost dimension size to the new array declaration, which is incorrect as Polly additionally assumed an additional unsized outermost dimension, such that we had an off-by-one error in the linearization of access expressions. llvm-svn: 277802
* [InstCombine] try to fold (select C, (sext A), B) into logical opsNicolai Haehnle2016-08-054-28/+109
| | | | | | | | | | | | | | | | | | | | | | Summary: Turn (select C, (sext A), B) into (sext (select C, A, B')) when A is i1 and B is a compatible constant, also for zext instead of sext. This will then be further folded into logical operations. The transformation would be valid for non-i1 types as well, but other parts of InstCombine prefer to have sext from non-i1 as an operand of select. Motivated by the shader compiler frontend in Mesa for AMDGPU, which emits i32 for boolean operations. With this change, the boolean logic is fully recovered. Reviewers: majnemer, spatel, tstellarAMD Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D22747 llvm-svn: 277801
* Add missing 'REQUIRES' lineTobias Grosser2016-08-051-0/+2
| | | | llvm-svn: 277800
OpenPOWER on IntegriCloud