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* [clangd] Get rid of unnecessary global variable. No functionality change.Benjamin Kramer2017-12-282-2/+2
| | | | llvm-svn: 321525
* [X86][PREFETCH]: Adding full coverage of MC encoding for the PREFETCH isa ↵Gadi Haber2017-12-282-0/+339
| | | | | | | | | | | | | | sets.<NFC> NFC. Adding MC regressions tests to cover the PREFETCH isa sets for both 32 and 64 bit. This patch is part of a larger task to cover MC encoding of all X86 ISA Sets started in revision: https://reviews.llvm.org/D39952 Reviewers: zvi, craig.topper, RKSimon, AndreiGrischenko Differential Revision: https://reviews.llvm.org/D41161 Change-Id: Icdc8c5fb68c414de7d2cfdb50da1cc6763d9932a llvm-svn: 321524
* [clangd] Simplify code. No functionality change intended.Benjamin Kramer2017-12-287-34/+23
| | | | llvm-svn: 321523
* [dsymutil][NFC] Replace calls to CoreFoundation with LLVM equivalent.Jonas Devlieghere2017-12-281-54/+34
| | | | | | | | This patch replaces a block of logic that was implemented using CoreFoundations calls with functionally equivalent logic that makes use of LLVM libraries. llvm-svn: 321522
* [clangd] Skip function bodies when building the preambleIlya Biryukov2017-12-281-0/+10
| | | | | | | | | | | | | | Summary: To make building preambles faster and keep them smaller. Reviewers: sammccall Reviewed By: sammccall Subscribers: klimek, cfe-commits Differential Revision: https://reviews.llvm.org/D41495 llvm-svn: 321521
* [Frontend] Correctly handle instantiating ctors with skipped bodiesIlya Biryukov2017-12-282-13/+29
| | | | | | | | | | | | | | | | Summary: Previsouly clang tried instantiating member initializers even if ctor body was skipped, this caused spurious errors (see the test). Reviewers: sepavloff, klimek Reviewed By: sepavloff Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D41492 llvm-svn: 321520
* -fsanitize=vptr warnings on bad static types in dynamic_cast and typeidStephan Bergmann2017-12-284-8/+39
| | | | | | | | | | ...when such an operation is done on an object during con-/destruction. This is the cfe part of a patch covering both cfe and compiler-rt. Differential Revision: https://reviews.llvm.org/D40295 llvm-svn: 321519
* -fsanitize=vptr warnings on bad static types in dynamic_cast and typeidStephan Bergmann2017-12-282-25/+93
| | | | | | | | | | | | | | | | ...when such an operation is done on an object during con-/destruction. (This adds a test case to compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp that, unlike the existing test cases there, wants to detect multiple UBSan warnings in one go. Therefore, that file had to be changed from globally using -fno-sanitize-recover to individually using halt_on_error only where appropriate.) This is the compiler-rt part of a patch covering both cfe and compiler-rt. Differential Revision: https://reviews.llvm.org/D40295 llvm-svn: 321518
* [RewriteStatepoints] Fix incorrect assertionMax Kazantsev2017-12-282-7/+40
| | | | | | | | | | | | | | | | | | | | `RewriteStatepointsForGC` iterates over function blocks and their predecessors in order of declaration. One of outcomes of this is that callsites are placed in arbitrary order which has nothing to do with travelsar order. On the other hand, function `recomputeLiveInValues` asserts that bases are added to `Info.PointerToBase` before their deried pointers are updated. But if call sites are processed in order different from RPOT, this is not necessarily true. We cannot guarantee that the base was placed there before every pointer derived from it. All we can guarantee is that this base was marked as known base by this point. This patch replaces the fact that we assert from checking that the base was added to the map with assert that the base was marked as known base. Differential Revision: https://reviews.llvm.org/D41593 llvm-svn: 321517
* [X86][SSE] Use PMADDWD for v4i32 multiplies with 17 or more leading zerosSimon Pilgrim2017-12-283-40/+36
| | | | | | | | | | If there are 17 or more leading zeros to the v4i32 elements, then we can use PMADD for the integer multiply when PMULLD is unavailable or slow. The 17 bits need to be zero as the PMADDWD performs a v8i16 signed-mul-extend + pairwise-add - the upper 16 so we're adding a zero pair and the 17th bit so we don't incorrectly sign extend. Differential Revision: https://reviews.llvm.org/D41484 llvm-svn: 321516
* [InstCombine] Check for isa<Instruction> before using cast<>Simon Pilgrim2017-12-282-1/+14
| | | | | | | | Protects against casts from constexpr etc. Reduced from oss-fuzz #4788 test case llvm-svn: 321515
* Remove duplicate declaration from D41550; NFC Aaron Smith2017-12-281-4/+0
| | | | llvm-svn: 321514
* Do not parse the same /export string more than once.Rui Ueyama2017-12-282-0/+10
| | | | | | Differential Revision: https://reviews.llvm.org/D41607 llvm-svn: 321513
* [COFF] support /ignore:4217Bob Haarman2017-12-285-7/+90
| | | | | | | | | | | | | | | | | | | | | | | Summary: lld-link accepts link.exe's /ignore option, but used to ignore it. This can lead to semantic differences when warnings are treated as fatal errors. One such case is when we resolve an __imp_ symbol to a local definition. We emit a warning in that case, which /wx turns into a fatal. This change makes lld-link accept /ignore:4217 to suppress that warning, so that code that links with link.exe /wx /ignore:4217 links with lld-link, too. Fixes PR35762. Reviewers: rnk, ruiu Reviewed By: ruiu Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D41606 llvm-svn: 321512
* Update failing PDB unit tests that are searching for symbols by regexAaron Smith2017-12-282-12/+12
| | | | | | | | | | | | Summary: D41086 fixed an exception in FindTypes()/FindTypesByRegex() and caused two lldb unit test to fail. This change updates the unit tests to pass again. Reviewers: zturner, lldb-commits, labath, clayborg, asmith Reviewed By: asmith Differential Revision: https://reviews.llvm.org/D41550 llvm-svn: 321511
* Revert "[memcpyopt] Teach memcpyopt to optimize across basic blocks"Reid Kleckner2017-12-287-306/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts r321138. It seems there are still underlying issues with memdep. PR35519 seems to still be present if debug info is enabled. We end up losing a memcpy. Somehow during store to memset merging, we insert the memset after the memcpy or fail to update the memdep analysis to account for the newly inserted memset of a pair. Reduced test case: #include <assert.h> #include <stdio.h> #include <string> #include <utility> #include <vector> void do_push_back( std::vector<std::pair<std::string, std::vector<std::string>>>* crls) { crls->push_back(std::make_pair(std::string(), std::vector<std::string>())); } int __attribute__((optnone)) main() { // Put some data in the vector and then remove it so we take the push_back // fast path. std::vector<std::pair<std::string, std::vector<std::string>>> crl_set; crl_set.push_back({"asdf", {}}); crl_set.pop_back(); printf("first word in vector storage: %p\n", *(void**)crl_set.data()); // Do the push_back which may fail to initialize the data. do_push_back(&crl_set); auto* first = &crl_set.back().first; printf("first word in vector storage (should be zero): %p\n", *(void**)crl_set.data()); assert(first->empty()); puts("ok"); } Compile with libc++, enable optimizations, and enable debug info: $ clang++ -stdlib=libc++ -g -O2 t.cpp -o t.exe -Wl,-rpath=llvm/build/lib This program will assert with this change. llvm-svn: 321510
* [bindings/go] fix vet errorsAndrew Wilkins2017-12-281-2/+2
| | | | | | | | | | Fix "go vet" errors, which will be run automatically with "go test" as of Go 1.10. Patch by Karsten Weiss! llvm-svn: 321509
* AMDGPU: Add MMO to atomic_inc/decMatt Arsenault2017-12-281-1/+2
| | | | | | | This doesn't really change anything because these already had custom node wrappers. llvm-svn: 321508
* Allow copy relocation with -z notext.Rafael Espindola2017-12-285-7/+31
| | | | | | | | | | This makes adjustExpr a bit simpler too IMHO. It seems that some of the complication around relocation processing is that we are trying to create copy relocations too early. It seems we could handle a few simple cases first and continue. llvm-svn: 321507
* [X86] Don't accidentally enable PKU on cannon lake and icelake or CLWB on ↵Craig Topper2017-12-272-2/+10
| | | | | | | | cannonlake. We have cannonlake and icelake inheriting from skylake server in a switch using fallthroughs. But they aren't perfect supersets of skylake server. llvm-svn: 321504
* [X86] Test that -march=skx enables PKU.Craig Topper2017-12-271-0/+2
| | | | llvm-svn: 321503
* [X86] Enable avx512vpopcntdq and clwb for icelake.Craig Topper2017-12-272-1/+6
| | | | | | Per table 1-1 of the October 2017 edition of Intel® Architecture Instruction Set Extensions and Future Features Programming Reference llvm-svn: 321502
* [X86] Add CLWB to icelake.Craig Topper2017-12-271-1/+2
| | | | | | Per Table 1-1 in October 2017 edition of Intel® Architecture Instruction Set Extensions and Future Features llvm-svn: 321501
* [InstCombine] add tests for min/max folds (PR35717); NFCSanjay Patel2017-12-271-0/+155
| | | | llvm-svn: 321500
* Don't try to preempt protected symbols with -z notext.Rafael Espindola2017-12-273-10/+26
| | | | | | I will send a followup patch removing the FIXME this patch adds. llvm-svn: 321499
* [llvm-readobj] Support -needed-libs option for COFF filesPetr Hosek2017-12-273-0/+27
| | | | | | | | This implements the -needed-libs option in the COFF dumper. Differential Revision: https://reviews.llvm.org/D41529 llvm-svn: 321498
* A special test to demonstrate debug logging for asm matcher.Andrew V. Tischenko2017-12-271-0/+52
| | | | llvm-svn: 321497
* [X86] Reimplement r321437 using custom lowering instead of as a DAG combine.Craig Topper2017-12-272-45/+8
| | | | | | | | My original implementation ran as a DAG combine post type legalization, but it turns out we don't run that DAG combine step if type legalization didn't change anything. Attempts to make the combine run before type legalization as well hit other issues. So just do it in LowerMUL where we can catch more cases. llvm-svn: 321496
* [OPENMP] Support for `depend` clauses on `target enter|exit data`.Alexey Bataev2017-12-273-4/+760
| | | | | | Added codegen for `depend` clauses on `target enter|exit data` directives. llvm-svn: 321495
* [NFC] Small const correctness fixHamza Sood2017-12-271-2/+3
| | | | llvm-svn: 321494
* [OPENMP] Support for `depend` clauses on `target data update`.Alexey Bataev2017-12-275-81/+640
| | | | | | Added codegen for `depend` clauses on `target data update` directives. llvm-svn: 321493
* [ASTImporter] Support importing FunctionTemplateDecl and ↵Aleksei Sidorin2017-12-272-0/+156
| | | | | | | | | | | | | | | CXXDependentScopeMemberExpr * Also introduces ImportTemplateArgumentListInfo facility (A. Sidorin) This re-commits r320942 after fixing the behaviour on '-fdelayed-template-parsing' option and adding additional checks. Patch by Peter Szecsi! Differential Revision: https://reviews.llvm.org/D38692 llvm-svn: 321492
* [AArch64] Change order of candidate FMLS patternsMatthew Simpson2017-12-272-26/+105
| | | | | | | | | | | | | | | | | | | | | r319980 added new patterns to the machine combiner for transforming (fsub (fmul x y) z) into (fmla (fneg z) x y). That is, fsub's where the first source operand is an fmul are transformed. We previously only matched the case where the second source operand of an fsub was an fmul, transforming (fsub z (fmul x y)) into (fmls z x y). Now, if we have an fsub where both source operands are fmuls, both of the above patterns are applicable. However, the order in which we add the patterns to the list of candidates determines the transformation that takes place, since only the first pattern that matches will be used. This patch changes the order these two patterns are added to the list of candidates such that we prefer the case where the second source operand is an fmul (the fmls case), rather than the other one (the fmla/fneg case). When both source operands are fmuls, this ordering results in fewer instructions. Differential Revision: https://reviews.llvm.org/D41587 llvm-svn: 321491
* [X86] Fix vmul combine for AVX1 targets.Benjamin Kramer2017-12-272-0/+48
| | | | | | v8i32 is legal von AVX1, but it doesn't have pmuludq for it. llvm-svn: 321490
* [InstCombine] Gracefully handle out of range extractelement indicesSimon Pilgrim2017-12-272-3/+16
| | | | | | | | InstSimplify is responsible for handling these, but we shouldn't just assert here. Reduced from oss-fuzz #4808 test case llvm-svn: 321489
* [DAGCombine] foldBinOpIntoSelect can fail to constant fold in some cases.Simon Pilgrim2017-12-272-6/+43
| | | | | | | | For example, float operations may fail to constant fold under certain circumstances (inf/nan/denormal creation etc.) Reduced from oss-fuzz #4802 test case llvm-svn: 321488
* [x86][icelake][vbmi2]Coby Tayree2017-12-2714-13/+2202
| | | | | | | | | | | | | | | added vbmi2 feature recognition added intrinsics support for vbmi2 instructions _mm[128,256,512]_mask[z]_compress_epi[16,32] _mm[128,256,512]_mask_compressstoreu_epi[16,32] _mm[128,256,512]_mask[z]_expand_epi[16,32] _mm[128,256,512]_mask[z]_expandloadu_epi[16,32] _mm[128,256,512]_mask[z]_sh[l,r]di_epi[16,32,64] _mm[128,256,512]_mask_sh[l,r]dv_epi[16,32,64] matching a similar work on the backend (D40206) Differential Revision: https://reviews.llvm.org/D41557 llvm-svn: 321487
* [OpenMP] Further adjustments of nvptx runtime functionsJonas Hahnfeld2017-12-273-15/+24
| | | | | | | | Pass in default value of 1, similar to previous commit r318836. Differential Revision: https://reviews.llvm.org/D41012 llvm-svn: 321486
* [XRay] Add missing include to unit testJonas Hahnfeld2017-12-271-0/+1
| | | | | | | FDRLoggingTest::MultiThreadedCycling uses std::array so we need to include the right C++ header and not rely on transitive dependencies. llvm-svn: 321485
* [x86][icelake][vnni]Coby Tayree2017-12-2713-4/+682
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | added vnni feature recognition added intrinsics support for VNNI instructions _mm256_mask_dpbusd_epi32 _mm256_maskz_dpbusd_epi32 _mm256_dpbusd_epi32 _mm256_mask_dpbusds_epi32 _mm256_maskz_dpbusds_epi32 _mm256_dpbusds_epi32 _mm256_mask_dpwssd_epi32 _mm256_maskz_dpwssd_epi32 _mm256_dpwssd_epi32 _mm256_mask_dpwssds_epi32 _mm256_maskz_dpwssds_epi32 _mm256_dpwssds_epi32 _mm128_mask_dpbusd_epi32 _mm128_maskz_dpbusd_epi32 _mm128_dpbusd_epi32 _mm128_mask_dpbusds_epi32 _mm128_maskz_dpbusds_epi32 _mm128_dpbusds_epi32 _mm128_mask_dpwssd_epi32 _mm128_maskz_dpwssd_epi32 _mm128_dpwssd_epi32 _mm128_mask_dpwssds_epi32 _mm128_maskz_dpwssds_epi32 _mm128_dpwssds_epi32 _mm512_mask_dpbusd_epi32 _mm512_maskz_dpbusd_epi32 _mm512_dpbusd_epi32 _mm512_mask_dpbusds_epi32 _mm512_maskz_dpbusds_epi32 _mm512_dpbusds_epi32 _mm512_mask_dpwssd_epi32 _mm512_maskz_dpwssd_epi32 _mm512_dpwssd_epi32 _mm512_mask_dpwssds_epi32 _mm512_maskz_dpwssds_epi32 _mm512_dpwssds_epi32 matching a similar work on the backend (D40208) Differential Revision: https://reviews.llvm.org/D41558 llvm-svn: 321484
* [x86][icelake][bitalg]Coby Tayree2017-12-2715-9/+489
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | added bitalg feature recognition added intrinsics support for bitalg instructions _mm512_popcnt_epi16 _mm512_mask_popcnt_epi16 _mm512_maskz_popcnt_epi16 _mm512_popcnt_epi8 _mm512_mask_popcnt_epi8 _mm512_maskz_popcnt_epi8 _mm512_mask_bitshuffle_epi64_mask _mm512_bitshuffle_epi64_mask _mm256_popcnt_epi16 _mm256_mask_popcnt_epi16 _mm256_maskz_popcnt_epi16 _mm128_popcnt_epi16 _mm128_mask_popcnt_epi16 _mm128_maskz_popcnt_epi16 _mm256_popcnt_epi8 _mm256_mask_popcnt_epi8 _mm256_maskz_popcnt_epi8 _mm128_popcnt_epi8 _mm128_mask_popcnt_epi8 _mm128_maskz_popcnt_epi8 _mm256_mask_bitshuffle_epi32_mask _mm256_bitshuffle_epi32_mask _mm128_mask_bitshuffle_epi16_mask _mm128_bitshuffle_epi16_mask matching a similar work on the backend (D40222) Differential Revision: https://reviews.llvm.org/D41564 llvm-svn: 321483
* [hotfix]Coby Tayree2017-12-271-7/+1
| | | | | | | | fixinig test failures as seen here: http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/builds/22791/steps/test/logs/stdio which resulted by rL321480 llvm-svn: 321482
* Unify build documentation and convert to reStructuredTextJonas Hahnfeld2017-12-279-383/+316
| | | | | | | | | | | We now have several options that apply for both libraries and they shouldn't be documented in multiple files. When already merging the two Build_With_CMake.txt documents, convert them to reStructuredText which is used for all of LLVM's documentation. Differential Revision: https://reviews.llvm.org/D40920 llvm-svn: 321481
* [x86][icelake][vpclmulqdq]Coby Tayree2017-12-2712-3/+111
| | | | | | | | | | | added vpclmulqdq feature recognition added intrinsics support for vpclmulqdq instructions _mm256_clmulepi64_epi128 _mm512_clmulepi64_epi128 matching a similar work on the backend (D40101) Differential Revision: https://reviews.llvm.org/D41573 llvm-svn: 321480
* Improve performance TokenizeWindowsCommandLineRui Ueyama2017-12-271-20/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patcy by Takuto Ikuta. This patch reduces lld link time of chromium's blink_core.dll in component build. Total size of input argument in .directives become nearly 300MB in the build and calling many strchr and assert becomes bottleneck. On my desktop machine, 4 times stats of the link time are like below. Improved around 10%. This patch TotalSeconds : 13.4918885 TotalSeconds : 13.9474257 TotalSeconds : 13.4941082 TotalSeconds : 13.6077962 Avg : 13.63530465 master TotalSeconds : 15.6938531 TotalSeconds : 15.7022508 TotalSeconds : 15.9567202 TotalSeconds : 14.5851505 Avg : 15.48449365 Differential Revision: https://reviews.llvm.org/D41590 llvm-svn: 321479
* [Lint] Don't warn about noalias argument aliasing if other argument is byvalMikael Holmen2017-12-272-2/+58
| | | | | | | | | | | | | | | | | Summary: When using byval, the data is effectively copied as part of the call anyway, so we aren't actually passing the pointer and thus there is no reason to issue a warning. Reviewers: rnk Reviewed By: rnk Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D40118 llvm-svn: 321478
* [x86][icelake][gfni]Coby Tayree2017-12-2712-2/+428
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | added gfni feature recognition added intrinsics support for gfni instructions _mm_gf2p8affineinv_epi64_epi8 _mm_mask_gf2p8affineinv_epi64_epi8 _mm_maskz_gf2p8affineinv_epi64_epi8 _mm256_gf2p8affineinv_epi64_epi8 _mm256_mask_gf2p8affineinv_epi64_epi8 _mm256_maskz_gf2p8affineinv_epi64_epi8 _mm512_gf2p8affineinv_epi64_epi8 _mm512_mask_gf2p8affineinv_epi64_epi8 _mm512_maskz_gf2p8affineinv_epi64_epi8 _mm_gf2p8affine_epi64_epi8 _mm_mask_gf2p8affine_epi64_epi8 _mm_maskz_gf2p8affine_epi64_epi8 _mm256_gf2p8affine_epi64_epi8 _mm256_mask_gf2p8affine_epi64_epi8 _mm256_maskz_gf2p8affine_epi64_epi8 _mm512_gf2p8affine_epi64_epi8 _mm512_mask_gf2p8affine_epi64_epi8 _mm512_maskz_gf2p8affine_epi64_epi8 _mm_gf2p8mul_epi8 _mm_mask_gf2p8mul_epi8 _mm_maskz_gf2p8mul_epi8 _mm256_gf2p8mul_epi8 _mm256_mask_gf2p8mul_epi8 _mm256_maskz_gf2p8mul_epi8 _mm512_gf2p8mul_epi8 _mm512_mask_gf2p8mul_epi8 _mm512_maskz_gf2p8mul_epi8 matching a similar work on the backend (D40373) Differential Revision: https://reviews.llvm.org/D41582 llvm-svn: 321477
* [X86][RD]: Adding full coverage of MC encoding for RD isa sets.<NFC>Gadi Haber2017-12-279-0/+98
| | | | | | | | | | | | NFC. Adding MC regressions tests to cover RDPMC, RDRAND, RDRAND, RDSEED, RDTSCP, DWRFSGS isa sets. This patch is part of a larger task to cover MC encoding of all X86 isa sets started in revision: https://reviews.llvm.org/D39952 Reviewers: zvi, craig.topper, RKSimon, AndreiGrischenk Differential Revision: https://reviews.llvm.org/D41328 Change-Id: Ie97b397546e6b1ed180c6abd7b41fccb136d2b82 llvm-svn: 321476
* [SCEV] Be careful with nuw/nsw/exact in InsertBinopSerguei Katkov2017-12-272-1/+118
| | | | | | | | | | | | | | | | | | | | | | | | | InsertBinop tries to find an appropriate instruction instead of creating a new instruction. When it checks whether instruction is the same as we need to create it ignores nuw/nsw/exact flags. It leads to invalid behavior when poison instruction can be used when it was not expected. Specifically, for example Expander expands the SCEV built for instruction %a = add i32 %v, 1 It is possible that InsertBinop can find an instruction % b = add nuw nsw i32 %v, 1 and will use it instead of version w/o nuw nsw. It is incorrect. The patch conservatively ignores all instructions with any of poison flags installed. Reviewers: sanjoy, mkazantsev, sebpop, jbhateja Reviewed By: sanjoy Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D41576 llvm-svn: 321475
* [x86][icelake][vaes]Coby Tayree2017-12-2712-4/+209
| | | | | | | | | | | | | | | added vaes feature recognition added intrinsics support for vaes instructions, matching a similar work on the backend (D40078) _mm256_aesenc_epi128 _mm512_aesenc_epi128 _mm256_aesenclast_epi128 _mm512_aesenclast_epi128 _mm256_aesdec_epi128 _mm512_aesdec_epi128 _mm256_aesdeclast_epi128 _mm512_aesdeclast_epi128 llvm-svn: 321474
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