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* [ARM] Tidy-up ARMAsmParser. NFC.Javed Absar2017-08-271-23/+5
| | | | | | | | | Simplify getDRegFromQReg function Reviewed by: @fhahn, @asb Differential Revision: https://reviews.llvm.org/D37118 llvm-svn: 311850
* [LV] Fix PR34248 - recommit D32871 after revert r311304Ayal Zaks2017-08-279-556/+2297
| | | | | | | | | | | Original commit r311077 of D32871 was reverted in r311304 due to failures reported in PR34248. This recommit fixes PR34248 by restricting the packing of predicated scalars into vectors only when vectorizing, avoiding doing so when unrolling w/o vectorizing. Added a test derived from the reproducer of PR34248. llvm-svn: 311849
* [Polly][GPGPU] Fixed undefined reference for CUDA's managed memory in ↵Philipp Schaad2017-08-271-2/+24
| | | | | | Runtime library. llvm-svn: 311848
* [X86] Adding more tests for horizontal [F]HADD/[F]SUB for AVX512 vectors typesJatin Bhateja2017-08-271-2/+82
| | | | llvm-svn: 311847
* ClangCodeGenTests: Update libdeps.NAKAMURA Takumi2017-08-271-0/+1
| | | | llvm-svn: 311846
* Add forgotten file in r311844.Vassil Vassilev2017-08-271-0/+174
| | | | llvm-svn: 311845
* D34059: Get the file name for the symbol from the Module, not the SourceManager.Vassil Vassilev2017-08-272-9/+6
| | | | | | | | | This allows multi-module / incremental compilation environments to have unique initializer symbols. Patch by Axel Naumann with minor modifications by me! llvm-svn: 311844
* D34444: Teach codegen to work in incremental processing mode.Vassil Vassilev2017-08-272-0/+17
| | | | | | | | | | | | | | When isIncrementalProcessingEnabled is on we might want to produce multiple llvm::Modules. This patch allows the clients to start a new llvm::Module, allowing CodeGen to continue working after a HandleEndOfTranslationUnit call. This should give the necessary facilities to write a unittest for D34059. As discussed in the review this is meant to give us a way to proceed forward in our efforts to upstream our interpreter-related patches. The design of this will likely change soon. llvm-svn: 311843
* [cmake] Remove i686 target that is duplicate to i386Michal Gorny2017-08-2714-31/+14
| | | | | | | | | | | | | | | | | | | | | | | | Remove the explicit i686 target that is completely duplicate to the i386 target, with the latter being used more commonly. 1. The runtime built for i686 will be identical to the one built for i386. 2. Supporting both -i386 and -i686 suffixes causes unnecessary confusion on the clang end which has to expect either of them. 3. The checks are based on wrong assumption that __i686__ is defined for all newer x86 CPUs. In fact, it is only declared when -march=i686 is explicitly used. It is not available when a more specific (or newer) -march is used. Curious enough, if CFLAGS contain -march=i686, the runtime will be built both for i386 and i686. For any other value, only i386 variant will be built. Differential Revision: https://reviews.llvm.org/D26764 llvm-svn: 311842
* [X86] Add a target-specific DAG combine to combine extract_subvector from ↵Craig Topper2017-08-274-19/+26
| | | | | | all zero/one build_vectors. llvm-svn: 311841
* [X86] Use getOnesVector instead of using DAG.getConstant(-1).Craig Topper2017-08-271-1/+1
| | | | llvm-svn: 311840
* Pass the correct object argument when a member call to an 'unrelated' class ↵Faisal Vali2017-08-272-1/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | is made. Prior to this patch, clang would do the wrong thing here (see inline comments for pre-patch behavior): struct A { void bar(int) { } static void bar(double) { } void g(int*); static void g(char *); }; struct B { void f() { A::bar(3); // selects (double) ??!! A::g((int*)0); // Instead of no object argument, states conversion error?!! } }; The fix is as follows: When we detect that what appears to be an implicit member function call (A::bar) is actually a call to a member of a class (A) unrelated to the type (B) that contains the member function (B::f) from which the call is being made, don't treat it (A::bar) as an Implicit Member Call Expression. P.S. I wonder if there is an existing bug report related to this? (Surprisingly, a cursory search did not find one). llvm-svn: 311839
* [NewGVN] Use `auto` when the type is obvious NFCI.Davide Italiano2017-08-261-2/+2
| | | | llvm-svn: 311838
* [AVX512] Add patterns to match masked extract_subvector with bitcasts ↵Craig Topper2017-08-263-21/+220
| | | | | | | | | | between the vselect and the extract_subvector. Remove the late DAG combine. We used to do a late DAG combine to move the bitcasts out of the way, but I'm starting to think that it's better to canonicalize extract_subvector's type to match the type of its input. I've seen some cases where we've formed two different extract_subvector from the same node where one had a bitcast and the other didn't. Add some more test cases to ensure we've also got most of the zero masking covered too. llvm-svn: 311837
* [Driver] Use arch type to find compiler-rt libraries (on Linux)Michal Gorny2017-08-267-8/+32
| | | | | | | | | | | | | | | | | | | | Use llvm::Triple::getArchTypeName() when looking for compiler-rt libraries, rather than the exact arch string from the triple. This is more correct as it matches the values used when building compiler-rt (builtin-config-ix.cmake) which are the subset of the values allowed in triples. For example, this fixes an issue when the compiler set for i686-pc-linux-gnu triple would not find an i386 compiler-rt library, while this is the exact arch that is detected by compiler-rt. The same applies to any other i?86 variant allowed by LLVM. This also makes the special case for MSVC unnecessary, since now i386 will be used reliably for all 32-bit x86 variants. Differential Revision: https://reviews.llvm.org/D26796 llvm-svn: 311836
* [Dominators] Remove redundant explicit template instantiation.Don Hinton2017-08-261-2/+0
| | | | | | | | | | | | | | | Summary: Remove redundant explicit template instantiation. This was reported by Andrew Kelley building release_50 with gcc7.2.0 on MacOS: duplicate symbol llvm::DominatorTreeBase. Reviewers: kuhar, andrewrk, davide, hans Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D37185 llvm-svn: 311835
* [X86] Adding a test for horizontal [f]add/[f]sub for avx512 vector type 16x32.Jatin Bhateja2017-08-261-0/+112
| | | | | | Differential Revision: https://reviews.llvm.org/D37183 llvm-svn: 311834
* [DAGCombiner] Extending pattern detection for vector shuffle.Jatin Bhateja2017-08-265-119/+173
| | | | | | | | | | | | | | | | | | Summary: If all the operands of a BUILD_VECTOR extract elements from same vector then split the vector efficiently based on the maximum vector access index. This will also fix PR 33784 Reviewers: zvi, delena, RKSimon, thakis Reviewed By: RKSimon Subscribers: chandlerc, eladcohen, llvm-commits Differential Revision: https://reviews.llvm.org/D35788 llvm-svn: 311833
* Revert rL311247 : To rectify commit message.Jatin Bhateja2017-08-265-173/+119
| | | | | | | | Summary: This reverts commit rL311247. Differential Revision: https://reviews.llvm.org/D36927 llvm-svn: 311832
* Revert "[libFuzzer] Use custom allocators for STL containers in libFuzzer"George Karpenkov2017-08-2618-83/+70
| | | | | | This reverts commit 3539efc2f2218dba2bcbd645d0fe276f2b5cf588. llvm-svn: 311831
* [libFuzzer] Use custom allocators for STL containers in libFuzzerGeorge Karpenkov2017-08-2618-70/+83
| | | | | | | | Avoids ODR violations causing spurious ASAN container overflow warnings. Differential Revision: https://reviews.llvm.org/D37086 llvm-svn: 311830
* NewGVN: Fix PR33204 - We need to add memory users when we bypass memorydefs ↵Daniel Berlin2017-08-262-4/+85
| | | | | | for loads, not just when we do it for stores. llvm-svn: 311829
* [X86] Qualify the RMW INC/DEC patterns with NotSlowIncDec.Craig Topper2017-08-262-6/+6
| | | | | | We were suppressing most uses of INC/DEC, but this one seems to have been missed. llvm-svn: 311828
* Revert "[llvm] Add symbol table support to llvm-objcopy"Petr Hosek2017-08-263-240/+0
| | | | | | This reverts commit r311826 because it's failing on llvm-i686-linux-RA. llvm-svn: 311827
* [llvm] Add symbol table support to llvm-objcopyPetr Hosek2017-08-263-0/+240
| | | | | | | | | | This change adds support for SHT_SYMTAB sections. Patch by Jake Ehrlich Differential Revision: https://reviews.llvm.org/D34167 llvm-svn: 311826
* [llvm-objcopy] New layout algorithm that lays out segments firstPetr Hosek2017-08-262-48/+41
| | | | | | | | | | | | | | | | The current file layout algorithm in llvm-objcopy is simple but difficult to reason about. It also makes it very complicated to support nested segments and to support segments that have offsets that come before a point after the program headers. To support these cases and simplify one of the most critical parts llvm-objcopy I rewrote the layout algorithm. Laying out segments first solves most of the issues encountered by the previous algorithm. Patch by Jake Ehrlich Differential Revision: https://reviews.llvm.org/D36494 llvm-svn: 311825
* Automatically pick up new sanitizers in cmake.Evgeniy Stepanov2017-08-261-1/+1
| | | | | | | | Change the default of COMPILER_RT_SANITIZERS_TO_BUILD to "all" in order to automatically pick up new sanitizers in existing build trees. llvm-svn: 311824
* Add flag to request Clang is ABI-compatible with older versions of itselfRichard Smith2017-08-2614-23/+160
| | | | | | | | | | | | | | | | | | This patch adds a flag -fclang-abi-compat that can be used to request that Clang attempts to be ABI-compatible with some older version of itself. This is provided on a best-effort basis; right now, this can be used to undo the ABI change in r310401, reverting Clang to its prior C++ ABI for pass/return by value of class types affected by that change, and to undo the ABI change in r262688, reverting Clang to using integer registers rather than SSE registers for passing <1 x long long> vectors. The intent is that we will maintain this backwards compatibility path as we make ABI-breaking fixes in future. The reversion to the old behavior for r310401 is also applied to the PS4 target since that change is not part of its platform ABI (which is essentially to do whatever Clang 3.2 did). llvm-svn: 311823
* Add options to dump block frequency/branch probability info in text.Hiroshi Yamauchi2017-08-263-0/+42
| | | | | | | | | | | | | | | | | | | | | Summary: Add options -print-bfi/-print-bpi that dump block frequency and branch probability info like -view-block-freq-propagation-dags and -view-machine-block-freq-propagation-dags do but in text. This is useful when the graph is very large and complex (the dot command crashes, lines/edges too close to tell apart, hard to navigate without textual search) or simply when text is preferred. Reviewers: davidxl Reviewed By: davidxl Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D37165 llvm-svn: 311822
* [AVX512] Add patterns to use masked moves to implement masked ↵Craig Topper2017-08-252-36/+157
| | | | | | | | extract_subvector of the lowest subvector. This only supports 32 and 64 bit element sizes for now. But we could probably do 16 and 8-bit elements with BWI. llvm-svn: 311821
* [AVX512] Add additional test cases for masked extract subvector.Craig Topper2017-08-251-4/+448
| | | | | | This includes tests for extracting 128-bits from a 256-bit vector and zero masking. llvm-svn: 311820
* [X86] Add patterns to show more failures to use TBM instructions when we're ↵Craig Topper2017-08-251-0/+331
| | | | | | | | trying to check flags. We can probably add patterns to fix some of them. But the ones that use 'and' as their root node emit a X86ISD::CMP node in front of the 'and' and then pattern matching that to 'test' instruction. We can't use a tablegen pattern to fix that because we can't remap the cmp result to the flag output of a TBM instruction. llvm-svn: 311819
* [x86] Teach the backend to fold more read-modify-write memory operandsChandler Carruth2017-08-256-74/+507
| | | | | | | | | | | | | | | | | | | | | | | | to instructions. These can't be reasonably matched in tablegen due to the handling of flags, so we have to do this in C++ code. We only did it for `inc` and `dec` historically, this starts fleshing that out to more interesting instructions. Notably, this handles transfering operands to `add` and `sub`. Currently this forces them into a register. The next patch will add support for keeping immediate operands as immediates. Then I'll extend this beyond just `add` and `sub`. I'm not super thrilled by the repeated switches in the code but everything else I tried was really ugly or problematic. Many thanks to Craig Topper for the suggestions about where to even begin here and how to make this stuff work. Differential Revision: https://reviews.llvm.org/D37130 llvm-svn: 311806
* [Verifier] Diagnose invalid DIType references instead of crashing.Davide Italiano2017-08-252-0/+19
| | | | | | Fixes PR34325. llvm-svn: 311805
* [Inliner] Only compute fully inline cost when remarks are enabled.Davide Italiano2017-08-251-1/+11
| | | | | | | | Prior to this change (and after r311371), we computed it unconditionally, causin gsevere compile time regressions (in some cases, 5 to 10x). llvm-svn: 311804
* Revert "[SanitizeCoverage] Enable stack-depth coverage for -fsanitize=fuzzer"Matt Morehouse2017-08-254-33/+25
| | | | | | This reverts r311801 due to a bot failure. llvm-svn: 311803
* [Polly] Fix some Clang-tidy modernize and Include What You Use warnings; ↵Eugene Zelenko2017-08-257-283/+329
| | | | | | other minor fixes (NFC). llvm-svn: 311802
* [SanitizeCoverage] Enable stack-depth coverage for -fsanitize=fuzzerMatt Morehouse2017-08-254-25/+33
| | | | | | | | | | | | | | | | | Summary: - Don't sanitize __sancov_lowest_stack. - Don't instrument leaf functions. - Add CoverageStackDepth to Fuzzer and FuzzerNoLink. Reviewers: vitalybuka, kcc Reviewed By: kcc Subscribers: cfe-commits, llvm-commits, hiraditya Differential Revision: https://reviews.llvm.org/D37156 llvm-svn: 311801
* [libFuzzer] prepare tests for switching from ↵Kostya Serebryany2017-08-253-6/+7
| | | | | | -fsanitize-coverage=trace-pc-guard to -fsanitize-coverage=inline-8bit-counters llvm-svn: 311798
* [libFuzzer] add -print_funcs=1 (on bey default): print newly discovered ↵Kostya Serebryany2017-08-258-6/+69
| | | | | | functions during fuzzing llvm-svn: 311797
* [compiler-rt] Test commit: remove some trailing white spaces.Max Moroz2017-08-252-2/+2
| | | | | | | | | | | | | | Summary: [compiler-rt] Test commit: remove some trailing white spaces. Reviewers: Dor1s Reviewed By: Dor1s Subscribers: dberris Differential Revision: https://reviews.llvm.org/D37161 llvm-svn: 311796
* [utils] add aarch64 target as an optionSanjay Patel2017-08-251-19/+29
| | | | | | I don't know enough to add a custom scrubber for AArch64, so I just re-used ARM. llvm-svn: 311795
* [sanitizer-coverage] extend fsanitize-coverage=pc-table with flags for every PCKostya Serebryany2017-08-257-36/+58
| | | | llvm-svn: 311794
* [x86] regenerate checks; NFCSanjay Patel2017-08-252-9/+20
| | | | llvm-svn: 311793
* [Format] Invert nestingAndIndentLevel pair in WhitespaceManager used forDaniel Jasper2017-08-253-12/+21
| | | | | | | | | | | | | alignments Indent should be compared before nesting level to determine if a token is on the same scope as the one we align with. Because it was inverted, clang-format sometimes tried to align tokens with tokens from outer scopes, causing the assert(Shift >= 0) to fire. This fixes bug #33507. Patch by Beren Minor, thank you! llvm-svn: 311792
* [InlineCost] Small changes to early exit condition. NFC.Haicheng Wu2017-08-251-3/+3
| | | | | | | | | Change the early exit condition from Cost > Threshold to Cost >= Threshold because the inline condition is Cost < Threshold. Differential Revision: https://reviews.llvm.org/D37087 llvm-svn: 311791
* Fix typo in comment, no behavior change.Nico Weber2017-08-251-1/+1
| | | | llvm-svn: 311790
* [InstCombine] Don't fall back to only calling computeKnownBits if the upper ↵Craig Topper2017-08-251-23/+24
| | | | | | | | | | | | | | | | bit of Add/Sub is demanded. Just create an all 1s demanded mask and continue recursing like normal. The recursive calls should be able to handle an all 1s mask and do the right thing. The only time we should care about knowing whether the upper bit was demanded is when we need to know if we should clear the NSW/NUW flags. Now that we have a consistent path through the code for all cases, use KnownBits::computeForAddSub to compute the known bits at the end since we already have the LHS and RHS. My larger goal here is to move the code that turns add into xor if only 1 bit is demanded and no bits below it are non-zero from InstCombiner::OptAndOp to here. This will allow it to be more general instead of just looking for 'add' and 'and' with constant RHS. Differential Revision: https://reviews.llvm.org/D36486 llvm-svn: 311789
* [NFC] Remove a cstyle cast and replace some uses of Decl with NamedDecl ↵Faisal Vali2017-08-254-13/+13
| | | | | | during the processing of TemplateParameterLists. llvm-svn: 311788
* [Frontend] Fix printing policy for AST context loaded from fileVedant Kumar2017-08-253-0/+91
| | | | | | | | | | | | | In ASTUnit::LoadFromASTFile, the context object is set up using default-constructed LangOptions (which only later get populated). As the language options are used in the constructor of PrintingPolicy, this needs to be updated explicitly after the language options are available. Patch by Johann Klähn! Differential Revision: https://reviews.llvm.org/D35271 llvm-svn: 311787
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