| Commit message (Collapse) | Author | Age | Files | Lines | 
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llvm-svn: 83489
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that a symbol stub section with no attributes can be parsed as in:
.section __TEXT,__picsymbolstub4,symbol_stubs,none,16
llvm-svn: 83488
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llvm-svn: 83487
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llvm-svn: 83486
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where matching conversion types in base classes were still visible.
Plus refactoring and cleanup.
Added a test case.
llvm-svn: 83485
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llvm-svn: 83484
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llvm-svn: 83483
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llvm-svn: 83482
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llvm-svn: 83481
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going to have the time
to finish it any time soon.  If someone's interested it, they can resurrect it from SVN history.
llvm-svn: 83480
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llvm-svn: 83479
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with writeback, things like "sp!", etc.  Also added some more stuff to the
temporarily hacked methods ARMAsmParser::MatchRegisterName and
ARMAsmParser::MatchInstruction to allow more parser testing.
llvm-svn: 83477
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teach it how to recognize invariant physical registers.
llvm-svn: 83476
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implementations with a new MachineInstr::isInvariantLoad, which uses
MachineMemOperands and is target-independent. This brings MachineLICM
and other functionality to targets which previously lacked an
isInvariantLoad implementation.
llvm-svn: 83475
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llvm-svn: 83474
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llvm-svn: 83473
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convesion functions, look in base classes to.
(Removes a FIXME).
llvm-svn: 83472
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llvm-svn: 83471
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This is just to be more consistent with the forthcoming code for vld3/4.
llvm-svn: 83470
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its definition may be defined, including in a class.
Also, put in an assertion when trying to instantiate a class template
partial specialization of a member template, which is not yet
implemented.
llvm-svn: 83469
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llvm-svn: 83468
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a virtual register to eliminate a frame index, it can return that register
and the constant stored there to PEI to track. When scavenging to allocate
for those registers, PEI then tracks the last-used register and value, and
if it is still available and matches the value for the next index, reuses
the existing value rather and removes the re-materialization instructions.
Fancier tracking and adjustment of scavenger allocations to keep more
values live for longer is possible, but not yet implemented and would likely
be better done via a different, less special-purpose, approach to the
problem.
eliminateFrameIndex() is modified so the target implementations can return
the registers they wish to be tracked for reuse.
ARM Thumb1 implements and utilizes the new mechanism. All other targets are
simply modified to adjust for the changed eliminateFrameIndex() prototype.
llvm-svn: 83467
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per Doug's obsevation.
llvm-svn: 83464
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llvm-svn: 83462
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intuitive.
It does NOT update the value if the key is already in the map,
it also returns false if the key is already in the map, regardless
if the value matched.
llvm-svn: 83458
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llvm-svn: 83457
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an unqualified PointerType* because it seems more correct.
llvm-svn: 83454
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templated class.  Hopefully this will please the buildbots.
llvm-svn: 83452
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llvm-svn: 83451
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may access memory, but they don't carry a MachineMemOperand.
llvm-svn: 83449
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llvm-svn: 83448
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llvm-svn: 83443
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keeping state, such as identifiers assigned to anonymous structs as well as scope encoding.
llvm-svn: 83442
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not intrinsics.
llvm-svn: 83441
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llvm-svn: 83440
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malloc() traffic when adding successors/predecessors to a node.  This was done by introducing BumpVector, which is essentially SmallVector with all memory being BumpPtrAllocated (this can certainly be cleaned up or moved into llvm/ADT).
This change yields a 1.8% speed increase when running the analyzer (with -analyzer-store=region) on a small benchmark file.
llvm-svn: 83439
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the test not be dependent on the host.
llvm-svn: 83438
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llvm-svn: 83437
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declarations and explicit template instantiations, improving
diagnostics and making the code usable for function template
specializations (as well as class template specializations and partial
specializations). 
llvm-svn: 83436
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something similar)
and register spills.
llvm-svn: 83435
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for inlining.
When MallocInst goes away this code will be subsumed as part of
calls and work just fine...
llvm-svn: 83434
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llvm-svn: 83433
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llvm-svn: 83432
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Doug, please review. There is a FIXME in the test case with a question
which is unrelated to this patch (that is, error is issued
before set of builtins are added to the candidate list).
llvm-svn: 83429
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llvm-svn: 83428
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llvm-svn: 83427
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class offsets. Fix the code to handle virtual bases as well.
llvm-svn: 83426
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operands.  Some parsing of arm memory operands for preindexing and postindexing
forms including with register controled shifts.  This is a work in progress.
llvm-svn: 83424
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llvm-svn: 83423
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llvm-svn: 83422
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