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* [ARM] GlobalISel: Allow i8 and i16 addsDiana Picus2016-12-194-6/+128
| | | | | | | | | Teach the instruction selector and legalizer that it's ok to have adds with 8 or 16-bit integers. This is the second part of https://reviews.llvm.org/D27704 llvm-svn: 290105
* [ARM] GlobalISel: Select i8 and i16 copiesDiana Picus2016-12-192-5/+69
| | | | | | | | | Teach the instruction selector that it's ok to copy small values from physical registers. First part of https://reviews.llvm.org/D27704 llvm-svn: 290104
* Fix clang-formatTobias Grosser2016-12-192-4/+7
| | | | llvm-svn: 290103
* [Power9] Processor Model for SchedulingEhsan Amiri2016-12-194-3/+1145
| | | | | | | | PWR9 processor model for instruction scheduling. A subsequent patch will migrate PWR9 to Post RA MIScheduler. https://reviews.llvm.org/D24525 llvm-svn: 290102
* Revert "[XRay] [compiler-rt] Move machine-dependent code into ↵Diana Picus2016-12-197-208/+139
| | | | | | | | machine-dependent files." This reverts commit r290077, 78, 79 and 83. llvm-svn: 290101
* [Hexagon] Restore minimum profit check accidentally changed in r290024Malcolm Parsons2016-12-191-2/+2
| | | | llvm-svn: 290100
* ELF/AArch64: Fix dynamic relocation against local symbol in shared objectsAdhemerval Zanella2016-12-192-2/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AArch64 TLSDESC for local symbol in shared objects are implemented in a arch specific manner where the TLSDESC dynamic relocation addend is the symbol VM inside the TLS block. For instance, with a shared library created from the code: -- static __thread int32_t x1; static __thread int64_t x2; int32_t foo1 (int32_t x) { x1 += x; return x; } int64_t foo2 (int64_t x) { x2 += x; return x; } -- The dynamic relocation should be create as: Relocations [ Section (N) .rela.dyn { <Address1> R_AARCH64_TLSDESC - 0x0 <Address2> R_AARCH64_TLSDESC - 0x8 } ] Where 0x0 addend in first dynamic relocation is the address of 'x1' in TLS block and '0x8' is the address of 'x2'. Checked against test-suite on aarch64-linux-gnu. llvm-svn: 290099
* [ARM] GlobalISel: Lower more than 4 argumentsDiana Picus2016-12-193-10/+50
| | | | | | | | | | This adds support for lowering more than 4 arguments (although still i32 only). It uses the handleAssignments / ValueHandler infrastructure extracted from the AArch64 backend in r288658. Differential Revision: https://reviews.llvm.org/D27195 llvm-svn: 290098
* AMDGPU: [AMDGPU] Assembler: add .hsa_code_object_metadata directive for ↵Sam Kolton2016-12-196-73/+200
| | | | | | | | | | | | | | | | | | | | | | | | functime metadata V2.0 Summary: Added pair of directives .hsa_code_object_metadata/.end_hsa_code_object_metadata. Between them user can put YAML string that would be directly put to the generated note. E.g.: ''' .hsa_code_object_metadata { amd.MDVersion: [ 2, 0 ] } .end_hsa_code_object_metadata ''' Based on D25046 Reviewers: vpykhtin, nhaustov, yaxunl, tstellarAMD Subscribers: arsenm, kzhuravl, wdng, nhaehnle, mgorny, tony-tye Differential Revision: https://reviews.llvm.org/D27619 llvm-svn: 290097
* [ARM] GlobalISel: Support loading from the stackDiana Picus2016-12-195-10/+107
| | | | | | | | | | Add support for selecting simple G_LOAD and G_FRAME_INDEX instructions (32-bit scalars only). This will be useful for functions that need to pass arguments on the stack. First part of https://reviews.llvm.org/D27195. llvm-svn: 290096
* [CodeGen] Make MachineInstr::isIdenticalTo() symmetric.Bjorn Pettersson2016-12-191-5/+13
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: MachineInstr::isIdenticalTo() is for some reason not symmetric when comparing bundles, which gives us the property: I1->isIdenticalTo(*I2) != I2->isIdenticalTo(*I1) when comparing bundles where one bundle is longer than the other. This patch makes sure that bundles of different length always are considered as not being identical. Thus, the result of the comparison will be the same regardless of which side that happens to be to the left. Reviewers: dexonsmith, jonpa, andrew.w.kaylor Subscribers: llvm-commits, mehdi_amini Differential Revision: https://reviews.llvm.org/D27508 llvm-svn: 290095
* clang-format: Slightly tweak the behavior of <<-wrapping.Daniel Jasper2016-12-193-3/+11
| | | | | | | | | | | | | | | Before: SomeLongLoggingStatementOrMacro() << "Some long text " << some_variable << "\n"; Before: SomeLongLoggingStatementOrMacro() << "Some long text " << some_variable << "\n"; Short logging statements are already special cased in a different part of the code. llvm-svn: 290094
* [clang-format] revert an unintended change in r288493 and add a test case.Eric Liu2016-12-192-1/+14
| | | | llvm-svn: 290093
* Revert "[c++1z] P0195R2: Support pack-expansion of using-declarations."Daniel Jasper2016-12-1926-793/+247
| | | | | | | This reverts commit r290080 as it leads to many Clang crashes, e.g.: http://lab.llvm.org:8011/builders/clang-cmake-aarch64-quick/builds/1814 llvm-svn: 290092
* [XRay] Fix assertion failure on empty machine basic blocks (PR 31424)Dean Michael Berris2016-12-193-2/+45
| | | | | | | | | | | | | | | | | | | | The original version of the code in XRayInstrumentation.cpp assumed that functions may not have empty machine basic blocks (or that the first one couldn't be). This change addresses that by special-casing that specific situation. We provide two .mir test-cases to make sure we're handling this appropriately. Fixes llvm.org/PR31424. Reviewers: chandlerc Subscribers: varno, llvm-commits Differential Revision: https://reviews.llvm.org/D27913 llvm-svn: 290091
* clang-format: Fix regression introduced in r290084.Daniel Jasper2016-12-192-1/+9
| | | | | | | | | | | | | | | | | | | We still want to try in linewrap within single elements of a 1-column list. After: Type *Params[] = {PointerType::getUnqual(FunctionType::get( Builder.getVoidTy(), Builder.getInt8PtrTy(), false)), Builder.getInt8PtrTy(), Builder.getInt32Ty(), LongType, LongType, LongType}; Before: No line break in the first element, so column limit violation. llvm-svn: 290090
* [X86] When recognizing vector loads or VZEXT_LOAD in selectScalarSSELoad ↵Craig Topper2016-12-191-2/+2
| | | | | | make sure we pass the load's user rather than load itself to the second operand of IsLegalToFold. llvm-svn: 290089
* [TableGen] Use 'unsigned' instead of 'bool' in a place where the code ↵Craig Topper2016-12-191-1/+1
| | | | | | conditionally assigns numeric values. They happen to be 0 and 1 so this is NFC. llvm-svn: 290088
* Add files I seem to have dropped in my revert (r290086).Daniel Jasper2016-12-193-0/+330
| | | | | | Sorry! llvm-svn: 290087
* Revert @llvm.assume with operator bundles (r289755-r289757)Daniel Jasper2016-12-19108-853/+1177
| | | | | | | This creates non-linear behavior in the inliner (see more details in r289755's commit thread). llvm-svn: 290086
* Fix format after recent clang-format change.Daniel Jasper2016-12-191-5/+8
| | | | llvm-svn: 290085
* clang-format: Allow "single column" list layout even if that violates theDaniel Jasper2016-12-192-2/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | column limit. Single-column layout basically means that we format the list with one element per line. Not doing that when there is a column limit violation doesn't change the fact that there is an item that doesn't fit within the column limit. Before (with a column limit of 30): std::vector<int> a = { aaaaaaaa, aaaaaaaa, aaaaaaaa, aaaaaaaa, aaaaaaaaaa, aaaaaaaa, aaaaaaaaaaaaaaaaaaaaaaaaaaa}; After: std::vector<int> a = { aaaaaaaa, aaaaaaaa, aaaaaaaa, aaaaaaaa, aaaaaaaaaa, aaaaaaaa, aaaaaaaaaaaaaaaaaaaaaaaaaaa}; (and previously we would have formatted like "After" it wasn't for the one item that is too long) llvm-svn: 290084
* [XRay][compiler-rt] Fix missing include of <cerrno>Dean Michael Berris2016-12-191-0/+1
| | | | | | | | Futher attempt to un-break ARM and AArch64 build. Follow-up on D25360. llvm-svn: 290083
* Add __cpp_structured_bindings feature test macro for structured bindings, perRichard Smith2016-12-192-1/+6
| | | | | | latest (provisional) draft of SD-6. llvm-svn: 290082
* [c++1z] cxx_status: mark p0195r2 as done.Richard Smith2016-12-193-3/+7
| | | | llvm-svn: 290081
* [c++1z] P0195R2: Support pack-expansion of using-declarations.Richard Smith2016-12-1926-247/+793
| | | | | | | | | | | This change introduces UsingPackDecl as a marker for the set of UsingDecls produced by pack expansion of a single (unresolved) using declaration. This is not strictly necessary (we just need to be able to map from the original using declaration to its expansions somehow), but it's useful to maintain the invariant that each declaration reference instantiates to refer to one declaration. llvm-svn: 290080
* [XRay][compiler-rt] Post-commit review fixup of XRay refactoring.Dean Michael Berris2016-12-192-5/+36
| | | | | | | | | | | | Missed a couple of files: - Using #pragma once - Missing top-matter for headers - Missing an include for <cstdint> Follow-up on D25360. llvm-svn: 290079
* [XRay][compiler-rt] Explicitly include <cstdint> for typesDean Michael Berris2016-12-191-2/+2
| | | | | | | | This is an attempt to un-break the ARM7, AArch64 builds. Follow-up on D25360. llvm-svn: 290078
* [XRay] [compiler-rt] Move machine-dependent code into machine-dependent files.Dean Michael Berris2016-12-197-139/+176
| | | | | | | | | | | | Summary: Include the necessary headers while there. Reviewers: dberris Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D25360 llvm-svn: 290077
* Remove inappropriate use of CachedHashStringRef.Rui Ueyama2016-12-194-6/+5
| | | | | | | | | Use of CachedHashStringRef makes sense only when we reuse hash values. Sprinkling it to all DenseMap has no benefits and just complicates data types. Basically we shouldn't use CachedHashStringRef unless there is a strong reason to to do so. llvm-svn: 290076
* Add a lit test for PR31374Yaxun Liu2016-12-191-0/+22
| | | | | | Differential Revision: https://reviews.llvm.org/D27909 llvm-svn: 290075
* [XRay] [compiler-rt] Fix format string; sanitizers' internal printf() ↵Dean Michael Berris2016-12-191-12/+6
| | | | | | | | | | | | | | | | | | | | | | | doesn't support %ld. Summary: Getting rid of the distance number altogether because: - a person knowledgeable enough to know what the message means will also know how to do hexadecimal math (with the help of a calculator) - numbers outside INT_MIN - INT_MAX are hard to comprehend anyway This unbreaks the case when you dynamically link a library with XRay and it exits pre-main() with a not very informative static string. Author: pelikan Reviewers: dberris Subscribers: llvm-commits, mehdi_amini Differential Revision: https://reviews.llvm.org/D27894 llvm-svn: 290074
* [X86] Remove all of the patterns that use X86ISD:FAND/FXOR/FOR/FANDN except ↵Craig Topper2016-12-192-131/+42
| | | | | | | | for the ones needed for SSE1. Anything SSE2 or above uses the integer ISD opcode. This removes 11721 bytes from the DAG isel table or 2.2% llvm-svn: 290073
* Fix name hiding and redeclaration checking for dependent localRichard Smith2016-12-183-39/+49
| | | | | | using-declarations. llvm-svn: 290072
* Fix some interactions between C++11 and C++14 features and using-declarations:Richard Smith2016-12-187-47/+244
| | | | | | | | | | | * a dependent non-type using-declaration within a function template can be valid, as it can refer to an enumerator, so don't reject it in the template definition * we can partially substitute into a dependent using-declaration if it appears within a (local class in a) generic lambda within a function template, which means an UnresolvedUsing*Decl doesn't necessarily instantiate to a UsingDecl. llvm-svn: 290071
* [FileCheck] Fix --strict-whitespace --match-full-lines -- add test-caseTom de Vries2016-12-181-0/+14
| | | | | | | Add test-case that was missing in "[FileCheck] Fix --strict-whitespace --match-full-lines" commit. llvm-svn: 290070
* [FileCheck] Fix --strict-whitespace --match-full-linesTom de Vries2016-12-181-5/+7
| | | | | | | Make sure FileCheck --strict-whitespace --match-full-lines translates 'CHECK: bla ' into pattern '^ bla $' instead of pattern '^bla$'. llvm-svn: 290069
* [PDB] Don't use the long typeDavid Majnemer2016-12-181-1/+1
| | | | | | | | Long is not the same size across a number of the platforms we support. Use unsigned int here instead, it is more appropriate because overflow/wrap-around is possible and, in this case, expected. llvm-svn: 290068
* [InstCombine] use commutative matchers for patterns with commutative operatorsSanjay Patel2016-12-184-71/+48
| | | | | | | | | | | | | | | | | | | | | | | | Background/motivation - I was circling back around to: https://llvm.org/bugs/show_bug.cgi?id=28296 I made a simple patch for that and noticed some regressions, so added test cases for those with rL281055, and this is hopefully the minimal fix for just those cases. But as you can see from the surrounding untouched folds, we are missing commuted patterns all over the place, and of course there are no regression tests to cover any of those cases. We could sprinkle "m_c_" dust all over this file and catch most of the missing folds, but then we still wouldn't have test coverage, and we'd still miss some fraction of commuted patterns because they require adjustments to the match order. I'm aware of the concern about the potential compile-time performance impact of adding matches like this (currently being discussed on llvm-dev), but I don't think there's any evidence yet to suggest that handling commutative pattern matching more thoroughly is not a worthwhile goal of InstCombine. Differential Revision: https://reviews.llvm.org/D24419 llvm-svn: 290067
* Revert r289955 and r289962. This is causing lots of ASAN failures for us.Daniel Jasper2016-12-182-63/+10
| | | | | | | | Not sure whether it causes and ASAN false positive or whether it actually leads to incorrect code or whether it even exposes bad code. Hans, I'll get you instructions to reproduce this. llvm-svn: 290066
* [X86] [AVX512] Minor fix in encoding of scalar EVEX instructions. NFC.Michael Zuckerman2016-12-183-39/+38
| | | | | | | | | | | | Commit on behalf of Gadi Haber Removed EVEX_V512 prefix from scalar EVEX instructions since HW ignores L'L bits anyway (LIG). 4 instructions are modified. The changed encodings are validated with XED. Rviewers: delena, igorb Differential revision: https://reviews.llvm.org/D27802 llvm-svn: 290065
* [X86][SSE] Add support for combining target shuffles to SHUFPS.Simon Pilgrim2016-12-1812-115/+201
| | | | | | As discussed on D27692, the next step will be to allow cross-domain shuffles once the combined shuffle depth passes a certain point. llvm-svn: 290064
* Wdocumentation fixSimon Pilgrim2016-12-181-1/+1
| | | | llvm-svn: 290063
* Remove lld/Support/Memory.h.Rui Ueyama2016-12-1827-62/+154
| | | | | | | | | | | | I thought for a while about how to remove it, but it looks like we can just copy the file for now. Of course I'm not happy about that, but it's just less than 50 lines of code, and we already have duplicate code in Error.h and some other places. I want to solve them all at once later. Differential Revision: https://reviews.llvm.org/D27819 llvm-svn: 290062
* [FileCheck] Fix comment in ReadCheckFileTom de Vries2016-12-181-1/+1
| | | | | | | The comment in ReadCheckFile claims that both leading and trailing whitespace are removed, but the associated statement only removes leading whitespace. llvm-svn: 290061
* [X86][SSE][AVX-512] Convert FAND/FOR/FXOR/FANDN nodes to integer operations ↵Craig Topper2016-12-185-58/+72
| | | | | | | | | | | | if they are available. This will allow a bunch of patterns to be removed. These nodes are only emitted for lowering FABS/FNEG/FNABS/FCOPYSIGN. Ideally we just wouldn't create these nodes if SSE2 or higher is available, but it was simple to just convert them in DAG combine. For SSE2, AVX, and AVX512 with DQI this is no functional change as the execution domain fixing pass ensures the right domain is selected regardless of the ISD opcode. For AVX-512 without DQI we end up using integer instructions since the floating point versions aren't available. But we were already doing that for any logical operations in code that didn't come from FABS/FNEG/FNABS/FCOPYSIGN so this seems no worse. And we get the benefit of being able to fold broadcasts now. llvm-svn: 290060
* Fix a lit test issue exposed by r290056Yaxun Liu2016-12-181-3/+3
| | | | | | | | | | The test requests a target which supports cl_khr_gl_msaa_sharing since in test/PCH/ocl_types.h it tries to enable cl_khr_gl_msaa_sharing. Therefore this test fails on targets not supporting cl_khr_gl_msaa_sharing, e.g. ppc64, etc. The fix is to add triple spir-unknown-unknown which supports cl_khr_gl_msaa_sharing. llvm-svn: 290059
* Attempt to fix build failure and regressions due to r290056Yaxun Liu2016-12-183-11/+11
| | | | | | | Add llvm:: namespace to StringRef. Make conversion between bool and uint64_t explicit. llvm-svn: 290058
* [AVX-512] Use EVEX encoded XOR instruction for zeroing scalar registers when ↵Craig Topper2016-12-184-6/+47
| | | | | | | | DQI and VLX instructions are available. This can give the register allocator more registers to use. llvm-svn: 290057
* Recommit r289979 [OpenCL] Allow disabling types and declarations associated ↵Yaxun Liu2016-12-1829-275/+666
| | | | | | | | with extensions Fixed undefined behavior due to cast integer to bool in initializer list. llvm-svn: 290056
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