summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* Refactor duplicated code. NFC.Rafael Espindola2016-06-231-20/+17
| | | | llvm-svn: 273595
* [codeview] Fix letter casing in FileCheck regexesHans Wennborg2016-06-231-3/+3
| | | | | | We print those hex numbers with uppercase letters. llvm-svn: 273594
* [X86] Extract HiPE prologue constants into metadataMichael Kuperstein2016-06-234-6/+47
| | | | | | | | | | | | | | | | | | | | | | X86FrameLowering::adjustForHiPEPrologue() contains a hard-coded offset into an Erlang Runtime System-internal data structure (the PCB). As the layout of this data structure is prone to change, this poses problems for maintaining compatibility. To address this problem, the compiler can produce this information as module-level named metadata. For example (where P_NSP_LIMIT is the offending offset): !hipe.literals = !{ !2, !3, !4 } !2 = !{ !"P_NSP_LIMIT", i32 152 } !3 = !{ !"X86_LEAF_WORDS", i32 24 } !4 = !{ !"AMD64_LEAF_WORDS", i32 24 } Patch by Magnus Lang Differential Revision: http://reviews.llvm.org/D20363 llvm-svn: 273593
* Typo.Vassil Vassilev2016-06-231-1/+1
| | | | llvm-svn: 273592
* Fix the wasm build by including EndianStream.hReid Kleckner2016-06-231-0/+1
| | | | llvm-svn: 273591
* Add a test case for the regression in -Wfor-loop-analysis caused by r273548.Peter Collingbourne2016-06-231-0/+6
| | | | llvm-svn: 273590
* Revert r273548, "Rearrange condition handling so that semantic checks on a ↵Peter Collingbourne2016-06-2316-294/+374
| | | | | | | | condition variable" as it caused a regression in -Wfor-loop-analysis. llvm-svn: 273589
* Prevent generation of temp file in test from r273585.Nirav Dave2016-06-231-1/+1
| | | | llvm-svn: 273588
* [SCEV] Don't unnecessarily namespace; NFCSanjoy Das2016-06-231-3/+3
| | | | llvm-svn: 273587
* [IRCE] Use getTerminator instead of rbegin; NFCSanjoy Das2016-06-231-5/+5
| | | | llvm-svn: 273586
* Preserve DebugInfo when replacing values in DAGCombinerNirav Dave2016-06-239-21/+191
| | | | | | | | | | | | | | | | | | | | | Recommiting after correcting over-eager Debug Value transfer fixing PR28270. [DAG] Previously debug values would transfer debuginfo for the selected start node for a replacement which allows for debug to be dropped. Push debug value transfer to occur with node/value replacement in SelectionDAG, remove now extraneous transfers of debug values. This refixes PR9817 which was being incompletely checked in the testsuite. Reviewers: jyknight Subscribers: dblaikie, llvm-commits Differential Revision: http://reviews.llvm.org/D21037 llvm-svn: 273585
* [ValueTracking] simplify logic in ComputeNumSignBits (NFCI)Sanjay Patel2016-06-231-16/+9
| | | | | | | | | | | This was noted in http://reviews.llvm.org/D21610 . The previous code predated the use of APInt ( http://reviews.llvm.org/rL47654 ), so it had to account for the fixed width of uint64_t. Now that we're using the variable width APInt, we can remove some complexity. llvm-svn: 273584
* [TableGen] Use StringRef::compare instead of != and <. NFC.Ahmed Bougacha2016-06-231-2/+2
| | | | | | | | | The previous code would always do 1 or 2 prefix compares; explicitly only do one. This speeds up debug -gen-asm-matcher by ~10% (e.g. X86: 40s -> 35s). llvm-svn: 273583
* fix Xcode build for r273547Todd Fiala2016-06-231-0/+8
| | | | llvm-svn: 273582
* [ARM] Lower (select_cc k k (select_cc ~k ~k x)) into (SSAT l_k x)Pablo Barrio2016-06-236-1/+359
| | | | | | | | | | | | | | | | | Summary: SSAT saturates an integer, making sure that its value lies within an interval [-k, k]. Since the constant is given to SSAT as the number of bytes set to one, k + 1 must be a power of 2, otherwise the optimization is not possible. Also, the select_cc must use < and > respectively so that they define an interval. Reviewers: mcrosier, jmolloy, rengolin Subscribers: aemerson, rengolin, llvm-commits Differential Revision: http://reviews.llvm.org/D21372 llvm-svn: 273581
* Upgrade other old memset/memcpy signatures in tests causing buildbot ↵Artur Pilipenko2016-06-232-7/+0
| | | | | | failures with rL273568. llvm-svn: 273580
* [codeview] Emit retained typesHans Wennborg2016-06-233-0/+113
| | | | | | Differential Revision: http://reviews.llvm.org/D21630 llvm-svn: 273579
* Change the email address for commit access requests to my llvm address.Chris Lattner2016-06-232-3/+2
| | | | llvm-svn: 273578
* NFC, add an "end namespace" comment for consistencyVedant Kumar2016-06-231-1/+2
| | | | llvm-svn: 273577
* Remove redundant %libomp-compile step from test/lock/omp_lock.cJonathan Peyton2016-06-231-1/+1
| | | | llvm-svn: 273576
* Revert r273567 "[SystemZ] Let z13 also support FeatureMiscellaneousExtensions."Hans Wennborg2016-06-231-1/+0
| | | | | | It broke test/CodeGen/SystemZ/vec-extract-02.ll llvm-svn: 273575
* Revert r273568 "Remangle intrinsics names when types are renamed"Hans Wennborg2016-06-238-163/+2
| | | | | | It broke 2008-07-15-Bswap.ll and 2009-09-01-PostRAProlog.ll llvm-svn: 273574
* Fix an old memset signature in 2009-09-01-PostRAProlog.ll test causing a ↵Artur Pilipenko2016-06-231-2/+0
| | | | | | buildbot failure llvm-svn: 273573
* [Analyzer] Don't cache report generation ExplodedNodesBen Craig2016-06-233-3/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | During the core analysis, ExplodedNodes are added to the ExplodedGraph, and those nodes are cached for deduplication purposes. After core analysis, reports are generated. Here, trimmed copies of the ExplodedGraph are made. Since the ExplodedGraph has already been deduplicated, there is no need to deduplicate again. This change makes it possible to add ExplodedNodes to an ExplodedGraph without the overhead of deduplication. "Uncached" nodes also cannot be iterated over, but none of the report generation code attempts to iterate over all nodes. This change reduces the analysis time of a large .C file from 3m43.941s to 3m40.256s (~1.6% speedup). It should slightly reduce memory consumption. Gains should be roughly proportional to the number (and path length) of static analysis warnings. This patch enables future work that should remove the need for an InterExplodedGraphMap inverse map. I plan on using the (now unused) ExplodedNode link to connect new nodes to the original nodes. http://reviews.llvm.org/D21229 llvm-svn: 273572
* Use CreateFileA and add a FIXME to switch to the wide variantReid Kleckner2016-06-232-7/+9
| | | | | | | No functional change. Required to build with -DUNICODE, as is done in http://reviews.llvm.org/D21643 llvm-svn: 273571
* [docs] Bump minimum version of CMake in its own docRenato Golin2016-06-231-4/+1
| | | | llvm-svn: 273570
* [ELF][MIPS] Support MIPS TLS relocationsSimon Atanasyan2016-06-239-7/+276
| | | | | | | | | | | | | | | | | | | | | | | The patch adds one more partition to the MIPS GOT. This time it is for TLS related GOT entries. Such entries are located after 'local' and 'global' ones. We cannot get a final offset for these entries at the time of creation because we do not know size of 'local' and 'global' partitions. So we have to adjust the offset later using `getMipsTlsOffset()` method. All MIPS TLS relocations which need GOT entries operates MIPS style GOT offset - 'offset from the GOT's beginning' - MipsGPOffset constant. That is why I add new types of relocation expressions. One more difference from othe ABIs is that the MIPS ABI does not support any TLS relocation relaxations. I decided to make a separate function `handleMipsTlsRelocation` and put MIPS TLS relocation handling code there. It is similar to `handleTlsRelocation` routine and duplicates its code. But it allows to make the code cleaner and prevent pollution of the `handleTlsRelocation` by MIPS 'if' statements. Differential Revision: http://reviews.llvm.org/D21606 llvm-svn: 273569
* Remangle intrinsics names when types are renamedArtur Pilipenko2016-06-238-2/+163
| | | | | | | | | | | This is a fix for the problem mentioned in "LTO and intrinsics mangling" llvm-dev mail thread: http://lists.llvm.org/pipermail/llvm-dev/2016-April/098387.html Reviewers: mehdi_amini, reames Differential Revision: http://reviews.llvm.org/D19373 llvm-svn: 273568
* [SystemZ] Let z13 also support FeatureMiscellaneousExtensions.Jonas Paulsson2016-06-231-0/+1
| | | | | | | | | This processor feature had been left out by mistake from the z13 ProcessorModel. Reviewed by Ulrich Weigand. llvm-svn: 273567
* Restructure the propagation of -fPIC/-fPIE.Rafael Espindola2016-06-2312-36/+31
| | | | | | | | | | | | | The PIC and PIE levels are not independent. In fact, if PIE is defined it is always the same as PIC. This is clear in the driver where ParsePICArgs returns a PIC level and a IsPIE boolean. Unfortunately that is currently lost and we pass two redundant levels down the pipeline. This patch keeps a bool and a PIC level all the way down to codegen. llvm-svn: 273566
* Revert "[misched] Extend scheduler to handle unsupported features"Simon Dardis2016-06-233-53/+1
| | | | | | | | This reverts commit r273551. Patch contained a wrong check for isUnsupported. llvm-svn: 273565
* Explicitly specify the ANSI version of these Win32 APIs. While these are ↵Aaron Ballman2016-06-233-9/+9
| | | | | | seemingly unrelated changes, they are all NFC because we currently default to the ANSI versions of the APIs when building for Windows. This simply makes the ANSI usage explicit. llvm-svn: 273564
* Fixing a FIXME related to Unicode support on Windows. Converted the Win32 ↵Aaron Ballman2016-06-231-18/+27
| | | | | | | | APIs to explicitly use the W version when it involves strings that can hold non-ASCII characters (like file paths). Now explicitly using the A version for strings that will always be ASCII (like registry key paths). No extra tests required as this is currently covered by existing testing, and this is basically impossible to write Unicode-specific tests for. llvm-svn: 273563
* [LoopUnrollAnalyzer] Fix a bug in UnrolledInstAnalyzer::visitLoad.Michael Zolotukhin2016-06-232-1/+19
| | | | | | | | | | | When simplifying a load we need to make sure that the type of the simplified value matches the type of the instruction we're processing. In theory, we can handle casts here as we deal with constant data, but since it's not implemented at the moment, we at least need to bail out. This fixes PR28262. llvm-svn: 273562
* [AMDGPU] Enable absolute expression initializer for amd_kernel_code_t fields.Valery Pykhtin2016-06-235-23/+155
| | | | | | Differential Revision: http://reviews.llvm.org/D21380 llvm-svn: 273561
* [X86][AVX512] Added AVX512F vector sign extend testsSimon Pilgrim2016-06-231-130/+415
| | | | | | Now that Elena has confirmed that PR26474 has been fixed llvm-svn: 273560
* Allow DeadStoreElimination to track combinations of partial later wrtiesHal Finkel2016-06-232-2/+273
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DeadStoreElimination can currently remove a small store rendered unnecessary by a later larger one, but could not remove a larger store rendered unnecessary by a series of later smaller ones. This adds that capability. It works by keeping a map, which is used as an effective interval map, for each store later overwritten only partially, and filling in that interval map as more such stores are discovered. No additional walking or aliasing queries are used. In the map forms an interval covering the the entire earlier store, then it is dead and can be removed. The map is used as an interval map by storing a mapping between the ending offset and the beginning offset of each interval. I discovered this problem when investigating a performance issue with code like this on PowerPC: #include <complex> using namespace std; complex<float> bar(complex<float> C); complex<float> foo(complex<float> C) { return bar(C)*C; } which produces this: define void @_Z4testSt7complexIfE(%"struct.std::complex"* noalias nocapture sret %agg.result, i64 %c.coerce) { entry: %ref.tmp = alloca i64, align 8 %tmpcast = bitcast i64* %ref.tmp to %"struct.std::complex"* %c.sroa.0.0.extract.shift = lshr i64 %c.coerce, 32 %c.sroa.0.0.extract.trunc = trunc i64 %c.sroa.0.0.extract.shift to i32 %0 = bitcast i32 %c.sroa.0.0.extract.trunc to float %c.sroa.2.0.extract.trunc = trunc i64 %c.coerce to i32 %1 = bitcast i32 %c.sroa.2.0.extract.trunc to float call void @_Z3barSt7complexIfE(%"struct.std::complex"* nonnull sret %tmpcast, i64 %c.coerce) %2 = bitcast %"struct.std::complex"* %agg.result to i64* %3 = load i64, i64* %ref.tmp, align 8 store i64 %3, i64* %2, align 4 ; <--- ***** THIS SHOULD NOT BE HERE **** %_M_value.realp.i.i = getelementptr inbounds %"struct.std::complex", %"struct.std::complex"* %agg.result, i64 0, i32 0, i32 0 %4 = lshr i64 %3, 32 %5 = trunc i64 %4 to i32 %6 = bitcast i32 %5 to float %_M_value.imagp.i.i = getelementptr inbounds %"struct.std::complex", %"struct.std::complex"* %agg.result, i64 0, i32 0, i32 1 %7 = trunc i64 %3 to i32 %8 = bitcast i32 %7 to float %mul_ad.i.i = fmul fast float %6, %1 %mul_bc.i.i = fmul fast float %8, %0 %mul_i.i.i = fadd fast float %mul_ad.i.i, %mul_bc.i.i %mul_ac.i.i = fmul fast float %6, %0 %mul_bd.i.i = fmul fast float %8, %1 %mul_r.i.i = fsub fast float %mul_ac.i.i, %mul_bd.i.i store float %mul_r.i.i, float* %_M_value.realp.i.i, align 4 store float %mul_i.i.i, float* %_M_value.imagp.i.i, align 4 ret void } the problem here is not just that the i64 store is unnecessary, but also that it blocks further backend optimizations of the other uses of that i64 value in the backend. In the future, we might want to add a special case for handling smaller accesses (e.g. using a bit vector) if the map mechanism turns out to be noticeably inefficient. A sorted vector is also a possible replacement for the map for small numbers of tracked intervals. Differential Revision: http://reviews.llvm.org/D18586 llvm-svn: 273559
* CodeGen: support linker options on Windows ARMSaleem Abdulrasool2016-06-236-0/+20
| | | | | | | | We would incorrectly emit the directive sections due to the missing overridden methods. We now emit the expected "/DEFAULTLIB" rather than "-l" options for requested linkage llvm-svn: 273558
* [mips] Don't derive the default ABI from the CPU in the backend.Daniel Sanders2016-06-2333-95/+70
| | | | | | | | | | | | | | | | | | | | | | | | Summary: The backend has no reason to behave like a driver and should generally do as it's told (and error out if it can't) instead of trying to figure out what the API user meant. The default ABI is still derived from the arch component as a concession to backwards compatibility. API-users that previously passed an explicit CPU and a triple that was inconsistent with the CPU (e.g. mips-linux-gnu and mips64r2) may get a different ABI to what they got before. However, it's expected that there are no such users on the basis that CodeGen has been asserting that the triple is consistent with the selected ABI for several releases. API-users that were consistent or passed '' or 'generic' as the CPU will see no difference. Reviewers: sdardis, rafael Subscribers: rafael, dsanders, sdardis, llvm-commits Differential Revision: http://reviews.llvm.org/D21466 llvm-svn: 273557
* [ARM] Use member initializers in ARMSubtarget. NFCIDiana Picus2016-06-231-66/+22
| | | | | | | | | Move most of the initializations in ARMSubtarget::initializeEnvironment to member initializers. Change suggested by Matthias Braun (see http://reviews.llvm.org/D21432). llvm-svn: 273556
* [mips][ias] Integers are not registers.Daniel Sanders2016-06-232-6/+30
| | | | | | | | | | | | | | | | | | | Summary: When parseAnyRegister() encounters a symbol alias, it parses integers and adds a corresponding expression to the operand list. This is clearly wrong since the only operands that parseAnyRegister() should be accepting are registers. It's not clear why this code was added and there are no test cases that cover it. I think it might be leftover from when searchSymbolAlias() was more widely used. Reviewers: sdardis Subscribers: dsanders, sdardis, llvm-commits Differential Revision: http://reviews.llvm.org/D21377 llvm-svn: 273555
* [llc] Remove exit-on-error flag (PR27759)Diana Picus2016-06-231-12/+4
| | | | | | | | | | | | | This flag was introduced in r269655 with the new diagnostic handler for llc. Its purpose was to keep the old behavior for some of the tests that didn't recover well after an error. Those tests have been fixed, so now it's safe to remove the flag entirely. Fixes PR27759. Differential Revision: http://reviews.llvm.org/D21368 llvm-svn: 273554
* clang-format: [Proto] Use more compact format for text-formatted optionsDaniel Jasper2016-06-232-8/+5
| | | | | | | | | | | | | | | | | Before: enum Type { UNKNOWN = 0 [(some_options) = { a: aa, b: bb }]; }; After: enum Type { UNKNOWN = 0 [(some_options) = {a: aa, b: bb}]; }; llvm-svn: 273553
* Attempt to fix MIPS buildbots after r273425.Daniel Sanders2016-06-231-2/+2
| | | | | | MIPS has a 'signext' attribute that was causing the check to fail. llvm-svn: 273552
* [misched] Extend scheduler to handle unsupported featuresSimon Dardis2016-06-233-1/+53
| | | | | | | | | | | | | | | | | | | | | | | Currently isComplete = 1 requires that every instruction must be described, declared unsupported or marked as having no scheduling information for a processor. For some backends such as MIPS, this requirement entails long regex lists of instructions that are unsupported. This patch teaches Tablegen to skip over instructions that are associated with unsupported feature when checking if the scheduling model is complete. Patch by: Daniel Sanders Contributions by: Simon Dardis Reviewers: MatzeB Differential Reviewer: http://reviews.llvm.org/D20522 llvm-svn: 273551
* [AMDGPU] Remove exit-on-error in test (PR27761)Diana Picus2016-06-235-8/+12
| | | | | | | | | | | | | | | | | The exit-on-error flag was necessary in order to avoid an assertion when handling DYNAMIC_STACKALLOC nodes in SelectionDAGLegalize. We can avoid the assertion by creating some dummy nodes. This enables us to remove the exit-on-error flag on the first 2 run lines (SI), but on the third run line (R600) we would run into another assertion when trying to reserve indirect registers. This patch also replaces that assertion with an early exit from the function. Fixes PR27761. Differential Revision: http://reviews.llvm.org/D20852 llvm-svn: 273550
* [mips] Fix dext/dins definitionsSimon Dardis2016-06-232-6/+14
| | | | | | | | | | | dext and dins, along with their 'm' and 'u' variants are defined in mips64r2, not mips64. Reviewers: dsanders, vkalintiris Differential Review: http://reviews.llvm.org/D21608 llvm-svn: 273549
* Rearrange condition handling so that semantic checks on a condition variableRichard Smith2016-06-2316-374/+294
| | | | | | | | | are performed before the other substatements of the construct are parsed, rather than deferring them until the end. This allows better error recovery from semantic errors in the condition, improves diagnostic order, and is a prerequisite for C++17 constexpr if. llvm-svn: 273548
* Add MemoryRegionInfo to SB APIHoward Hellyer2016-06-2313-0/+587
| | | | | | | | | | | | | | | | | | | Summary: This adds new SB API calls and classes to allow a user of the SB API to obtain a full list of memory regions accessible within the process. Adding this to the API makes it possible use the API for tasks like scanning memory for blocks allocated with a header and footer to track down memory leaks, otherwise just inspecting every address is impractical especially for 64 bit processes. These changes only add the API itself and a base implementation of GetMemoryRegions() to lldb_private::Process::GetMemoryRegions. I will submit separate patches to fill in lldb_private::Process::GetMemoryRegionInfoList and GetMemoryRegionInfo for individual platforms. The original discussion about this is here: http://lists.llvm.org/pipermail/lldb-dev/2016-May/010203.html Reviewers: clayborg Subscribers: lldb-commits Differential Revision: http://reviews.llvm.org/D20565 llvm-svn: 273547
* Test commit to verify access, fix typo.Howard Hellyer2016-06-231-1/+1
| | | | llvm-svn: 273546
OpenPOWER on IntegriCloud